firmware/target/arm/as3525/usb-drv-as3525v2.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2010 Amaury Pouly
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "usb.h"
  23 #include "usb_drv.h"
  24 #include "as3525v2.h"
  25 #include "clock-target.h"
  26 #include "ascodec.h"
  27 #include "as3514.h"
  28 #include "stdbool.h"
  29 #include "string.h"
  30 #include "stdio.h"
  31 #include "panic.h"
  32 #include "mmu-arm.h"
  33 #include "system.h"
  34 #define LOGF_ENABLE
  35 #include "logf.h"
  36 #include "usb-drv-as3525v2.h"
  37 #include "usb_core.h"
  38
  39 static int __in_ep_list[NUM_IN_EP] = {IN_EP_LIST};
  40 static int __out_ep_list[NUM_OUT_EP] = {OUT_EP_LIST};
  41 static int __in_ep_list_ep0[NUM_IN_EP + 1] = {0, IN_EP_LIST};
  42 static int __out_ep_list_ep0[NUM_OUT_EP + 1] = {0, OUT_EP_LIST};
  43
  44 /* iterate through each in/out ep except EP0
  45  * 'counter' is the counter, 'ep' is the actual value */
  46 #define FOR_EACH_EP(list, size, counter, ep) \
  47     for(counter = 0, ep = (list)[0]; \
  48         counter < (size); \
  49         counter++, ep = (list)[counter])
  50
  51 #define FOR_EACH_IN_EP_EX(include_ep0, counter, ep) \
  52     FOR_EACH_EP(include_ep0 ? __in_ep_list_ep0 : __in_ep_list, \
  53         include_ep0 ? NUM_IN_EP + 1: NUM_IN_EP, counter, ep)
  54
  55 #define FOR_EACH_OUT_EP_EX(include_ep0, counter, ep) \
  56     FOR_EACH_EP(include_ep0 ? __out_ep_list_ep0 : __out_ep_list, \
  57         include_ep0 ? NUM_OUT_EP + 1: NUM_OUT_EP, counter, ep)
  58
  59 #define FOR_EACH_IN_EP(counter, ep) \
  60     FOR_EACH_IN_EP_EX(false, counter, ep)
  61
  62 #define FOR_EACH_IN_EP_AND_EP0(counter, ep) \
  63     FOR_EACH_IN_EP_EX(true, counter, ep)
  64
  65 #define FOR_EACH_OUT_EP(counter, ep) \
  66     FOR_EACH_OUT_EP_EX(false, counter, ep)
  67
  68 #define FOR_EACH_OUT_EP_AND_EP0(counter, ep) \
  69     FOR_EACH_OUT_EP_EX(true, counter, ep)
  70
  71 /* store per endpoint, per direction, information */
  72 struct usb_endpoint
  73 {
  74     bool active; /* true is endpoint has been requested (true for EP0) */
  75     unsigned int len; /* length of the data buffer */
  76     bool wait; /* true if usb thread is blocked on completion */
  77     bool busy; /* true is a transfer is pending */
  78     int status; /* completion status (0 for success) */
  79     struct wakeup complete; /* wait object */
  80 };
  81
  82 /* state of EP0 (to correctly schedule setup packet enqueing) */
  83 enum ep0state
  84 {
  85     /* Setup packet is enqueud, waiting for actual data */
  86     EP0_WAIT_SETUP = 0,
  87     /* Waiting for ack (either IN or OUT) */
  88     EP0_WAIT_ACK = 1,
  89     /* Ack complete, waiting for data (either IN or OUT)
  90      * This state is necessary because if both ack and data complete in the
  91      * same interrupt, we might process data completion before ack completion
  92      * so we need this bizarre state */
  93     EP0_WAIT_DATA = 2,
  94     /* Setup packet complete, waiting for ack and data */
  95     EP0_WAIT_DATA_ACK = 3,
  96 };
  97
  98 /* endpoints[ep_num][DIR_IN/DIR_OUT] */
  99 static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS][2];
 100 /* setup packet for EP0 */
 101 static struct usb_ctrlrequest ep0_setup_pkt USB_DEVBSS_ATTR;
 102 /* state of EP0 */
 103 enum ep0state ep0_state;
 104
 105 void usb_attach(void)
 106 {
 107     logf("usb-drv: attach");
 108     usb_enable(true);
 109 }
 110
 111 static void usb_delay(void)
 112 {
 113     int i = 0;
 114     while(i < 0x300)
 115     {
 116         asm volatile("nop");
 117         i++;
 118     }
 119 }
 120
 121 static void as3525v2_connect(void)
 122 {
 123     logf("usb-drv: init as3525v2");
 124     /* 1) enable usb core clock */
 125     CGU_PERI |= CGU_USB_CLOCK_ENABLE;
 126     usb_delay();
 127     /* 2) enable usb phy clock */
 128     /* PHY clock */
 129     CGU_USB = 1<<5 /* enable */
 130         | (CLK_DIV(AS3525_PLLA_FREQ, 60000000)) << 2
 131         | 1; /* source = PLLA */
 132     usb_delay();
 133     /* 3) clear "stop pclk" */
 134     PCGCCTL &= ~0x1;
 135     usb_delay();
 136     /* 4) clear "power clamp" */
 137     PCGCCTL &= ~0x4;
 138     usb_delay();
 139     /* 5) clear "reset power down module" */
 140     PCGCCTL &= ~0x8;
 141     usb_delay();
 142     /* 6) set "power on program done" */
 143     DCTL |= DCTL_pwronprgdone;
 144     usb_delay();
 145     /* 7) core soft reset */
 146     GRSTCTL |= GRSTCTL_csftrst;
 147     usb_delay();
 148     /* 8) hclk soft reset */
 149     GRSTCTL |= GRSTCTL_hsftrst;
 150     usb_delay();
 151     /* 9) flush and reset everything */
 152     GRSTCTL |= 0x3f;
 153     usb_delay();
 154     /* 10) force device mode*/
 155     GUSBCFG &= ~GUSBCFG_force_host_mode;
 156     GUSBCFG |= GUSBCFG_force_device_mode;
 157     usb_delay();
 158     /* 11) Do something that is probably CCU related but undocumented*/
 159     CCU_USB_THINGY &= ~0x1000;
 160     usb_delay();
 161     CCU_USB_THINGY &= ~0x300000;
 162     usb_delay();
 163     /* 12) reset usb core parameters (dev addr, speed, ...) */
 164     DCFG = 0;
 165     usb_delay();
 166 }
 167
 168 static void as3525v2_disconnect(void)
 169 {
 170 }
 171
 172 static void enable_device_interrupts(void)
 173 {
 174     /* Clear any pending interrupt */
 175     GINTSTS = 0xffffffff;
 176     /* Clear any pending otg interrupt */
 177     GOTGINT = 0xffffffff;
 178     /* Enable interrupts */
 179     GINTMSK = GINTMSK_usbreset
 180                 | GINTMSK_enumdone
 181                 | GINTMSK_inepintr
 182                 | GINTMSK_outepintr
 183                 | GINTMSK_disconnect;
 184 }
 185
 186 static void flush_tx_fifos(int nums)
 187 {
 188     unsigned int i = 0;
 189
 190     GRSTCTL = (nums << GRSTCTL_txfnum_bitp)
 191             | GRSTCTL_txfflsh_flush;
 192     while(GRSTCTL & GRSTCTL_txfflsh_flush && i < 0x300)
 193         i++;
 194     if(GRSTCTL & GRSTCTL_txfflsh_flush)
 195         panicf("usb-drv: hang of flush tx fifos (%x)", nums);
 196     /* wait 3 phy clocks */
 197     udelay(1);
 198 }
 199
 200 static void flush_rx_fifos(void)
 201 {
 202     unsigned int i = 0;
 203
 204     GRSTCTL = GRSTCTL_rxfflsh_flush;
 205     while(GRSTCTL & GRSTCTL_rxfflsh_flush && i < 0x300)
 206         i++;
 207     if(GRSTCTL & GRSTCTL_rxfflsh_flush)
 208         panicf("usb-drv: hang of flush rx fifos");
 209     /* wait 3 phy clocks */
 210     udelay(1);
 211 }
 212
 213 static void prepare_setup_ep0(void)
 214 {
 215     logf("usb-drv: prepare EP0"),
 216     /* setup DMA */
 217     clean_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);  /* force write back */
 218     DOEPDMA(0) = (unsigned long)&ep0_setup_pkt; /* virtual address=physical address */
 219
 220     /* Setup EP0 OUT with the following parameters:
 221      * packet count = 1
 222      * setup packet count = 1
 223      * transfer size = 8 (setup packet)
 224      */
 225     DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp)
 226                 | (1 << DEPTSIZ0_pkcnt_bitp)
 227                 | 8;
 228
 229     /* Enable endpoint, clear nak */
 230     DOEPCTL(0) |= DEPCTL_epena | DEPCTL_cnak;
 231
 232     if(!(DOEPCTL(0) & DEPCTL_epena))
 233         panicf("usb-drv: failed to enable EP0 !");
 234     ep0_state = EP0_WAIT_SETUP;
 235 }
 236
 237 static void handle_ep0_complete(bool is_ack)
 238 {
 239     switch(ep0_state)
 240     {
 241         case EP0_WAIT_SETUP:
 242             panicf("usb-drv: EP0 completion while waiting for SETUP");
 243         case EP0_WAIT_ACK:
 244             if(is_ack)
 245                 /* everything is done, prepare next setup */
 246                 prepare_setup_ep0();
 247             else
 248                 panicf("usb-drv: EP0 data completion while waiting for ACK");
 249             break;
 250         case EP0_WAIT_DATA:
 251             if(is_ack)
 252                 panicf("usb-drv: EP0 ACK while waiting for data completion");
 253             else
 254                 /* everything is done, prepare next setup */
 255                 prepare_setup_ep0();
 256             break;
 257         case EP0_WAIT_DATA_ACK:
 258             /* update state */
 259             if(is_ack)
 260                 ep0_state = EP0_WAIT_DATA;
 261             else
 262                 ep0_state = EP0_WAIT_ACK;
 263             break;
 264         default:
 265             panicf("usb-drv: invalid EP0 state");
 266     }
 267     logf("usb-drv: EP0 state updated to %d", ep0_state);
 268 }
 269
 270 static void handle_ep0_setup(void)
 271 {
 272     if(ep0_state != EP0_WAIT_SETUP)
 273     {
 274         logf("usb-drv: EP0 SETUP while in state %d", ep0_state);
 275         DCTL |= DCTL_sftdiscon;
 276         return;
 277     }
 278     /* determine is there is a data phase */
 279     if(ep0_setup_pkt.wLength == 0)
 280         /* no: wait for ack */
 281         ep0_state = EP0_WAIT_ACK;
 282     else
 283         /* yes: wait ack and data */
 284         ep0_state = EP0_WAIT_DATA_ACK;
 285 }
 286
 287 static void reset_endpoints(void)
 288 {
 289     int i, ep;
 290     /* disable all endpoints except EP0 */
 291     FOR_EACH_IN_EP(i, ep)
 292         if(DIEPCTL(ep) & DEPCTL_epena)
 293             DIEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 294         else
 295             DIEPCTL(ep) = 0;
 296
 297     FOR_EACH_OUT_EP(i, ep)
 298         if(DOEPCTL(ep) & DEPCTL_epena)
 299             DOEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 300         else
 301             DOEPCTL(ep) = 0;
 302
 303     /* 64 bytes packet size, active endpoint */
 304     DOEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 305     DIEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 306
 307     prepare_setup_ep0();
 308 }
 309
 310 static void cancel_all_transfers(bool cancel_ep0)
 311 {
 312     logf("usb-drv: cancel all transfers");
 313     int flags = disable_irq_save();
 314     unsigned i, ep;
 315     FOR_EACH_IN_EP_EX(cancel_ep0, i, ep)
 316     {
 317         endpoints[ep][DIR_IN].status = 1;
 318         endpoints[ep][DIR_IN].wait = false;
 319         endpoints[ep][DIR_IN].busy = false;
 320         wakeup_signal(&endpoints[ep][DIR_IN].complete);
 321         DIEPCTL(ep) = (DIEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis | DEPCTL_snak;
 322     }
 323     FOR_EACH_OUT_EP_EX(cancel_ep0, i, ep)
 324     {
 325         endpoints[ep][DIR_OUT].status = 1;
 326         endpoints[ep][DIR_OUT].wait = false;
 327         endpoints[ep][DIR_OUT].busy = false;
 328         wakeup_signal(&endpoints[ep][DIR_OUT].complete);
 329         DOEPCTL(ep) = (DOEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis | DEPCTL_snak;
 330     }
 331
 332     restore_irq(flags);
 333 }
 334
 335 static void core_dev_init(void)
 336 {
 337     unsigned int i, ep;
 338     /* Restart the phy clock */
 339     PCGCCTL = 0;
 340     /* Set phy speed : high speed */
 341     DCFG = (DCFG & ~bitm(DCFG, devspd)) | DCFG_devspd_hs_phy_hs;
 342
 343     /* Check hardware capabilities */
 344     if(extract(GHWCFG2, arch) != GHWCFG2_ARCH_INTERNAL_DMA)
 345         panicf("usb-drv: wrong architecture (%ld)", extract(GHWCFG2, arch));
 346     if(extract(GHWCFG2, hs_phy_type) != GHWCFG2_PHY_TYPE_UTMI)
 347         panicf("usb-drv: wrong HS phy type (%ld)", extract(GHWCFG2, hs_phy_type));
 348     if(extract(GHWCFG2, fs_phy_type) != GHWCFG2_PHY_TYPE_UNSUPPORTED)
 349         panicf("usb-drv: wrong FS phy type (%ld)", extract(GHWCFG2, fs_phy_type));
 350     if(extract(GHWCFG4, utmi_phy_data_width) != 0x2)
 351         panicf("usb-drv: wrong utmi data width (%ld)", extract(GHWCFG4, utmi_phy_data_width));
 352     if(!(GHWCFG4 & GHWCFG4_ded_fifo_en)) /* it seems to be multiple tx fifo support */
 353         panicf("usb-drv: no multiple tx fifo");
 354
 355     #ifdef USE_CUSTOM_FIFO_LAYOUT
 356     if(!(GHWCFG2 & GHWCFG2_dyn_fifo))
 357         panicf("usb-drv: no dynamic fifo");
 358     if(GRXFSIZ != DATA_FIFO_DEPTH)
 359         panicf("usb-drv: wrong data fifo size");
 360     #endif /* USE_CUSTOM_FIFO_LAYOUT */
 361
 362     /* do some logging */
 363     /*
 364     logf("hwcfg1: %08lx", GHWCFG1);
 365     logf("hwcfg2: %08lx", GHWCFG2);
 366     logf("hwcfg3: %08lx", GHWCFG3);
 367     logf("hwcfg4: %08lx", GHWCFG4);
 368     */
 369
 370     if(USB_NUM_ENDPOINTS != extract(GHWCFG2, num_ep))
 371         panicf("usb-drv: wrong endpoint number");
 372
 373     FOR_EACH_IN_EP_AND_EP0(i, ep)
 374     {
 375         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 376         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_IN)
 377             panicf("usb-drv: EP%d is no IN or BIDIR", ep);
 378     }
 379     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 380     {
 381         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 382         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_OUT)
 383             panicf("usb-drv: EP%d is no OUT or BIDIR", ep);
 384     }
 385
 386     /* Setup interrupt masks for endpoints */
 387     /* Setup interrupt masks */
 388     DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr;
 389     DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout | DIEPINT_ahberr;
 390     DAINTMSK = 0xffffffff;
 391
 392     reset_endpoints();
 393
 394     /* fixme: threshold tweaking only takes place if we use multiple tx fifos it seems */
 395     /* only dump them for now, leave threshold disabled */
 396     /*
 397     logf("threshold control:");
 398     logf("  non_iso_thr_en: %d", (DTHRCTL & DTHRCTL_non_iso_thr_en) ? 1 : 0);
 399     logf("  iso_thr_en: %d", (DTHRCTL & DTHRCTL_iso_thr_en) ? 1 : 0);
 400     logf("  tx_thr_len: %lu", extract(DTHRCTL, tx_thr_len));
 401     logf("  rx_thr_en: %d", (DTHRCTL & DTHRCTL_rx_thr_en) ? 1 : 0);
 402     logf("  rx_thr_len: %lu", extract(DTHRCTL, rx_thr_len));
 403     */
 404
 405     /* enable USB interrupts */
 406     enable_device_interrupts();
 407 }
 408
 409 static void core_init(void)
 410 {
 411     /* Disconnect */
 412     DCTL |= DCTL_sftdiscon;
 413     /* Select UTMI+ 16 */
 414     GUSBCFG |= GUSBCFG_phy_if;
 415
 416     /* fixme: the current code is for internal DMA only, the clip+ architecture
 417      *        define the internal DMA model */
 418     /* Set burstlen and enable DMA*/
 419     GAHBCFG = (GAHBCFG_INT_DMA_BURST_INCR4 << GAHBCFG_hburstlen_bitp)
 420                 | GAHBCFG_dma_enable;
 421     /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
 422     GUSBCFG &= ~(GUSBCFG_srpcap | GUSBCFG_hnpcapp);
 423
 424     /* perform device model specific init */
 425     core_dev_init();
 426
 427     /* Reconnect */
 428     DCTL &= ~DCTL_sftdiscon;
 429 }
 430
 431 static void enable_global_interrupts(void)
 432 {
 433     VIC_INT_ENABLE = INTERRUPT_USB;
 434     GAHBCFG |= GAHBCFG_glblintrmsk;
 435 }
 436
 437 static void disable_global_interrupts(void)
 438 {
 439     GAHBCFG &= ~GAHBCFG_glblintrmsk;
 440     VIC_INT_EN_CLEAR = INTERRUPT_USB;
 441 }
 442
 443 void usb_drv_init(void)
 444 {
 445     unsigned i, ep;
 446     logf("usb_drv_init");
 447     /* Boost cpu */
 448     cpu_boost(1);
 449     /* Enable PHY and clocks (but leave pullups disabled) */
 450     as3525v2_connect();
 451     logf("usb-drv: synopsis id: %lx", GSNPSID);
 452     /* Core init */
 453     core_init();
 454     FOR_EACH_IN_EP_AND_EP0(i, ep)
 455         wakeup_init(&endpoints[ep][DIR_IN].complete);
 456     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 457         wakeup_init(&endpoints[ep][DIR_OUT].complete);
 458     /* Enable global interrupts */
 459     enable_global_interrupts();
 460 }
 461
 462 void usb_drv_exit(void)
 463 {
 464     logf("usb_drv_exit");
 465
 466     disable_global_interrupts();
 467     as3525v2_disconnect();
 468     cpu_boost(0);
 469 }
 470
 471 static void handle_ep_int(int ep, bool dir_in)
 472 {
 473     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 474     if(dir_in)
 475     {
 476         if(DIEPINT(ep) & DIEPINT_ahberr)
 477             panicf("usb-drv: ahb error on EP%d IN", ep);
 478         if(DIEPINT(ep) & DIEPINT_xfercompl)
 479         {
 480             logf("usb-drv: xfer complete on EP%d IN", ep);
 481             if(endpoint->busy)
 482             {
 483                 endpoint->busy = false;
 484                 endpoint->status = 0;
 485                 /* works even for PE0 */
 486                 int transfered = endpoint->len - (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 487                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 488                     (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 489                     transfered);
 490                 invalidate_dcache_range((void *)DIEPDMA(ep), transfered);
 491                 DIEPCTL(ep) |= DEPCTL_snak;
 492                 /* handle EP0 state if necessary,
 493                  * this is a ack if length is 0 */
 494                 if(ep == 0)
 495                     handle_ep0_complete(endpoint->len == 0);
 496                 usb_core_transfer_complete(ep, USB_DIR_IN, 0, transfered);
 497                 wakeup_signal(&endpoint->complete);
 498             }
 499         }
 500         if(DIEPINT(ep) & DIEPINT_timeout)
 501         {
 502             panicf("usb-drv: timeout on EP%d IN", ep);
 503             if(endpoint->busy)
 504             {
 505                 endpoint->busy = false;
 506                 endpoint->status = 1;
 507                 /* for safety, act as if no bytes as been transfered */
 508                 endpoint->len = 0;
 509                 DIEPCTL(ep) |= DEPCTL_snak;
 510                 usb_core_transfer_complete(ep, USB_DIR_IN, 1, 0);
 511                 wakeup_signal(&endpoint->complete);
 512             }
 513         }
 514         /* clear interrupts */
 515         DIEPINT(ep) = DIEPINT(ep);
 516     }
 517     else
 518     {
 519         if(DOEPINT(ep) & DOEPINT_ahberr)
 520             panicf("usb-drv: ahb error on EP%d OUT", ep);
 521         if(DOEPINT(ep) & DOEPINT_xfercompl)
 522         {
 523             logf("usb-drv: xfer complete on EP%d OUT", ep);
 524             if(endpoint->busy)
 525             {
 526                 endpoint->busy = false;
 527                 endpoint->status = 0;
 528                 /* works even for EP0 */
 529                 int transfered = endpoint->len - (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 530                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 531                     (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 532                     transfered);
 533                 invalidate_dcache_range((void *)DOEPDMA(ep), transfered);
 534                 /* handle EP0 state if necessary,
 535                  * this is a ack if length is 0 */
 536                 if(ep == 0)
 537                     handle_ep0_complete(endpoint->len == 0);
 538                 else
 539                     DOEPCTL(ep) |= DEPCTL_snak;
 540                 usb_core_transfer_complete(ep, USB_DIR_OUT, 0, transfered);
 541                 wakeup_signal(&endpoint->complete);
 542             }
 543         }
 544         if(DOEPINT(ep) & DOEPINT_setup)
 545         {
 546             logf("usb-drv: setup on EP%d OUT", ep);
 547             if(ep != 0)
 548                 panicf("usb-drv: setup not on EP0, this is impossible");
 549             if((DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits) != 0)
 550             {
 551                 logf("usb-drv: ignore spurious setup (xfersize=%d)", DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 552             }
 553             else
 554             {
 555                 DOEPCTL(ep) |= DEPCTL_snak;
 556                 logf("DOEPCTL0=%lx", DOEPCTL(ep));
 557                 logf("DOEPTSIZE0=%lx", DOEPTSIZ(ep));
 558                 if(DOEPDMA(ep) != 8 + (unsigned long)&ep0_setup_pkt)
 559                     panicf("usb-drv: EP0 wrong DMA adr (%lx vs %lx)", (unsigned long)&ep0_setup_pkt, DOEPDMA(ep));
 560                 /* handle the set address here because of a bug in the usb core */
 561                 invalidate_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);
 562                 /* handle EP0 state */
 563                 handle_ep0_setup();
 564                 logf("  rt=%x r=%x", ep0_setup_pkt.bRequestType, ep0_setup_pkt.bRequest);
 565                 if(ep0_setup_pkt.bRequestType == USB_TYPE_STANDARD &&
 566                         ep0_setup_pkt.bRequest == USB_REQ_SET_ADDRESS)
 567                     usb_drv_set_address(ep0_setup_pkt.wValue);
 568                 usb_core_control_request(&ep0_setup_pkt);
 569             }
 570         }
 571         /* clear interrupts */
 572         DOEPINT(ep) = DOEPINT(ep);
 573     }
 574 }
 575
 576 static void handle_ep_ints(void)
 577 {
 578     logf("usb-drv: ep int");
 579     /* we must read it */
 580     unsigned long daint = DAINT;
 581     unsigned i, ep;
 582
 583     FOR_EACH_IN_EP_AND_EP0(i, ep)
 584         if(daint & DAINT_IN_EP(ep))
 585             handle_ep_int(ep, true);
 586     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 587         if(daint & DAINT_OUT_EP(ep))
 588             handle_ep_int(ep, false);
 589
 590     /* write back to clear status */
 591     DAINT = daint;
 592 }
 593
 594 /* interrupt service routine */
 595 void INT_USB(void)
 596 {
 597     /* some bits in GINTSTS can be set even though we didn't enable the interrupt source
 598      * so AND it with the actual mask */
 599     unsigned long sts = GINTSTS & GINTMSK;
 600
 601     if(sts & GINTMSK_usbreset)
 602     {
 603         logf("usb-drv: bus reset");
 604
 605         /* Clear the Remote Wakeup Signalling */
 606         //DCTL &= ~DCTL_rmtwkupsig;
 607
 608         /* Flush FIFOs */
 609         flush_tx_fifos(0x10);
 610
 611         reset_endpoints();
 612
 613         /* Reset Device Address */
 614         DCFG &= ~bitm(DCFG, devadr);
 615
 616         usb_core_bus_reset();
 617     }
 618
 619     if(sts & GINTMSK_enumdone)
 620     {
 621         logf("usb-drv: enum done");
 622
 623         /* read speed */
 624         if(usb_drv_port_speed())
 625             logf("usb-drv: HS");
 626         else
 627             logf("usb-drv: FS");
 628
 629         /* fixme: change EP0 mps here */
 630         prepare_setup_ep0();
 631     }
 632
 633     if(sts & (GINTMSK_outepintr | GINTMSK_inepintr))
 634     {
 635         handle_ep_ints();
 636     }
 637
 638     if(sts & GINTMSK_disconnect)
 639     {
 640         panicf("usb-drv: disconnect");
 641         cancel_all_transfers(true);
 642         usb_enable(false);
 643     }
 644
 645     GINTSTS = GINTSTS;
 646 }
 647
 648 int usb_drv_port_speed(void)
 649 {
 650     switch(extract(DSTS, enumspd))
 651     {
 652         case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
 653             return 1;
 654         case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
 655         case DSTS_ENUMSPD_FS_PHY_48MHZ:
 656             return 0;
 657             break;
 658         case DSTS_ENUMSPD_LS_PHY_6MHZ:
 659             panicf("usb-drv: LS is not supported");
 660             return 0;
 661         default:
 662             panicf("usb-drv: wtf is this speed ?");
 663             return 0;
 664     }
 665 }
 666
 667 int usb_drv_request_endpoint(int type, int dir)
 668 {
 669     (void) type;
 670     (void) dir;
 671     logf("usb-drv: request endpoint (type=%d,dir=%s)", type, dir == USB_DIR_IN ? "IN" : "OUT");
 672     return -1;
 673 }
 674
 675 void usb_drv_release_endpoint(int ep)
 676 {
 677     //logf("usb-drv: release EP%d %s", EP_NUM(ep), EP_DIR(ep) == DIR_IN ? "IN" : "OUT");
 678     endpoints[EP_NUM(ep)][EP_DIR(ep)].active = false;
 679 }
 680
 681 void usb_drv_cancel_all_transfers()
 682 {
 683     cancel_all_transfers(false);
 684 }
 685
 686 static int usb_drv_transfer(int ep, void *ptr, int len, bool dir_in, bool blocking)
 687 {
 688     ep = EP_NUM(ep);
 689     logf("usb-drv: xfer EP%d, len=%d, dir_in=%d, blocking=%d", ep,
 690         len, dir_in, blocking);
 691
 692     volatile unsigned long *epctl = dir_in ? &DIEPCTL(ep) : &DOEPCTL(ep);
 693     volatile unsigned long *eptsiz = dir_in ? &DIEPTSIZ(ep) : &DOEPTSIZ(ep);
 694     volatile unsigned long *epdma = dir_in ? &DIEPDMA(ep) : &DOEPDMA(ep);
 695     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 696     #define DEPCTL  *epctl
 697     #define DEPTSIZ *eptsiz
 698     #define DEPDMA  *epdma
 699
 700     if(DEPCTL & DEPCTL_stall)
 701     {
 702         logf("usb-drv: cannot receive/send on a stalled endpoint");
 703         return -1;
 704     }
 705
 706     if(endpoint->busy)
 707         logf("usb-drv: EP%d %s is already busy", ep, dir_in ? "IN" : "OUT");
 708
 709     endpoint->busy = true;
 710     endpoint->len = len;
 711     endpoint->wait = blocking;
 712     DEPCTL |= DEPCTL_usbactep;
 713
 714     int mps = 64;
 715     int nb_packets = (len + mps - 1) / mps;
 716
 717     if(len == 0)
 718         DEPTSIZ = 1 << DEPTSIZ_pkcnt_bitp;
 719     else
 720         DEPTSIZ = (nb_packets << DEPTSIZ_pkcnt_bitp) | len;
 721     clean_dcache_range(ptr, len);
 722     DEPDMA = (unsigned long)ptr;
 723     DEPCTL |= DEPCTL_epena | DEPCTL_cnak;
 724
 725     /* fixme: check if endpoint was really enabled ? */
 726     if((DEPCTL & DEPCTL_epena) == 0)
 727         panicf("usb-drv: couldn't start xfer on EP%d %s", ep, dir_in ? "IN" : "OUT");
 728
 729     if(blocking)
 730         wakeup_wait(&endpoint->complete, TIMEOUT_BLOCK);
 731     if(endpoint->status != 0)
 732         return -1;
 733     return 0;
 734
 735     #undef DEPCTL
 736     #undef DEPTSIZ
 737     #undef DEPDMA
 738 }
 739
 740 int usb_drv_recv(int ep, void *ptr, int len)
 741 {
 742     return usb_drv_transfer(ep, ptr, len, false, false);
 743 }
 744
 745 int usb_drv_send(int ep, void *ptr, int len)
 746 {
 747     return usb_drv_transfer(ep, ptr, len, true, true);
 748 }
 749
 750 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 751 {
 752     return usb_drv_transfer(ep, ptr, len, true, false);
 753 }
 754
 755
 756 void usb_drv_set_test_mode(int mode)
 757 {
 758     (void) mode;
 759 }
 760
 761 void usb_drv_set_address(int address)
 762 {
 763     /* ignore it if addres is already set */
 764     if(extract(DCFG, devadr) == 0)
 765     {
 766         logf("usb-drv: set address %x", address);
 767         DCFG = (DCFG & ~bitm(DCFG, devadr)) | (address << DCFG_devadr_bitp);
 768     }
 769 }
 770
 771 void usb_drv_stall(int ep, bool stall, bool in)
 772 {
 773     (void) ep;
 774     (void) stall;
 775     (void) in;
 776     logf("usb-drv: %sstall EP%d %s", stall ? "" : "un", ep, in ? "IN" : "OUT");
 777 }
 778
 779 bool usb_drv_stalled(int ep, bool in)
 780 {
 781     (void) ep;
 782     (void) in;
 783     return true;
 784 }
 785