A tiny bit more Sansa Fuze v2 work.
[kugel-rb.git] / firmware / target / arm / as3525 / sansa-fuzev2 / lcd-fuzev2.c
blob4a5948a512c2781f1d876d52aa3d3dd754ed6b89
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2008 by Dave Chapman
11 * Copyright (C) 2010 by Thomas Martitz
13 * LCD driver for the Sansa Fuze - controller unknown
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
20 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
21 * KIND, either express or implied.
23 ****************************************************************************/
24 #include "config.h"
26 #include "cpu.h"
27 #include "lcd.h"
28 #include "file.h"
29 #include "debug.h"
30 #include "system.h"
31 #include "clock-target.h"
33 /* The controller is unknown, but some registers appear to be the same as the
34 HD66789R */
35 static bool display_on = false; /* is the display turned on? */
37 /* register defines */
38 #define R_START_OSC 0x00
39 #define R_DRV_OUTPUT_CONTROL 0x01
40 #define R_DRV_WAVEFORM_CONTROL 0x02
41 #define R_ENTRY_MODE 0x03
42 #define R_COMPARE_REG1 0x04
43 #define R_COMPARE_REG2 0x05
45 #define R_DISP_CONTROL1 0x07
46 #define R_DISP_CONTROL2 0x08
47 #define R_DISP_CONTROL3 0x09
49 #define R_FRAME_CYCLE_CONTROL 0x0b
50 #define R_EXT_DISP_IF_CONTROL 0x0c
52 #define R_POWER_CONTROL1 0x10
53 #define R_POWER_CONTROL2 0x11
54 #define R_POWER_CONTROL3 0x12
55 #define R_POWER_CONTROL4 0x13
57 #define R_RAM_ADDR_SET 0x21
58 #define R_WRITE_DATA_2_GRAM 0x22
60 #define R_GAMMA_FINE_ADJ_POS1 0x30
61 #define R_GAMMA_FINE_ADJ_POS2 0x31
62 #define R_GAMMA_FINE_ADJ_POS3 0x32
63 #define R_GAMMA_GRAD_ADJ_POS 0x33
65 #define R_GAMMA_FINE_ADJ_NEG1 0x34
66 #define R_GAMMA_FINE_ADJ_NEG2 0x35
67 #define R_GAMMA_FINE_ADJ_NEG3 0x36
68 #define R_GAMMA_GRAD_ADJ_NEG 0x37
70 #define R_GAMMA_AMP_ADJ_RES_POS 0x38
71 #define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
73 #define R_GATE_SCAN_POS 0x40
74 #define R_VERT_SCROLL_CONTROL 0x41
75 #define R_1ST_SCR_DRV_POS 0x42
76 #define R_2ND_SCR_DRV_POS 0x43
77 #define R_HORIZ_RAM_ADDR_POS 0x44
78 #define R_VERT_RAM_ADDR_POS 0x45
80 /* Flip Flag */
81 #define R_ENTRY_MODE_HORZ_NORMAL 0x7030
82 #define R_ENTRY_MODE_HORZ_FLIPPED 0x7000
83 static unsigned short r_entry_mode = R_ENTRY_MODE_HORZ_NORMAL;
84 #define R_ENTRY_MODE_VERT 0x7038
85 #define R_ENTRY_MODE_SOLID_VERT 0x1038
86 /* FIXME */
87 #define R_ENTRY_MODE_VIDEO_NORMAL 0x7038
88 #define R_ENTRY_MODE_VIDEO_FLIPPED 0x7018
90 /* Reverse Flag */
91 #define R_DISP_CONTROL_NORMAL 0x0004
92 #define R_DISP_CONTROL_REV 0x0000
93 static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL;
95 static const int xoffset = 20;
97 static inline void lcd_delay(int x)
99 do {
100 asm volatile ("nop\n");
101 } while (x--);
104 #define REG(x) (*(volatile unsigned long*)(x))
105 typedef unsigned long reg;
107 static void as3525_dbop_init(void)
109 #if 0
110 CGU_DBOP = (1<<3) | AS3525_DBOP_DIV;
112 DBOP_TIMPOL_01 = 0xe167e167;
113 DBOP_TIMPOL_23 = 0xe167006e;
115 /* short count: 16 | output data width: 16 | readstrobe line */
116 DBOP_CTRL = (1<<18|1<<12|1<<3);
118 GPIOB_AFSEL = 0xfc;
119 GPIOC_AFSEL = 0xff;
121 DBOP_TIMPOL_23 = 0x6000e;
123 /* short count: 16|enable write|output data width: 16|read strobe line */
124 DBOP_CTRL = (1<<18|1<<16|1<<12|1<<3);
125 DBOP_TIMPOL_01 = 0x6e167;
126 DBOP_TIMPOL_23 = 0xa167e06f;
128 /* TODO: The OF calls some other functions here, but maybe not important */
129 #endif
130 REG(0xC810000C) |= 0x1000; /* CCU_IO |= 1<<12 */
131 CGU_DBOP |= /*(1<<3)*/ 0x18 | AS3525_DBOP_DIV;
132 DBOP_TIMPOL_01 = 0xE12FE12F;
133 DBOP_TIMPOL_23 = 0xE12F0036;
134 DBOP_CTRL = 0x41004;
135 DBOP_TIMPOL_23 = 0x60036;
136 DBOP_CTRL = 0x51004;
137 DBOP_TIMPOL_01 = 0x60036;
138 DBOP_TIMPOL_23 = 0xA12FE037;
139 /* OF sets up dma and more after here */
142 static inline void dbop_set_mode(int mode)
144 int delay = 10;
145 if (mode == 32 && (!(DBOP_CTRL & (1<<13|1<<14))))
146 DBOP_CTRL |= (1<<13|1<<14);
147 else if (mode == 16 && (DBOP_CTRL & (1<<13|1<<14)))
148 DBOP_CTRL &= ~(1<<14|1<<13);
149 else
150 return;
151 while(delay--) asm volatile("nop");
154 static void dbop_write_data(const int16_t* p_bytes, int count)
157 const int32_t *data;
158 if ((intptr_t)p_bytes & 0x3 || count == 1)
159 { /* need to do a single 16bit write beforehand if the address is
160 * not word aligned or count is 1, switch to 16bit mode if needed */
161 dbop_set_mode(16);
162 DBOP_DOUT16 = *p_bytes++;
163 if (!(--count))
164 return;
166 /* from here, 32bit transfers are save
167 * set it to transfer 4*(outputwidth) units at a time,
168 * if bit 12 is set it only does 2 halfwords though (we never set it)
169 * switch to 32bit output if needed */
170 dbop_set_mode(32);
171 data = (int32_t*)p_bytes;
172 while (count > 1)
174 DBOP_DOUT32 = *data++;
175 count -= 2;
177 /* Wait if push fifo is full */
178 while ((DBOP_STAT & (1<<6)) != 0);
180 /* While push fifo is not empty */
181 while ((DBOP_STAT & (1<<10)) == 0);
183 /* due to the 32bit alignment requirement or uneven count,
184 * we possibly need to do a 16bit transfer at the end also */
185 if (count > 0)
186 dbop_write_data((int16_t*)data, 1);
189 static void lcd_write_cmd(short cmd)
191 #if 0
192 /* Write register */
193 DBOP_TIMPOL_23 = 0xa167006e;
194 dbop_write_data(&cmd, 1);
196 lcd_delay(4);
198 DBOP_TIMPOL_23 = 0xa167e06f;
199 #elif 1
200 volatile int i;
201 for(i=0;i<20;i++) nop;
203 int r3 = 0x2000;
204 DBOP_CTRL |= r3;
205 r3 >>= 1;
206 DBOP_CTRL &= ~r3;
207 r3 <<= 2;
208 DBOP_CTRL &= ~r3;
209 DBOP_TIMPOL_23 = 0xA12F0036;
210 cmd = swap16(cmd);
211 DBOP_DOUT16 = cmd;
213 while ((DBOP_STAT & (1<<10)) == 0);
214 for(i=0;i<20;i++) nop;
215 DBOP_TIMPOL_23 = 0xA12FE037;
216 #else
217 int i;
218 DBOP_TIMPOL_23 = 0xA12F0036;
219 for(i=0;i<20;i++) nop;
220 dbop_write_data(&cmd, 1);
221 for(i=0;i<20;i++) nop;
222 DBOP_TIMPOL_23 = 0xA12FE037;
223 #endif
226 static void lcd_write_reg(int reg, int value)
228 int16_t data = value;
229 lcd_write_cmd(reg);
230 dbop_write_data(&data, 1);
233 /*** hardware configuration ***/
235 void lcd_set_contrast(int val)
237 (void)val;
240 void lcd_set_invert_display(bool yesno)
242 r_disp_control_rev = yesno ? R_DISP_CONTROL_REV :
243 R_DISP_CONTROL_NORMAL;
245 if (display_on)
247 lcd_write_reg(R_DISP_CONTROL1, 0x0013 | r_disp_control_rev);
252 #ifdef HAVE_LCD_FLIP
253 static bool display_flipped = false;
255 /* turn the display upside down */
256 void lcd_set_flip(bool yesno)
258 display_flipped = yesno;
260 r_entry_mode = yesno ? R_ENTRY_MODE_HORZ_FLIPPED :
261 R_ENTRY_MODE_HORZ_NORMAL;
263 #endif
265 static void _display_on(void)
267 /* Initialise in the same way as the original firmare */
269 lcd_write_reg(R_DISP_CONTROL1, 0);
270 lcd_write_reg(R_POWER_CONTROL4, 0);
272 lcd_write_reg(R_POWER_CONTROL2, 0x3704);
273 lcd_write_reg(0x14, 0x1a1b);
274 lcd_write_reg(R_POWER_CONTROL1, 0x3860);
275 lcd_write_reg(R_POWER_CONTROL4, 0x40);
277 lcd_write_reg(R_POWER_CONTROL4, 0x60);
279 lcd_write_reg(R_POWER_CONTROL4, 0x70);
280 lcd_write_reg(R_DRV_OUTPUT_CONTROL, 277);
281 lcd_write_reg(R_DRV_WAVEFORM_CONTROL, (7<<8));
282 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
283 lcd_write_reg(R_DISP_CONTROL2, 0x01);
284 lcd_write_reg(R_FRAME_CYCLE_CONTROL, (1<<10));
285 lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0);
287 lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x40);
288 lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0687);
289 lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0306);
290 lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x104);
291 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0585);
292 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 255+66);
293 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0687+128);
294 lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 259);
295 lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0);
296 lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0);
298 lcd_write_reg(R_1ST_SCR_DRV_POS, (LCD_WIDTH - 1));
299 lcd_write_reg(R_2ND_SCR_DRV_POS, 0);
300 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (LCD_WIDTH - 1));
301 lcd_write_reg(R_VERT_RAM_ADDR_POS, 0);
302 lcd_write_reg(0x46, (((LCD_WIDTH - 1) + xoffset) << 8) | xoffset);
303 lcd_write_reg(0x47, (LCD_HEIGHT - 1));
304 lcd_write_reg(0x48, 0x0);
306 lcd_write_reg(R_DISP_CONTROL1, 0x11);
307 lcd_write_reg(R_DISP_CONTROL1, 0x13 | r_disp_control_rev);
309 display_on = true; /* must be done before calling lcd_update() */
310 lcd_update();
313 void lcd_init_device(void)
315 as3525_dbop_init();
317 GPIOA_DIR |= (0x20|0x1);
318 GPIOA_DIR &= ~(1<<3);
319 GPIOA_PIN(3) = 0;
320 GPIOA_PIN(0) = 1;
321 GPIOA_PIN(4) = 0;
323 CCU_IO &= ~(0x1000);
324 GPIOB_DIR |= 0x2f;
325 GPIOB_PIN(0) = 1<<0;
326 GPIOB_PIN(1) = 1<<1;
327 GPIOB_PIN(2) = 1<<2;
328 GPIOB_PIN(3) = 1<<3;
329 GPIOA_PIN(4) = 1<<4;
330 GPIOA_PIN(5) = 1<<5;
332 _display_on();
335 #if defined(HAVE_LCD_ENABLE)
336 void lcd_enable(bool on)
338 if (display_on == on)
339 return;
341 if(on)
343 lcd_write_reg(R_START_OSC, 1);
344 lcd_write_reg(R_POWER_CONTROL1, 0);
345 lcd_write_reg(R_POWER_CONTROL2, 0x3704);
346 lcd_write_reg(0x14, 0x1a1b);
347 lcd_write_reg(R_POWER_CONTROL1, 0x3860);
348 lcd_write_reg(R_POWER_CONTROL4, 0x40);
349 lcd_write_reg(R_POWER_CONTROL4, 0x60);
350 lcd_write_reg(R_POWER_CONTROL4, 112);
351 lcd_write_reg(R_DISP_CONTROL1, 0x11);
352 lcd_write_reg(R_DISP_CONTROL1, 0x13 | r_disp_control_rev);
353 display_on = true;
354 lcd_update(); /* Resync display */
355 send_event(LCD_EVENT_ACTIVATION, NULL);
356 sleep(0);
359 else
361 lcd_write_reg(R_DISP_CONTROL1, 0x22);
362 lcd_write_reg(R_DISP_CONTROL1, 0);
363 lcd_write_reg(R_POWER_CONTROL1, 1);
364 display_on = false;
367 #endif
369 #if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP)
370 bool lcd_active(void)
372 return display_on;
374 #endif
376 /*** update functions ***/
378 /* FIXME : find the datasheet for this RENESAS controller so we identify the
379 * registers used in windowing code (not present in HD66789R) */
381 /* Set horizontal window addresses */
382 static void lcd_window_x(int xmin, int xmax)
384 xmin += xoffset;
385 xmax += xoffset;
386 lcd_write_reg(R_HORIZ_RAM_ADDR_POS + 2, (xmax << 8) | xmin);
387 lcd_write_reg(R_RAM_ADDR_SET - 1, xmin);
390 /* Set vertical window addresses */
391 static void lcd_window_y(int ymin, int ymax)
393 lcd_write_reg(R_VERT_RAM_ADDR_POS + 2, ymax);
394 lcd_write_reg(R_VERT_RAM_ADDR_POS + 3, ymin);
395 lcd_write_reg(R_RAM_ADDR_SET, ymin);
398 static unsigned lcd_yuv_options = 0;
400 void lcd_yuv_set_options(unsigned options)
402 lcd_yuv_options = options;
405 /* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */
406 extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
407 int width,
408 int stride);
409 extern void lcd_write_yuv420_lines_odither(unsigned char const * const src[3],
410 int width,
411 int stride,
412 int x_screen, /* To align dither pattern */
413 int y_screen);
415 /* Performance function to blit a YUV bitmap directly to the LCD
416 * src_x, src_y, width and height should be even
417 * x, y, width and height have to be within LCD bounds
419 void lcd_blit_yuv(unsigned char * const src[3],
420 int src_x, int src_y, int stride,
421 int x, int y, int width, int height)
423 unsigned char const * yuv_src[3];
424 off_t z;
426 /* Sorry, but width and height must be >= 2 or else */
427 width &= ~1;
428 height >>= 1;
430 z = stride*src_y;
431 yuv_src[0] = src[0] + z + src_x;
432 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
433 yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
435 #ifdef HAVE_LCD_FLIP
436 lcd_write_reg(R_ENTRY_MODE,
437 display_flipped ? R_ENTRY_MODE_VIDEO_FLIPPED : R_ENTRY_MODE_VIDEO_NORMAL
439 #else
440 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VIDEO_NORMAL);
441 #endif
443 lcd_window_x(x, x + width - 1);
445 if (lcd_yuv_options & LCD_YUV_DITHER)
449 lcd_window_y(y, y + 1);
451 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
453 lcd_write_yuv420_lines_odither(yuv_src, width, stride, x, y);
454 yuv_src[0] += stride << 1; /* Skip down two luma lines */
455 yuv_src[1] += stride >> 1; /* Skip down one chroma line */
456 yuv_src[2] += stride >> 1;
457 y += 2;
459 while (--height > 0);
461 else
465 lcd_window_y(y, y + 1);
467 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
469 lcd_write_yuv420_lines(yuv_src, width, stride);
470 yuv_src[0] += stride << 1; /* Skip down two luma lines */
471 yuv_src[1] += stride >> 1; /* Skip down one chroma line */
472 yuv_src[2] += stride >> 1;
473 y += 2;
475 while (--height > 0);
479 /* Update the display.
480 This must be called after all other LCD functions that change the display. */
481 void lcd_update(void)
483 if (!display_on)
484 return;
486 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
488 lcd_window_x(0, LCD_WIDTH - 1);
489 lcd_window_y(0, LCD_HEIGHT - 1);
491 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
493 lcd_update_rect(0,0, LCD_WIDTH, LCD_HEIGHT);
494 //dbop_write_data((fb_data*)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT);
497 /* Update a fraction of the display. */
498 void lcd_update_rect(int x, int y, int width, int height)
500 const fb_data *ptr;
502 if (!display_on)
503 return;
505 /* nothing to draw? */
506 if ((width <= 0) || (height <= 0) || (x >= LCD_WIDTH) ||
507 (y >= LCD_HEIGHT) || (x + width <= 0) || (y + height <= 0))
508 return;
510 if (x < 0)
511 { /* clip left */
512 width += x;
513 x = 0;
515 if (y < 0)
516 { /* clip top */
517 height += y;
518 y = 0;
520 if (x + width > LCD_WIDTH)
521 width = LCD_WIDTH - x; /* clip right */
522 if (y + height > LCD_HEIGHT)
523 height = LCD_HEIGHT - y; /* clip bottom */
525 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
527 /* we need to make x and width even to enable 32bit transfers */
528 width = (width + (x & 1) + 1) & ~1;
529 x &= ~1;
531 lcd_window_x(x, x + width - 1);
532 lcd_window_y(y, y + height -1);
534 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
536 ptr = &lcd_framebuffer[y][x];
540 dbop_write_data(ptr, width);
541 ptr += LCD_WIDTH;
543 while (--height > 0);