1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright © 2008-2009 Rafaël Carré
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
26 #include "dma-target.h"
27 #include "clock-target.h"
33 #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
34 * i.e. 32 bits at once (size of I2SO_DATA)
35 * and the number of 32bits words has to
36 * fit in 11 bits of DMA register */
38 static unsigned char *dma_start_addr
;
39 static size_t dma_size
; /* in 4*32 bits */
40 static void dma_callback(void);
41 static int locked
= 0;
43 /* Mask the DMA interrupt */
44 void pcm_play_lock(void)
47 VIC_INT_EN_CLEAR
= INTERRUPT_DMAC
;
50 /* Unmask the DMA interrupt if enabled */
51 void pcm_play_unlock(void)
54 VIC_INT_ENABLE
= INTERRUPT_DMAC
;
57 static void play_start_pcm(void)
59 const unsigned char* addr
= dma_start_addr
;
60 size_t size
= dma_size
;
61 if(size
> MAX_TRANSFER
)
65 dma_start_addr
+= size
;
67 clean_dcache_range((void*)addr
, size
); /* force write back */
68 dma_enable_channel(1, (void*)addr
, (void*)I2SOUT_DATA
, DMA_PERI_I2SOUT
,
69 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI
, true, false, size
>> 2, DMA_S1
,
73 static void dma_callback(void)
77 register pcm_more_callback_type get_more
= pcm_callback_for_more
;
79 get_more(&dma_start_addr
, &dma_size
);
85 pcm_play_dma_stopped_callback();
91 void pcm_play_dma_start(const void *addr
, size_t size
)
94 dma_start_addr
= (unsigned char*)addr
;
96 CGU_PERI
|= CGU_I2SOUT_APB_CLOCK_ENABLE
;
104 void pcm_play_dma_stop(void)
106 dma_disable_channel(1);
111 CGU_PERI
&= ~CGU_I2SOUT_APB_CLOCK_ENABLE
;
112 CGU_AUDIO
&= ~(1<<11);
115 void pcm_play_dma_pause(bool pause
)
118 dma_disable_channel(1);
123 void pcm_play_dma_init(void)
125 CGU_PERI
|= CGU_I2SOUT_APB_CLOCK_ENABLE
;
127 I2SOUT_CONTROL
= (1<<6)|(1<<3) /* enable dma, stereo */;
132 void pcm_postinit(void)
137 static unsigned mclk_divider(void)
139 /* TODO : use a table ? */
140 return (((AS3525_MCLK_FREQ
/128) + (pcm_sampr
/2)) / pcm_sampr
) - 1;
143 void pcm_dma_apply_settings(void)
145 int cgu_audio
= CGU_AUDIO
; /* read register */
146 cgu_audio
&= ~(3 << 0); /* clear i2sout MCLK_SEL */
147 cgu_audio
|= (AS3525_MCLK_SEL
<< 0); /* set i2sout MCLK_SEL */
148 cgu_audio
&= ~(511 << 2); /* clear i2sout divider */
149 cgu_audio
|= mclk_divider() << 2; /* set new i2sout divider */
150 CGU_AUDIO
= cgu_audio
; /* write back register */
153 size_t pcm_get_bytes_waiting(void)
158 const void * pcm_play_dma_get_peak_buffer(int *count
)
160 *count
= dma_size
>> 2;
161 return (const void*)dma_start_addr
;
164 #ifdef HAVE_PCM_DMA_ADDRESS
165 void * pcm_dma_addr(void *addr
)
168 addr
= UNCACHED_ADDR(addr
);
174 /****************************************************************************
175 ** Recording DMA transfer
177 #ifdef HAVE_RECORDING
179 static int rec_locked
= 0;
180 static unsigned char *rec_dma_start_addr
;
181 static size_t rec_dma_size
;
182 static void rec_dma_callback(void);
185 void pcm_rec_lock(void)
187 if(++rec_locked
== 1)
188 VIC_INT_EN_CLEAR
= INTERRUPT_DMAC
;
192 void pcm_rec_unlock(void)
194 if(--rec_locked
== 0)
195 VIC_INT_ENABLE
= INTERRUPT_DMAC
;
199 static void rec_dma_start(void)
201 void* addr
= rec_dma_start_addr
;
202 size_t size
= rec_dma_size
;
204 /* We are limited to 8188 DMA transfers, and the recording core asks for
205 * 8192 bytes. Avoid splitting 8192 bytes transfers in 8188 + 4 */
209 rec_dma_size
-= size
;
210 rec_dma_start_addr
+= size
;
212 dma_enable_channel(1, (void*)I2SIN_DATA
, addr
, DMA_PERI_I2SIN
,
213 DMAC_FLOWCTRL_DMAC_PERI_TO_MEM
, false, true, size
>> 2, DMA_S4
,
218 static void rec_dma_callback(void)
222 register pcm_more_callback_type2 more_ready
= pcm_callback_more_ready
;
223 if (!more_ready
|| more_ready(0) < 0)
225 /* Finished recording */
227 pcm_rec_dma_stopped_callback();
236 void pcm_rec_dma_record_more(void *start
, size_t size
)
238 dump_dcache_range(start
, size
);
239 rec_dma_start_addr
= start
;
244 void pcm_rec_dma_stop(void)
246 dma_disable_channel(1);
250 I2SOUT_CONTROL
&= ~(1<<5); /* source = i2soutif fifo */
251 I2SIN_CONTROL
&= ~(1<<11); /* disable dma */
253 CGU_AUDIO
&= ~((1<<23)|(1<<11));
254 CGU_PERI
&= ~(CGU_I2SIN_APB_CLOCK_ENABLE
|CGU_I2SOUT_APB_CLOCK_ENABLE
);
258 void pcm_rec_dma_start(void *addr
, size_t size
)
260 dump_dcache_range(addr
, size
);
261 rec_dma_start_addr
= addr
;
266 CGU_PERI
|= CGU_I2SIN_APB_CLOCK_ENABLE
|CGU_I2SOUT_APB_CLOCK_ENABLE
;
267 CGU_AUDIO
|= ((1<<23)|(1<<11));
269 I2SOUT_CONTROL
|= 1<<5; /* source = loopback from i2sin fifo */
271 I2SIN_CONTROL
|= (1<<11)|(1<<5); /* enable dma, 14bits samples */
277 void pcm_rec_dma_close(void)
282 void pcm_rec_dma_init(void)
284 int cgu_audio
= CGU_AUDIO
; /* read register */
285 cgu_audio
&= ~(3 << 12); /* clear i2sin MCLK_SEL */
286 cgu_audio
|= (AS3525_MCLK_SEL
<< 12); /* set i2sin MCLK_SEL */
287 cgu_audio
&= ~(511 << 14); /* clear i2sin divider */
288 cgu_audio
|= mclk_divider() << 14; /* set new i2sin divider */
289 CGU_AUDIO
= cgu_audio
; /* write back register */
291 /* i2c clk src = I2SOUTIF, sdata src = AFE,
292 * data valid at positive edge of SCLK */
293 I2SIN_CONTROL
= (1<<2);
297 const void * pcm_rec_dma_get_peak_buffer(void)
299 return rec_dma_start_addr
;
302 #endif /* HAVE_RECORDING */