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[glibc/nacl-glibc.git] / sysdeps / unix / sysv / linux / sparc / sparc32 / register-dump.h
blob2d3fa4277354e3b429cb742f4011e8f630db3c18
1 /* Dump registers.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4 Contributed by Jakub Jelinek <jakub@redhat.com>, 1999.
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, write to the Free
18 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 02111-1307 USA. */
21 #include <sys/uio.h>
22 #include <stdio-common/_itoa.h>
24 /* We will print the register dump in this format:
26 PSR: XXXXXXXX PC: XXXXXXXX NPC: XXXXXXXX Y: XXXXXXXX
27 g0: 00000000 g1: XXXXXXXX g2: XXXXXXXX g3: XXXXXXXX
28 g4: XXXXXXXX g5: XXXXXXXX g6: XXXXXXXX g7: XXXXXXXX
29 o0: XXXXXXXX o1: XXXXXXXX o2: XXXXXXXX o3: XXXXXXXX
30 o4: XXXXXXXX o5: XXXXXXXX sp: XXXXXXXX o7: XXXXXXXX
31 l0: XXXXXXXX l1: XXXXXXXX l2: XXXXXXXX l3: XXXXXXXX
32 l4: XXXXXXXX l5: XXXXXXXX l6: XXXXXXXX l7: XXXXXXXX
33 i0: XXXXXXXX i1: XXXXXXXX i2: XXXXXXXX i3: XXXXXXXX
34 i4: XXXXXXXX i5: XXXXXXXX fp: XXXXXXXX i7: XXXXXXXX
36 followed on sun4, sun4c, sun4d, sun4m by:
38 Old mask: XXXXXXXX FSR: XXXXXXXX FPQ: XXXXXXXX
39 f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
40 f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
41 f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
42 f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
43 f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
44 f30: XXXXXXXXXXXXXXXX
46 and on sun4u by:
48 Old mask: XXXXXXXX XFSR: XXXXXXXXXXXXXXXX GSR: XX FPRS: X
49 f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
50 f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
51 f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
52 f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
53 f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
54 f30: XXXXXXXXXXXXXXXX f32: XXXXXXXXXXXXXXXX f34: XXXXXXXXXXXXXXXX
55 f36: XXXXXXXXXXXXXXXX f38: XXXXXXXXXXXXXXXX f40: XXXXXXXXXXXXXXXX
56 f42: XXXXXXXXXXXXXXXX f44: XXXXXXXXXXXXXXXX f46: XXXXXXXXXXXXXXXX
57 f48: XXXXXXXXXXXXXXXX f50: XXXXXXXXXXXXXXXX f52: XXXXXXXXXXXXXXXX
58 f54: XXXXXXXXXXXXXXXX f56: XXXXXXXXXXXXXXXX f58: XXXXXXXXXXXXXXXX
59 f60: XXXXXXXXXXXXXXXX f62: XXXXXXXXXXXXXXXX
63 static void
64 hexvalue (unsigned long int value, char *buf, size_t len)
66 char *cp = _itoa_word (value, buf + len, 16, 0);
67 while (cp > buf)
68 *--cp = '0';
71 struct __siginfo_sparc32_fpu
73 unsigned int si_float_regs[32];
74 unsigned int si_fsr;
75 unsigned int si_fpq;
77 struct __siginfo_sparc64_fpu
79 unsigned int si_float_regs[64];
80 unsigned int si_xfsr;
81 unsigned int si_fsr;
82 unsigned int _pad1;
83 unsigned int si_gsr;
84 unsigned int _pad2;
85 unsigned int si_fprs;
88 static void
89 register_dump (int fd, SIGCONTEXT ctx)
91 char regs[36][8];
92 char fregs[68][8];
93 struct iovec iov[150];
94 size_t nr = 0;
95 int i;
96 unsigned int *r = (unsigned int *)
97 ctx->si_regs.u_regs[14];
99 #define ADD_STRING(str) \
100 iov[nr].iov_base = (char *) str; \
101 iov[nr].iov_len = strlen (str); \
102 ++nr
103 #define ADD_MEM(str, len) \
104 iov[nr].iov_base = str; \
105 iov[nr].iov_len = len; \
106 ++nr
108 /* Generate strings of register contents. */
109 hexvalue (ctx->si_regs.psr, regs[0], 8);
110 hexvalue (ctx->si_regs.pc, regs[1], 8);
111 hexvalue (ctx->si_regs.npc, regs[2], 8);
112 hexvalue (ctx->si_regs.y, regs[3], 8);
113 for (i = 1; i <= 15; i++)
114 hexvalue (ctx->si_regs.u_regs[i], regs[3+i], 8);
115 for (i = 0; i <= 15; i++)
116 hexvalue (r[i], regs[19+i], 8);
117 hexvalue (ctx->si_mask, regs[35], 8);
119 /* Generate the output. */
120 ADD_STRING ("Register dump:\n\n PSR: ");
121 ADD_MEM (regs[0], 8);
122 ADD_STRING (" PC: ");
123 ADD_MEM (regs[1], 8);
124 ADD_STRING (" NPC: ");
125 ADD_MEM (regs[2], 8);
126 ADD_STRING (" Y: ");
127 ADD_MEM (regs[3], 8);
128 ADD_STRING ("\n g0: 00000000 g1: ");
129 ADD_MEM (regs[4], 8);
130 ADD_STRING (" g2: ");
131 ADD_MEM (regs[5], 8);
132 ADD_STRING (" g3: ");
133 ADD_MEM (regs[6], 8);
134 ADD_STRING ("\n g4: ");
135 ADD_MEM (regs[7], 8);
136 ADD_STRING (" g5: ");
137 ADD_MEM (regs[8], 8);
138 ADD_STRING (" g6: ");
139 ADD_MEM (regs[9], 8);
140 ADD_STRING (" g7: ");
141 ADD_MEM (regs[10], 8);
142 ADD_STRING ("\n o0: ");
143 ADD_MEM (regs[11], 8);
144 ADD_STRING (" o1: ");
145 ADD_MEM (regs[12], 8);
146 ADD_STRING (" o2: ");
147 ADD_MEM (regs[13], 8);
148 ADD_STRING (" o3: ");
149 ADD_MEM (regs[14], 8);
150 ADD_STRING ("\n o4: ");
151 ADD_MEM (regs[15], 8);
152 ADD_STRING (" o5: ");
153 ADD_MEM (regs[16], 8);
154 ADD_STRING (" sp: ");
155 ADD_MEM (regs[17], 8);
156 ADD_STRING (" o7: ");
157 ADD_MEM (regs[18], 8);
158 ADD_STRING ("\n l0: ");
159 ADD_MEM (regs[19], 8);
160 ADD_STRING (" l1: ");
161 ADD_MEM (regs[20], 8);
162 ADD_STRING (" l2: ");
163 ADD_MEM (regs[21], 8);
164 ADD_STRING (" l3: ");
165 ADD_MEM (regs[22], 8);
166 ADD_STRING ("\n l4: ");
167 ADD_MEM (regs[23], 8);
168 ADD_STRING (" l5: ");
169 ADD_MEM (regs[24], 8);
170 ADD_STRING (" l6: ");
171 ADD_MEM (regs[25], 8);
172 ADD_STRING (" l7: ");
173 ADD_MEM (regs[26], 8);
174 ADD_STRING ("\n i0: ");
175 ADD_MEM (regs[27], 8);
176 ADD_STRING (" i1: ");
177 ADD_MEM (regs[28], 8);
178 ADD_STRING (" i2: ");
179 ADD_MEM (regs[29], 8);
180 ADD_STRING (" i3: ");
181 ADD_MEM (regs[30], 8);
182 ADD_STRING ("\n i4: ");
183 ADD_MEM (regs[31], 8);
184 ADD_STRING (" i5: ");
185 ADD_MEM (regs[32], 8);
186 ADD_STRING (" fp: ");
187 ADD_MEM (regs[33], 8);
188 ADD_STRING (" i7: ");
189 ADD_MEM (regs[34], 8);
190 ADD_STRING ("\n\n Old mask: ");
191 ADD_MEM (regs[35], 8);
193 if ((ctx->si_regs.psr & 0xff000000) == 0xff000000)
195 struct __siginfo_sparc64_fpu *f;
197 f = *(struct __siginfo_sparc64_fpu **) (ctx + 1);
198 if (f != NULL)
200 for (i = 0; i < 64; i++)
201 hexvalue (f->si_float_regs[i], fregs[i], 8);
202 hexvalue (f->si_xfsr, fregs[64], 8);
203 hexvalue (f->si_fsr, fregs[65], 8);
204 hexvalue (f->si_gsr, fregs[66], 2);
205 hexvalue (f->si_fprs, fregs[67], 1);
206 ADD_STRING (" XFSR: ");
207 ADD_MEM (fregs[64], 8);
208 ADD_MEM (fregs[65], 8);
209 ADD_STRING (" GSR: ");
210 ADD_MEM (fregs[66], 2);
211 ADD_STRING (" FPRS: ");
212 ADD_MEM (fregs[67], 1);
213 ADD_STRING ("\n f0: ");
214 ADD_MEM (fregs[0], 16);
215 ADD_STRING (" f2: ");
216 ADD_MEM (fregs[2], 16);
217 ADD_STRING (" f4: ");
218 ADD_MEM (fregs[4], 16);
219 ADD_STRING ("\n f6: ");
220 ADD_MEM (fregs[6], 16);
221 ADD_STRING (" f8: ");
222 ADD_MEM (fregs[8], 16);
223 ADD_STRING (" f10: ");
224 ADD_MEM (fregs[10], 16);
225 ADD_STRING ("\n f12: ");
226 ADD_MEM (fregs[12], 16);
227 ADD_STRING (" f14: ");
228 ADD_MEM (fregs[14], 16);
229 ADD_STRING (" f16: ");
230 ADD_MEM (fregs[16], 16);
231 ADD_STRING ("\n f18: ");
232 ADD_MEM (fregs[18], 16);
233 ADD_STRING (" f20: ");
234 ADD_MEM (fregs[20], 16);
235 ADD_STRING (" f22: ");
236 ADD_MEM (fregs[22], 16);
237 ADD_STRING ("\n f24: ");
238 ADD_MEM (fregs[24], 16);
239 ADD_STRING (" f26: ");
240 ADD_MEM (fregs[26], 16);
241 ADD_STRING (" f28: ");
242 ADD_MEM (fregs[28], 16);
243 ADD_STRING ("\n f30: ");
244 ADD_MEM (fregs[30], 16);
245 ADD_STRING (" f32: ");
246 ADD_MEM (fregs[32], 16);
247 ADD_STRING (" f34: ");
248 ADD_MEM (fregs[34], 16);
249 ADD_STRING ("\n f36: ");
250 ADD_MEM (fregs[36], 16);
251 ADD_STRING (" f38: ");
252 ADD_MEM (fregs[38], 16);
253 ADD_STRING (" f40: ");
254 ADD_MEM (fregs[40], 16);
255 ADD_STRING ("\n f42: ");
256 ADD_MEM (fregs[42], 16);
257 ADD_STRING (" f44: ");
258 ADD_MEM (fregs[44], 16);
259 ADD_STRING (" f46: ");
260 ADD_MEM (fregs[46], 16);
261 ADD_STRING ("\n f48: ");
262 ADD_MEM (fregs[48], 16);
263 ADD_STRING (" f50: ");
264 ADD_MEM (fregs[50], 16);
265 ADD_STRING (" f52: ");
266 ADD_MEM (fregs[52], 16);
267 ADD_STRING ("\n f54: ");
268 ADD_MEM (fregs[54], 16);
269 ADD_STRING (" f56: ");
270 ADD_MEM (fregs[56], 16);
271 ADD_STRING (" f58: ");
272 ADD_MEM (fregs[58], 16);
273 ADD_STRING ("\n f60: ");
274 ADD_MEM (fregs[60], 16);
275 ADD_STRING (" f62: ");
276 ADD_MEM (fregs[62], 16);
279 else
281 struct __siginfo_sparc32_fpu *f;
283 f = *(struct __siginfo_sparc32_fpu **) (ctx + 1);
284 if (f != NULL)
286 for (i = 0; i < 32; i++)
287 hexvalue (f->si_float_regs[i], fregs[i], 8);
288 hexvalue (f->si_fsr, fregs[64], 8);
289 hexvalue (f->si_fpq, fregs[65], 8);
290 ADD_STRING (" FSR: ");
291 ADD_MEM (fregs[64], 8);
292 ADD_STRING (" FPQ: ");
293 ADD_MEM (fregs[65], 8);
294 ADD_STRING ("\n f0: ");
295 ADD_MEM (fregs[0], 16);
296 ADD_STRING (" f2: ");
297 ADD_MEM (fregs[2], 16);
298 ADD_STRING (" f4: ");
299 ADD_MEM (fregs[4], 16);
300 ADD_STRING ("\n f6: ");
301 ADD_MEM (fregs[6], 16);
302 ADD_STRING (" f8: ");
303 ADD_MEM (fregs[8], 16);
304 ADD_STRING (" f10: ");
305 ADD_MEM (fregs[10], 16);
306 ADD_STRING ("\n f12: ");
307 ADD_MEM (fregs[12], 16);
308 ADD_STRING (" f14: ");
309 ADD_MEM (fregs[14], 16);
310 ADD_STRING (" f16: ");
311 ADD_MEM (fregs[16], 16);
312 ADD_STRING ("\n f18: ");
313 ADD_MEM (fregs[18], 16);
314 ADD_STRING (" f20: ");
315 ADD_MEM (fregs[20], 16);
316 ADD_STRING (" f22: ");
317 ADD_MEM (fregs[22], 16);
318 ADD_STRING ("\n f24: ");
319 ADD_MEM (fregs[24], 16);
320 ADD_STRING (" f26: ");
321 ADD_MEM (fregs[26], 16);
322 ADD_STRING (" f28: ");
323 ADD_MEM (fregs[28], 16);
324 ADD_STRING ("\n f30: ");
325 ADD_MEM (fregs[30], 16);
329 ADD_STRING ("\n");
331 /* Write the stuff out. */
332 writev (fd, iov, nr);
336 #define REGISTER_DUMP register_dump (fd, ctx)