2.9
[glibc/nacl-glibc.git] / sysdeps / sparc / fpu / bits / fenv.h
blobd2ef97e0e7b464a9af7af8de002b455a57cd2abf
1 /* Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library; if not, write to the Free
16 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 02111-1307 USA. */
19 #ifndef _FENV_H
20 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
21 #endif
23 #include <bits/wordsize.h>
26 /* Define bits representing the exception. We use the bit positions
27 of the appropriate accrued exception bits from the FSR. */
28 enum
30 FE_INVALID = (1 << 9),
31 #define FE_INVALID FE_INVALID
32 FE_OVERFLOW = (1 << 8),
33 #define FE_OVERFLOW FE_OVERFLOW
34 FE_UNDERFLOW = (1 << 7),
35 #define FE_UNDERFLOW FE_UNDERFLOW
36 FE_DIVBYZERO = (1 << 6),
37 #define FE_DIVBYZERO FE_DIVBYZERO
38 FE_INEXACT = (1 << 5)
39 #define FE_INEXACT FE_INEXACT
42 #define FE_ALL_EXCEPT \
43 (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
45 /* The Sparc FPU supports all of the four defined rounding modes. We
46 use again the bit positions in the FPU control word as the values
47 for the appropriate macros. */
48 enum
50 FE_TONEAREST = (0U << 30),
51 #define FE_TONEAREST FE_TONEAREST
52 FE_TOWARDZERO = (1U << 30),
53 #define FE_TOWARDZERO FE_TOWARDZERO
54 FE_UPWARD = (2U << 30),
55 #define FE_UPWARD FE_UPWARD
56 FE_DOWNWARD = (3U << 30)
57 #define FE_DOWNWARD FE_DOWNWARD
60 #define __FE_ROUND_MASK (3U << 30)
63 /* Type representing exception flags. */
64 typedef unsigned long int fexcept_t;
67 /* Type representing floating-point environment. */
68 typedef unsigned long int fenv_t;
70 /* If the default argument is used we use this value. */
71 #define FE_DFL_ENV ((__const fenv_t *) -1)
73 #ifdef __USE_GNU
74 /* Floating-point environment where none of the exception is masked. */
75 # define FE_NOMASK_ENV ((__const fenv_t *) -2)
76 #endif
78 /* For internal use only: access the fp state register. */
79 #if __WORDSIZE == 64
80 # define __fenv_stfsr(X) __asm__ ("stx %%fsr,%0" : "=m" (X))
81 # define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X))
82 #else
83 # define __fenv_stfsr(X) __asm__ ("st %%fsr,%0" : "=m" (X))
84 # define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X))
85 #endif