sysdeps/unix/sysv/linux/alpha/ioperm.c

   1 /* Copyright (C) 1992, 1996, 1997 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3    Contributed by David Mosberger.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Library General Public License as
   7    published by the Free Software Foundation; either version 2 of the
   8    License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Library General Public License for more details.
  14
  15    You should have received a copy of the GNU Library General Public
  16    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  17    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* I/O access is restricted to ISA port space (ports 0..65535).
  21    Modern devices hopefully are sane enough not to put any performance
  22    critical registers in i/o space.
  23
  24    On the first call to ioperm() or _sethae(), the entire (E)ISA port
  25    space is mapped into the virtual address space at address io.base.
  26    mprotect() calls are then used to enable/disable access to ports.  Per
  27    page, there are PAGE_SIZE>>IO_SHIFT I/O ports (e.g., 256 ports on a
  28    Low Cost Alpha based system using 8KB pages).
  29
  30    Keep in mind that this code should be able to run in a 32bit address
  31    space.  It is therefore unreasonable to expect mmap'ing the entire
  32    sparse address space would work (e.g., the Low Cost Alpha chip has an
  33    I/O address space that's 512MB large!).  */
  34
  35 #include <errno.h>
  36 #include <fcntl.h>
  37 #include <stdio.h>
  38 #include <ctype.h>
  39 #include <stdlib.h>
  40 #include <string.h>
  41 #include <unistd.h>
  42
  43 #include <sys/types.h>
  44 #include <sys/mman.h>
  45
  46 #include <asm/page.h>
  47 #include <asm/system.h>
  48
  49 #define PATH_ALPHA_SYSTYPE      "/etc/alpha_systype"
  50 #define PATH_CPUINFO            "/proc/cpuinfo"
  51
  52 #define MAX_PORT        0x10000
  53 #define vuip            volatile unsigned int *
  54
  55 #define JENSEN_IO_BASE          (0xfffffc0300000000UL)
  56 #define JENSEN_SPARSE_MEM       (0xfffffc0200000000UL)
  57
  58 /* With respect to the I/O architecture, APECS and LCA are identical,
  59    so the following defines apply to LCA as well.  */
  60 #define APECS_IO_BASE           (0xfffffc01c0000000UL)
  61 #define APECS_SPARSE_MEM        (0xfffffc0200000000UL)
  62 #define APECS_DENSE_MEM         (0xfffffc0300000000UL)
  63
  64 /* The same holds for CIA and PYXIS.  */
  65 #define CIA_IO_BASE             (0xfffffc8580000000UL)
  66 #define CIA_SPARSE_MEM          (0xfffffc8000000000UL)
  67 #define CIA_DENSE_MEM           (0xfffffc8600000000UL)
  68
  69 #define T2_IO_BASE              (0xfffffc03a0000000UL)
  70 #define T2_SPARSE_MEM           (0xfffffc0200000000UL)
  71 #define T2_DENSE_MEM            (0xfffffc03c0000000UL)
  72
  73 typedef enum {
  74   IOSYS_UNKNOWN, IOSYS_JENSEN, IOSYS_APECS, IOSYS_CIA, IOSYS_T2
  75 } iosys_t;
  76
  77 struct ioswtch {
  78   void          (*sethae)(unsigned long int addr);
  79   void          (*outb)(unsigned char b, unsigned long int port);
  80   void          (*outw)(unsigned short b, unsigned long int port);
  81   void          (*outl)(unsigned int b, unsigned long int port);
  82   unsigned int  (*inb)(unsigned long int port);
  83   unsigned int  (*inw)(unsigned long int port);
  84   unsigned int  (*inl)(unsigned long int port);
  85 };
  86
  87 static struct platform {
  88   const char       *name;
  89   int               io_sys;
  90   iosys_t           hae_shift;
  91   unsigned long int bus_memory_base;
  92   unsigned long int sparse_bus_memory_base;
  93 } platform[] = {
  94   {"Alcor",     IOSYS_CIA,      5, CIA_DENSE_MEM,       CIA_SPARSE_MEM},
  95   {"Avanti",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  96   {"Cabriolet", IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  97   {"EB164",     IOSYS_CIA,      5, CIA_DENSE_MEM,       CIA_SPARSE_MEM},
  98   {"EB64+",     IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  99   {"EB66",      IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 100   {"EB66P",     IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 101   {"Jensen",    IOSYS_JENSEN,   7, 0,                   JENSEN_SPARSE_MEM},
 102   {"Mikasa",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 103   {"Mustang",   IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 104   {"Noname",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 105   {"Sable",     IOSYS_T2,       5, T2_DENSE_MEM,        T2_SPARSE_MEM},
 106   {"Miata",     IOSYS_CIA,      5, CIA_DENSE_MEM,       CIA_SPARSE_MEM},
 107 };
 108
 109
 110 static struct {
 111   struct hae {
 112     unsigned long int   cache;
 113     unsigned long int * reg;
 114   } hae;
 115   unsigned long int     base;
 116   struct ioswtch *      swp;
 117   unsigned long int     bus_memory_base;
 118   unsigned long int     sparse_bus_memory_base;
 119   unsigned long int     io_base;
 120   iosys_t               sys;
 121   int                   hae_shift;
 122 } io;
 123
 124 extern void __sethae (unsigned long int);       /* we can't use asm/io.h */
 125
 126
 127 static inline unsigned long int
 128 port_to_cpu_addr (unsigned long int port, iosys_t iosys, int size)
 129 {
 130   if (iosys == IOSYS_JENSEN)
 131     return (port << 7) + ((size - 1) << 5) + io.base;
 132   else
 133     return (port << 5) + ((size - 1) << 3) + io.base;
 134 }
 135
 136
 137 static inline void
 138 inline_sethae (unsigned long int addr, iosys_t iosys)
 139 {
 140   if (iosys == IOSYS_JENSEN)
 141     {
 142       /* hae on the Jensen is bits 31:25 shifted right */
 143       addr >>= 25;
 144       if (addr != io.hae.cache)
 145         {
 146           __sethae (addr);
 147           io.hae.cache = addr;
 148         }
 149     }
 150   else
 151     {
 152       unsigned long int msb;
 153
 154       /* no need to set hae if msb is 0: */
 155       msb = addr & 0xf8000000;
 156       if (msb && msb != io.hae.cache)
 157         {
 158           __sethae (msb);
 159           io.hae.cache = msb;
 160         }
 161     }
 162 }
 163
 164
 165 static inline void
 166 inline_outb (unsigned char b, unsigned long int port, iosys_t iosys)
 167 {
 168   unsigned int w;
 169   unsigned long int addr = port_to_cpu_addr (port, iosys, 1);
 170
 171   inline_sethae (0, iosys);
 172   asm ("insbl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
 173   *(vuip)addr = w;
 174   mb ();
 175 }
 176
 177
 178 static inline void
 179 inline_outw (unsigned short int b, unsigned long int port, iosys_t iosys)
 180 {
 181   unsigned int w;
 182   unsigned long int addr = port_to_cpu_addr (port, iosys, 2);
 183
 184   inline_sethae (0, iosys);
 185   asm ("inswl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
 186   *(vuip)addr = w;
 187   mb ();
 188 }
 189
 190
 191 static inline void
 192 inline_outl (unsigned int b, unsigned long int port, iosys_t iosys)
 193 {
 194   unsigned long int addr = port_to_cpu_addr (port, iosys, 4);
 195
 196   if (port >= MAX_PORT)
 197     return;
 198
 199   inline_sethae (0, iosys);
 200   *(vuip)addr = b;
 201   mb ();
 202 }
 203
 204
 205 static inline unsigned int
 206 inline_inb (unsigned long int port, iosys_t iosys)
 207 {
 208   unsigned long int result, addr = port_to_cpu_addr (port, iosys, 1);
 209
 210   inline_sethae (0, iosys);
 211   result = *(vuip) addr;
 212   result >>= (port & 3) * 8;
 213   return 0xffUL & result;
 214 }
 215
 216
 217 static inline unsigned int
 218 inline_inw (unsigned long int port, iosys_t iosys)
 219 {
 220   unsigned long int result, addr = port_to_cpu_addr (port, iosys, 2);
 221
 222   inline_sethae (0, iosys);
 223   result = *(vuip) addr;
 224   result >>= (port & 3) * 8;
 225   return 0xffffUL & result;
 226 }
 227
 228
 229 static inline unsigned int
 230 inline_inl (unsigned long int port, iosys_t iosys)
 231 {
 232   unsigned long int addr = port_to_cpu_addr (port, iosys, 4);
 233
 234   inline_sethae (0, iosys);
 235   return *(vuip) addr;
 236 }
 237
 238
 239 #define DCL_SETHAE(name, iosys)                 \
 240 static void                                             \
 241 name##_sethae (unsigned long int addr)                  \
 242 {                                                       \
 243   inline_sethae (addr, IOSYS_##iosys);                  \
 244 }
 245
 246 #define DCL_OUT(name, func, type, iosys)                \
 247 static void                                             \
 248 name##_##func (unsigned type b, unsigned long int addr) \
 249 {                                                       \
 250   inline_##func (b, addr, IOSYS_##iosys);               \
 251 }
 252
 253
 254 #define DCL_IN(name, func, iosys)                       \
 255 static unsigned int                                     \
 256 name##_##func (unsigned long int addr)                  \
 257 {                                                       \
 258   return inline_##func (addr, IOSYS_##iosys);           \
 259 }
 260
 261
 262 DCL_SETHAE(jensen, JENSEN)
 263 DCL_OUT(jensen, outb, char,  JENSEN)
 264 DCL_OUT(jensen, outw, short int, JENSEN)
 265 DCL_OUT(jensen, outl, int,   JENSEN)
 266 DCL_IN(jensen, inb, JENSEN)
 267 DCL_IN(jensen, inw, JENSEN)
 268 DCL_IN(jensen, inl, JENSEN)
 269
 270 /* The APECS functions are also used for CIA since they are
 271    identical.  */
 272
 273 DCL_SETHAE(apecs, APECS)
 274 DCL_OUT(apecs, outb, char,  APECS)
 275 DCL_OUT(apecs, outw, short int, APECS)
 276 DCL_OUT(apecs, outl, int,   APECS)
 277 DCL_IN(apecs, inb, APECS)
 278 DCL_IN(apecs, inw, APECS)
 279 DCL_IN(apecs, inl, APECS)
 280
 281 struct ioswtch ioswtch[] = {
 282   {
 283     jensen_sethae,
 284     jensen_outb, jensen_outw, jensen_outl,
 285     jensen_inb, jensen_inw, jensen_inl
 286   },
 287   {
 288     apecs_sethae,
 289     apecs_outb, apecs_outw, apecs_outl,
 290     apecs_inb, apecs_inw, apecs_inl
 291   }
 292 };
 293
 294
 295 /*
 296  * Initialize I/O system.  To determine what I/O system we're dealing
 297  * with, we first try to read the value of symlink PATH_ALPHA_SYSTYPE,
 298  * if that fails, we lookup the "system type" field in /proc/cpuinfo.
 299  * If that fails as well, we give up.
 300  *
 301  * If the value received from PATH_ALPHA_SYSTYPE begins with a number,
 302  * assume this is a previously unsupported system and the values encode,
 303  * in order, "<io_base>,<hae_shift>,<dense_base>,<sparse_base>".
 304  */
 305 static int
 306 init_iosys (void)
 307 {
 308   char systype[256];
 309   int i, n;
 310
 311   n = readlink (PATH_ALPHA_SYSTYPE, systype, sizeof (systype) - 1);
 312   if (n > 0)
 313     {
 314       systype[n] = '\0';
 315       if (isdigit (systype[0]))
 316         {
 317           if (sscanf (systype, "%li,%i,%li,%li", &io.io_base, &io.hae_shift,
 318                       &io.bus_memory_base, &io.sparse_bus_memory_base) == 4)
 319             {
 320               io.sys = IOSYS_UNKNOWN;
 321               io.swp = &ioswtch[1];
 322               return 0;
 323             }
 324           /* else we're likely going to fail with the system match below */
 325         }
 326     }
 327   else
 328     {
 329       FILE * fp;
 330
 331       fp = fopen (PATH_CPUINFO, "r");
 332       if (!fp)
 333         return -1;
 334       while ((n = fscanf (fp, "system type : %256[^\n]\n", systype))
 335              != EOF)
 336         {
 337           if (n == 1)
 338             break;
 339           else
 340             fgets (systype, 256, fp);
 341         }
 342       fclose (fp);
 343
 344       if (n == EOF)
 345         {
 346           /* this can happen if the format of /proc/cpuinfo changes...  */
 347           fprintf (stderr,
 348                    "ioperm.init_iosys(): Unable to determine system type.\n"
 349                    "\t(May need " PATH_ALPHA_SYSTYPE " symlink?)\n");
 350           __set_errno (ENODEV);
 351           return -1;
 352         }
 353     }
 354
 355   /* translate systype name into i/o system: */
 356   for (i = 0; i < sizeof (platform) / sizeof (platform[0]); ++i)
 357     {
 358       if (strcmp (platform[i].name, systype) == 0)
 359         {
 360           io.hae_shift = platform[i].hae_shift;
 361           io.bus_memory_base = platform[i].bus_memory_base;
 362           io.sparse_bus_memory_base = platform[i].sparse_bus_memory_base;
 363           io.sys = platform[i].io_sys;
 364           if (io.sys == IOSYS_JENSEN)
 365             io.swp = &ioswtch[0];
 366           else
 367             io.swp = &ioswtch[1];
 368           return 0;
 369         }
 370     }
 371
 372   /* systype is not a know platform name... */
 373   __set_errno (EINVAL);
 374   return -1;
 375 }
 376
 377
 378 int
 379 _ioperm (unsigned long int from, unsigned long int num, int turn_on)
 380 {
 381   unsigned long int addr, len;
 382   int prot;
 383
 384   if (!io.swp && init_iosys () < 0)
 385     return -1;
 386
 387   /* this test isn't as silly as it may look like; consider overflows! */
 388   if (from >= MAX_PORT || from + num > MAX_PORT)
 389     {
 390       __set_errno (EINVAL);
 391       return -1;
 392     }
 393
 394   if (turn_on)
 395     {
 396       if (!io.base)
 397         {
 398           unsigned long int base;
 399           int fd;
 400
 401           io.hae.reg   = 0;             /* not used in user-level */
 402           io.hae.cache = 0;
 403           __sethae (io.hae.cache);      /* synchronize with hw */
 404
 405           fd = open ("/dev/mem", O_RDWR);
 406           if (fd < 0)
 407             return fd;
 408
 409           switch (io.sys)
 410             {
 411             case IOSYS_UNKNOWN: base = io.io_base; break;
 412             case IOSYS_JENSEN:  base = JENSEN_IO_BASE; break;
 413             case IOSYS_APECS:   base = APECS_IO_BASE; break;
 414             case IOSYS_CIA:     base = CIA_IO_BASE; break;
 415             default:
 416               __set_errno (ENODEV);
 417               return -1;
 418             }
 419           addr  = port_to_cpu_addr (from, io.sys, 1);
 420           addr &= PAGE_MASK;
 421           len = port_to_cpu_addr (MAX_PORT, io.sys, 1) - addr;
 422           io.base =
 423             (unsigned long int) __mmap (0, len, PROT_NONE, MAP_SHARED,
 424                                         fd, base);
 425           close (fd);
 426           if ((long) io.base == -1)
 427             return -1;
 428         }
 429       prot = PROT_READ | PROT_WRITE;
 430     }
 431   else
 432     {
 433       if (!io.base)
 434         return 0;       /* never was turned on... */
 435
 436       /* turnoff access to relevant pages: */
 437       prot = PROT_NONE;
 438     }
 439   addr  = port_to_cpu_addr (from, io.sys, 1);
 440   addr &= PAGE_MASK;
 441   len = port_to_cpu_addr (from + num, io.sys, 1) - addr;
 442   return mprotect ((void *) addr, len, prot);
 443 }
 444
 445
 446 int
 447 _iopl (unsigned int level)
 448 {
 449     if (level > 3)
 450       {
 451         __set_errno (EINVAL);
 452         return -1;
 453       }
 454     if (level)
 455       {
 456         return _ioperm (0, MAX_PORT, 1);
 457       }
 458     return 0;
 459 }
 460
 461
 462 void
 463 _sethae (unsigned long int addr)
 464 {
 465   if (!io.swp && init_iosys () < 0)
 466     return;
 467
 468   io.swp->sethae (addr);
 469 }
 470
 471
 472 void
 473 _outb (unsigned char b, unsigned long int port)
 474 {
 475   if (port >= MAX_PORT)
 476     return;
 477
 478   io.swp->outb (b, port);
 479 }
 480
 481
 482 void
 483 _outw (unsigned short b, unsigned long int port)
 484 {
 485   if (port >= MAX_PORT)
 486     return;
 487
 488   io.swp->outw (b, port);
 489 }
 490
 491
 492 void
 493 _outl (unsigned int b, unsigned long int port)
 494 {
 495   if (port >= MAX_PORT)
 496     return;
 497
 498   io.swp->outl (b, port);
 499 }
 500
 501
 502 unsigned int
 503 _inb (unsigned long int port)
 504 {
 505   return io.swp->inb (port);
 506 }
 507
 508
 509 unsigned int
 510 _inw (unsigned long int port)
 511 {
 512   return io.swp->inw (port);
 513 }
 514
 515
 516 unsigned int
 517 _inl (unsigned long int port)
 518 {
 519   return io.swp->inl (port);
 520 }
 521
 522
 523 unsigned long int
 524 _bus_base(void)
 525 {
 526   if (!io.swp && init_iosys () < 0)
 527     return -1;
 528   return io.bus_memory_base;
 529 }
 530
 531 unsigned long int
 532 _bus_base_sparse(void)
 533 {
 534   if (!io.swp && init_iosys () < 0)
 535     return -1;
 536   return io.sparse_bus_memory_base;
 537 }
 538
 539 int
 540 _hae_shift(void)
 541 {
 542   if (!io.swp && init_iosys () < 0)
 543     return -1;
 544   return io.hae_shift;
 545 }
 546
 547 weak_alias (_sethae, sethae);
 548 weak_alias (_ioperm, ioperm);
 549 weak_alias (_iopl, iopl);
 550 weak_alias (_inb, inb);
 551 weak_alias (_inw, inw);
 552 weak_alias (_inl, inl);
 553 weak_alias (_outb, outb);
 554 weak_alias (_outw, outw);
 555 weak_alias (_outl, outl);
 556 weak_alias (_bus_base, bus_base);
 557 weak_alias (_bus_base_sparse, bus_base_sparse);
 558 weak_alias (_hae_shift, hae_shift);