sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h

   1 /* Copyright (C) 1998-2014 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Lesser General Public
   6    License as published by the Free Software Foundation; either
   7    version 2.1 of the License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public
  15    License along with the GNU C Library; if not, see
  16    <http://www.gnu.org/licenses/>.  */
  17
  18 #ifndef _SYS_UCONTEXT_H
  19 #define _SYS_UCONTEXT_H 1
  20
  21 #include <features.h>
  22 #include <signal.h>
  23
  24 /* We need the signal context definitions even if they are not used
  25    included in <signal.h>.  */
  26 #include <bits/sigcontext.h>
  27
  28 #if __WORDSIZE == 32
  29
  30 /* Number of general registers.  */
  31 # define NGREG  48
  32
  33 /* Container for all general registers.  */
  34 typedef unsigned long gregset_t[NGREG];
  35
  36 /* Container for floating-point registers and status */
  37 typedef struct _libc_fpstate
  38 {
  39         double fpregs[32];
  40         double fpscr;
  41         unsigned int _pad[2];
  42 } fpregset_t;
  43
  44 /* Container for Altivec/VMX registers and status.
  45    Needs to be aligned on a 16-byte boundary. */
  46 typedef struct _libc_vrstate
  47 {
  48         unsigned int vrregs[32][4];
  49         unsigned int vrsave;
  50         unsigned int _pad[2];
  51         unsigned int vscr;
  52 } vrregset_t;
  53
  54 /* Context to describe whole processor state.  */
  55 typedef struct
  56 {
  57         gregset_t gregs;
  58         fpregset_t fpregs;
  59         vrregset_t vrregs __attribute__((__aligned__(16)));
  60 } mcontext_t;
  61
  62 #else
  63
  64 /* For 64-bit kernels with Altivec support, a machine context is exactly
  65  * a sigcontext.  For older kernel (without Altivec) the sigcontext matches
  66  * the mcontext upto but not including the v_regs field.  For kernels that
  67  * don't AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the
  68  * v_regs field may not exit and should not be referenced.  The v_regd field
  69  * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC
  70  * is set in AT_HWCAP.  */
  71
  72 /* Number of general registers.  */
  73 # define NGREG  48      /* includes r0-r31, nip, msr, lr, etc.   */
  74 # define NFPREG 33      /* includes fp0-fp31 &fpscr.  */
  75 # define NVRREG 34      /* includes v0-v31, vscr, & vrsave in split vectors */
  76
  77 typedef unsigned long gregset_t[NGREG];
  78 typedef double fpregset_t[NFPREG];
  79
  80 /* Container for Altivec/VMX Vector Status and Control Register.  Only 32-bits
  81    but can only be copied to/from a 128-bit vector register.  So we allocated
  82    a whole quadword speedup save/restore.  */
  83 typedef struct _libc_vscr
  84 {
  85         unsigned int __pad[3];
  86         unsigned int vscr_word;
  87 } vscr_t;
  88
  89 /* Container for Altivec/VMX registers and status.
  90    Must to be aligned on a 16-byte boundary. */
  91 typedef struct _libc_vrstate
  92 {
  93         unsigned int    vrregs[32][4];
  94         vscr_t          vscr;
  95         unsigned int    vrsave;
  96         unsigned int    __pad[3];
  97 } vrregset_t  __attribute__((__aligned__(16)));
  98
  99 typedef struct {
 100         unsigned long   __glibc_reserved[4];
 101         int             signal;
 102         int             __pad0;
 103         unsigned long   handler;
 104         unsigned long   oldmask;
 105         struct pt_regs  *regs;
 106         gregset_t       gp_regs;
 107         fpregset_t      fp_regs;
 108 /*
 109  * To maintain compatibility with current implementations the sigcontext is
 110  * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
 111  * followed by an unstructured (vmx_reserve) field of 69 doublewords.  This
 112  * allows the array of vector registers to be quadword aligned independent of
 113  * the alignment of the containing sigcontext or ucontext. It is the
 114  * responsibility of the code setting the sigcontext to set this pointer to
 115  * either NULL (if this processor does not support the VMX feature) or the
 116  * address of the first quadword within the allocated (vmx_reserve) area.
 117  *
 118  * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually
 119  * an array of 34 quadword entries.  The entries with
 120  * indexes 0-31 contain the corresponding vector registers.  The entry with
 121  * index 32 contains the vscr as the last word (offset 12) within the
 122  * quadword.  This allows the vscr to be stored as either a quadword (since
 123  * it must be copied via a vector register to/from storage) or as a word.
 124  * The entry with index 33 contains the vrsave as the first word (offset 0)
 125  * within the quadword.
 126  */
 127         vrregset_t      *v_regs;
 128         long            vmx_reserve[NVRREG+NVRREG+1];
 129 } mcontext_t;
 130
 131 #endif
 132
 133 /* Userlevel context.  */
 134 typedef struct ucontext
 135   {
 136     unsigned long int uc_flags;
 137     struct ucontext *uc_link;
 138     stack_t uc_stack;
 139 #if __WORDSIZE == 32
 140     /*
 141      * These fields are set up this way to maximize source and
 142      * binary compatibility with code written for the old
 143      * ucontext_t definition, which didn't include space for the
 144      * registers.
 145      *
 146      * Different versions of the kernel have stored the registers on
 147      * signal delivery at different offsets from the ucontext struct.
 148      * Programs should thus use the uc_mcontext.uc_regs pointer to
 149      * find where the registers are actually stored.  The registers
 150      * will be stored within the ucontext_t struct but not necessarily
 151      * at a fixed address.  As a side-effect, this lets us achieve
 152      * 16-byte alignment for the register storage space if the
 153      * Altivec registers are to be saved, without requiring 16-byte
 154      * alignment on the whole ucontext_t.
 155      *
 156      * The uc_mcontext.regs field is included for source compatibility
 157      * with programs written against the older ucontext_t definition,
 158      * and its name should therefore not change.  The uc_pad field
 159      * is for binary compatibility with programs compiled against the
 160      * old ucontext_t; it ensures that uc_mcontext.regs and uc_sigmask
 161      * are at the same offset as previously.
 162      */
 163     int uc_pad[7];
 164     union uc_regs_ptr {
 165       struct pt_regs *regs;
 166       mcontext_t *uc_regs;
 167     } uc_mcontext;
 168     sigset_t    uc_sigmask;
 169     char uc_reg_space[sizeof(mcontext_t) + 12];  /* last for extensibility */
 170 #else /* 64-bit */
 171     sigset_t    uc_sigmask;
 172     mcontext_t  uc_mcontext;  /* last for extensibility */
 173 #endif
 174   } ucontext_t;
 175
 176 #endif /* sys/ucontext.h */