1 /* Machine-dependent ELF dynamic relocation functions. PowerPC version.
2 Copyright (C) 1995-2014 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
21 #include <sys/param.h>
24 #include <elf/dynamic-link.h>
25 #include <dl-machine.h>
28 /* The value __cache_line_size is defined in dl-sysdep.c and is initialised
29 by _dl_sysdep_start via DL_PLATFORM_INIT. */
30 extern int __cache_line_size attribute_hidden
;
33 /* Stuff for the PLT. */
34 #define PLT_INITIAL_ENTRY_WORDS 18
35 #define PLT_LONGBRANCH_ENTRY_WORDS 0
36 #define PLT_TRAMPOLINE_ENTRY_WORDS 6
37 #define PLT_DOUBLE_SIZE (1<<13)
38 #define PLT_ENTRY_START_WORDS(entry_number) \
39 (PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
40 + ((entry_number) > PLT_DOUBLE_SIZE \
41 ? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
43 #define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
45 /* Macros to build PowerPC opcode words. */
46 #define OPCODE_ADDI(rd,ra,simm) \
47 (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
48 #define OPCODE_ADDIS(rd,ra,simm) \
49 (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
50 #define OPCODE_ADD(rd,ra,rb) \
51 (0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
52 #define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
53 #define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
54 #define OPCODE_BCTR() 0x4e800420
55 #define OPCODE_LWZ(rd,d,ra) \
56 (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
57 #define OPCODE_LWZU(rd,d,ra) \
58 (0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
59 #define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
60 #define OPCODE_RLWINM(ra,rs,sh,mb,me) \
61 (0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
63 #define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
64 #define OPCODE_ADDIS_HI(rd,ra,value) \
65 OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
66 #define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
67 #define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
70 #define PPC_DCBST(where) asm volatile ("dcbst 0,%0" : : "r"(where) : "memory")
71 #define PPC_SYNC asm volatile ("sync" : : : "memory")
72 #define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
73 #define PPC_ICBI(where) asm volatile ("icbi 0,%0" : : "r"(where) : "memory")
74 #define PPC_DIE asm volatile ("tweq 0,0")
76 /* Use this when you've modified some code, but it won't be in the
77 instruction fetch queue (or when it doesn't matter if it is). */
78 #define MODIFIED_CODE_NOQUEUE(where) \
79 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
80 /* Use this when it might be in the instruction queue. */
81 #define MODIFIED_CODE(where) \
82 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
85 /* The idea here is that to conform to the ABI, we are supposed to try
86 to load dynamic objects between 0x10000 (we actually use 0x40000 as
87 the lower bound, to increase the chance of a memory reference from
88 a null pointer giving a segfault) and the program's load address;
89 this may allow us to use a branch instruction in the PLT rather
90 than a computed jump. The address is only used as a preference for
91 mmap, so if we get it wrong the worst that happens is that it gets
92 mapped somewhere else. */
95 __elf_preferred_address (struct link_map
*loader
, size_t maplength
,
96 ElfW(Addr
) mapstartpref
)
102 /* If the object has a preference, load it there! */
103 if (mapstartpref
!= 0)
106 /* Otherwise, quickly look for a suitable gap between 0x3FFFF and
107 0x70000000. 0x3FFFF is so that references off NULL pointers will
108 cause a segfault, 0x70000000 is just paranoia (it should always
109 be superseded by the program's load address). */
112 for (nsid
= 0; nsid
< DL_NNS
; ++nsid
)
113 for (l
= GL(dl_ns
)[nsid
]._ns_loaded
; l
; l
= l
->l_next
)
115 ElfW(Addr
) mapstart
, mapend
;
116 mapstart
= l
->l_map_start
& ~(GLRO(dl_pagesize
) - 1);
117 mapend
= l
->l_map_end
| (GLRO(dl_pagesize
) - 1);
118 assert (mapend
> mapstart
);
120 /* Prefer gaps below the main executable, note that l ==
121 _dl_loaded does not work for static binaries loading
123 if ((mapend
>= high
|| l
->l_type
== lt_executable
)
126 else if (mapend
>= low
&& low
>= mapstart
)
128 else if (high
>= mapend
&& mapstart
>= low
)
130 if (high
- mapend
>= mapstart
- low
)
137 high
-= 0x10000; /* Allow some room between objects. */
138 maplength
= (maplength
| (GLRO(dl_pagesize
) - 1)) + 1;
139 if (high
<= low
|| high
- low
< maplength
)
141 return high
- maplength
; /* Both high and maplength are page-aligned. */
144 /* Set up the loaded object described by L so its unrelocated PLT
145 entries will jump to the on-demand fixup code in dl-runtime.c.
146 Also install a small trampoline to be used by entries that have
147 been relocated to an address too far away for a single branch. */
149 /* There are many kinds of PLT entries:
151 (1) A direct jump to the actual routine, either a relative or
152 absolute branch. These are set up in __elf_machine_fixup_plt.
154 (2) Short lazy entries. These cover the first 8192 slots in
155 the PLT, and look like (where 'index' goes from 0 to 8191):
158 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS+1]
160 (3) Short indirect jumps. These replace (2) when a direct jump
161 wouldn't reach. They look the same except that the branch
162 is 'b &plt[PLT_LONGBRANCH_ENTRY_WORDS]'.
164 (4) Long lazy entries. These cover the slots when a short entry
165 won't fit ('index*4' overflows its field), and look like:
167 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
168 lwzu %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
169 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS]
172 (5) Long indirect jumps. These replace (4) when a direct jump
173 wouldn't reach. They look like:
175 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
176 lwz %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
180 (6) Long direct jumps. These are used when thread-safety is not
181 required. They look like:
183 lis %r12, %hi(finaladdr)
184 addi %r12, %r12, %lo(finaladdr)
189 The lazy entries, (2) and (4), are set up here in
190 __elf_machine_runtime_setup. (1), (3), and (5) are set up in
191 __elf_machine_fixup_plt. (1), (3), and (6) can also be constructed
192 in __process_machine_rela.
194 The reason for the somewhat strange construction of the long
195 entries, (4) and (5), is that we need to ensure thread-safety. For
196 (1) and (3), this is obvious because only one instruction is
197 changed and the PPC architecture guarantees that aligned stores are
198 atomic. For (5), this is more tricky. When changing (4) to (5),
199 the `b' instruction is first changed to `mtctr'; this is safe
200 and is why the `lwzu' instruction is not just a simple `addi'.
201 Once this is done, and is visible to all processors, the `lwzu' can
202 safely be changed to a `lwz'. */
204 __elf_machine_runtime_setup (struct link_map
*map
, int lazy
, int profile
)
206 if (map
->l_info
[DT_JMPREL
])
209 Elf32_Word
*plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
210 Elf32_Word num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
211 / sizeof (Elf32_Rela
));
212 Elf32_Word rel_offset_words
= PLT_DATA_START_WORDS (num_plt_entries
);
213 Elf32_Word data_words
= (Elf32_Word
) (plt
+ rel_offset_words
);
214 Elf32_Word size_modified
;
216 extern void _dl_runtime_resolve (void);
217 extern void _dl_prof_resolve (void);
219 /* Convert the index in r11 into an actual address, and get the
220 word at that address. */
221 plt
[PLT_LONGBRANCH_ENTRY_WORDS
] = OPCODE_ADDIS_HI (11, 11, data_words
);
222 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 1] = OPCODE_LWZ (11, data_words
, 11);
224 /* Call the procedure at that address. */
225 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 2] = OPCODE_MTCTR (11);
226 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 3] = OPCODE_BCTR ();
230 Elf32_Word
*tramp
= plt
+ PLT_TRAMPOLINE_ENTRY_WORDS
;
235 dlrr
= (Elf32_Word
) (profile
237 : _dl_runtime_resolve
);
238 if (profile
&& GLRO(dl_profile
) != NULL
239 && _dl_name_match_p (GLRO(dl_profile
), map
))
240 /* This is the object we are looking for. Say that we really
241 want profiling and the timers are started. */
242 GL(dl_profile_map
) = map
;
244 dlrr
= (Elf32_Word
) _dl_runtime_resolve
;
247 /* For the long entries, subtract off data_words. */
248 tramp
[0] = OPCODE_ADDIS_HI (11, 11, -data_words
);
249 tramp
[1] = OPCODE_ADDI (11, 11, -data_words
);
251 /* Multiply index of entry by 3 (in r11). */
252 tramp
[2] = OPCODE_SLWI (12, 11, 1);
253 tramp
[3] = OPCODE_ADD (11, 12, 11);
254 if (dlrr
<= 0x01fffffc || dlrr
>= 0xfe000000)
256 /* Load address of link map in r12. */
257 tramp
[4] = OPCODE_LI (12, (Elf32_Word
) map
);
258 tramp
[5] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word
) map
);
260 /* Call _dl_runtime_resolve. */
261 tramp
[6] = OPCODE_BA (dlrr
);
265 /* Get address of _dl_runtime_resolve in CTR. */
266 tramp
[4] = OPCODE_LI (12, dlrr
);
267 tramp
[5] = OPCODE_ADDIS_HI (12, 12, dlrr
);
268 tramp
[6] = OPCODE_MTCTR (12);
270 /* Load address of link map in r12. */
271 tramp
[7] = OPCODE_LI (12, (Elf32_Word
) map
);
272 tramp
[8] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word
) map
);
274 /* Call _dl_runtime_resolve. */
275 tramp
[9] = OPCODE_BCTR ();
278 /* Set up the lazy PLT entries. */
279 offset
= PLT_INITIAL_ENTRY_WORDS
;
281 while (i
< num_plt_entries
&& i
< PLT_DOUBLE_SIZE
)
283 plt
[offset
] = OPCODE_LI (11, i
* 4);
284 plt
[offset
+1] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
+ 2
290 while (i
< num_plt_entries
)
292 plt
[offset
] = OPCODE_LIS_HI (11, i
* 4 + data_words
);
293 plt
[offset
+1] = OPCODE_LWZU (12, i
* 4 + data_words
, 11);
294 plt
[offset
+2] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
297 plt
[offset
+3] = OPCODE_BCTR ();
303 /* Now, we've modified code. We need to write the changes from
304 the data cache to a second-level unified cache, then make
305 sure that stale data in the instruction cache is removed.
306 (In a multiprocessor system, the effect is more complex.)
307 Most of the PLT shouldn't be in the instruction cache, but
308 there may be a little overlap at the start and the end.
310 Assumes that dcbst and icbi apply to lines of 16 bytes or
311 more. Current known line sizes are 16, 32, and 128 bytes.
312 The following gets the __cache_line_size, when available. */
314 /* Default minimum 4 words per cache line. */
315 int line_size_words
= 4;
317 if (lazy
&& __cache_line_size
!= 0)
318 /* Convert bytes to words. */
319 line_size_words
= __cache_line_size
/ 4;
321 size_modified
= lazy
? rel_offset_words
: 6;
322 for (i
= 0; i
< size_modified
; i
+= line_size_words
)
324 PPC_DCBST (plt
+ size_modified
- 1);
327 for (i
= 0; i
< size_modified
; i
+= line_size_words
)
329 PPC_ICBI (plt
+ size_modified
- 1);
337 __elf_machine_fixup_plt (struct link_map
*map
,
338 Elf32_Addr
*reloc_addr
, Elf32_Addr finaladdr
)
340 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
341 if (delta
<< 6 >> 6 == delta
)
342 *reloc_addr
= OPCODE_B (delta
);
343 else if (finaladdr
<= 0x01fffffc || finaladdr
>= 0xfe000000)
344 *reloc_addr
= OPCODE_BA (finaladdr
);
347 Elf32_Word
*plt
, *data_words
;
348 Elf32_Word index
, offset
, num_plt_entries
;
350 num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
351 / sizeof(Elf32_Rela
));
352 plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
353 offset
= reloc_addr
- plt
;
354 index
= (offset
- PLT_INITIAL_ENTRY_WORDS
)/2;
355 data_words
= plt
+ PLT_DATA_START_WORDS (num_plt_entries
);
359 if (index
< PLT_DOUBLE_SIZE
)
361 data_words
[index
] = finaladdr
;
363 *reloc_addr
= OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
- (offset
+1))
368 index
-= (index
- PLT_DOUBLE_SIZE
)/2;
370 data_words
[index
] = finaladdr
;
373 reloc_addr
[1] = OPCODE_MTCTR (12);
374 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 1);
377 reloc_addr
[0] = OPCODE_LWZ (12,
378 (Elf32_Word
) (data_words
+ index
), 11);
381 MODIFIED_CODE (reloc_addr
);
386 _dl_reloc_overflow (struct link_map
*map
,
388 Elf32_Addr
*const reloc_addr
,
389 const Elf32_Sym
*refsym
)
393 t
= stpcpy (buffer
, name
);
394 t
= stpcpy (t
, " relocation at 0x00000000");
395 _itoa_word ((unsigned) reloc_addr
, t
, 16, 0);
400 strtab
= (const void *) D_PTR (map
, l_info
[DT_STRTAB
]);
401 t
= stpcpy (t
, " for symbol `");
402 t
= stpcpy (t
, strtab
+ refsym
->st_name
);
405 t
= stpcpy (t
, " out of range");
406 _dl_signal_error (0, map
->l_name
, NULL
, buffer
);
410 __process_machine_rela (struct link_map
*map
,
411 const Elf32_Rela
*reloc
,
412 struct link_map
*sym_map
,
413 const Elf32_Sym
*sym
,
414 const Elf32_Sym
*refsym
,
415 Elf32_Addr
*const reloc_addr
,
416 Elf32_Addr
const finaladdr
,
423 } __attribute__((__packed__
));
433 *reloc_addr
= finaladdr
;
436 case R_PPC_IRELATIVE
:
437 *reloc_addr
= ((Elf32_Addr (*) (void)) finaladdr
) ();
441 ((union unaligned
*) reloc_addr
)->u4
= finaladdr
;
445 if (__builtin_expect (finaladdr
> 0x01fffffc && finaladdr
< 0xfe000000, 0))
446 _dl_reloc_overflow (map
, "R_PPC_ADDR24", reloc_addr
, refsym
);
447 *reloc_addr
= (*reloc_addr
& 0xfc000003) | (finaladdr
& 0x3fffffc);
451 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
452 _dl_reloc_overflow (map
, "R_PPC_ADDR16", reloc_addr
, refsym
);
453 *(Elf32_Half
*) reloc_addr
= finaladdr
;
457 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
458 _dl_reloc_overflow (map
, "R_PPC_UADDR16", reloc_addr
, refsym
);
459 ((union unaligned
*) reloc_addr
)->u2
= finaladdr
;
462 case R_PPC_ADDR16_LO
:
463 *(Elf32_Half
*) reloc_addr
= finaladdr
;
466 case R_PPC_ADDR16_HI
:
467 *(Elf32_Half
*) reloc_addr
= finaladdr
>> 16;
470 case R_PPC_ADDR16_HA
:
471 *(Elf32_Half
*) reloc_addr
= (finaladdr
+ 0x8000) >> 16;
475 case R_PPC_ADDR14_BRTAKEN
:
476 case R_PPC_ADDR14_BRNTAKEN
:
477 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
478 _dl_reloc_overflow (map
, "R_PPC_ADDR14", reloc_addr
, refsym
);
479 *reloc_addr
= (*reloc_addr
& 0xffff0003) | (finaladdr
& 0xfffc);
480 if (rinfo
!= R_PPC_ADDR14
)
481 *reloc_addr
= ((*reloc_addr
& 0xffdfffff)
482 | ((rinfo
== R_PPC_ADDR14_BRTAKEN
)
483 ^ (finaladdr
>> 31)) << 21);
488 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
489 if (delta
<< 6 >> 6 != delta
)
490 _dl_reloc_overflow (map
, "R_PPC_REL24", reloc_addr
, refsym
);
491 *reloc_addr
= (*reloc_addr
& 0xfc000003) | (delta
& 0x3fffffc);
497 /* This can happen in trace mode when an object could not be
500 if (sym
->st_size
> refsym
->st_size
501 || (GLRO(dl_verbose
) && sym
->st_size
< refsym
->st_size
))
505 strtab
= (const void *) D_PTR (map
, l_info
[DT_STRTAB
]);
507 %s: Symbol `%s' has different size in shared object, consider re-linking\n",
508 RTLD_PROGNAME
, strtab
+ refsym
->st_name
);
510 memcpy (reloc_addr
, (char *) finaladdr
, MIN (sym
->st_size
,
515 *reloc_addr
= finaladdr
- (Elf32_Word
) reloc_addr
;
519 /* It used to be that elf_machine_fixup_plt was used here,
520 but that doesn't work when ld.so relocates itself
521 for the second time. On the bright side, there's
522 no need to worry about thread-safety here. */
524 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
525 if (delta
<< 6 >> 6 == delta
)
526 *reloc_addr
= OPCODE_B (delta
);
527 else if (finaladdr
<= 0x01fffffc || finaladdr
>= 0xfe000000)
528 *reloc_addr
= OPCODE_BA (finaladdr
);
531 Elf32_Word
*plt
, *data_words
;
532 Elf32_Word index
, offset
, num_plt_entries
;
534 plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
535 offset
= reloc_addr
- plt
;
537 if (offset
< PLT_DOUBLE_SIZE
*2 + PLT_INITIAL_ENTRY_WORDS
)
539 index
= (offset
- PLT_INITIAL_ENTRY_WORDS
)/2;
540 num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
541 / sizeof(Elf32_Rela
));
542 data_words
= plt
+ PLT_DATA_START_WORDS (num_plt_entries
);
543 data_words
[index
] = finaladdr
;
544 reloc_addr
[0] = OPCODE_LI (11, index
* 4);
545 reloc_addr
[1] = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
548 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 1);
552 reloc_addr
[0] = OPCODE_LIS_HI (12, finaladdr
);
553 reloc_addr
[1] = OPCODE_ADDI (12, 12, finaladdr
);
554 reloc_addr
[2] = OPCODE_MTCTR (12);
555 reloc_addr
[3] = OPCODE_BCTR ();
556 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 3);
562 #define DO_TLS_RELOC(suffix) \
563 case R_PPC_DTPREL##suffix: \
564 /* During relocation all TLS symbols are defined and used. \
565 Therefore the offset is already correct. */ \
566 if (sym_map != NULL) \
567 do_reloc##suffix ("R_PPC_DTPREL"#suffix, \
568 TLS_DTPREL_VALUE (sym, reloc)); \
570 case R_PPC_TPREL##suffix: \
571 if (sym_map != NULL) \
573 CHECK_STATIC_TLS (map, sym_map); \
574 do_reloc##suffix ("R_PPC_TPREL"#suffix, \
575 TLS_TPREL_VALUE (sym_map, sym, reloc)); \
579 inline void do_reloc16 (const char *r_name
, Elf32_Addr value
)
581 if (__builtin_expect (value
> 0x7fff && value
< 0xffff8000, 0))
582 _dl_reloc_overflow (map
, r_name
, reloc_addr
, refsym
);
583 *(Elf32_Half
*) reloc_addr
= value
;
585 inline void do_reloc16_LO (const char *r_name
, Elf32_Addr value
)
587 *(Elf32_Half
*) reloc_addr
= value
;
589 inline void do_reloc16_HI (const char *r_name
, Elf32_Addr value
)
591 *(Elf32_Half
*) reloc_addr
= value
>> 16;
593 inline void do_reloc16_HA (const char *r_name
, Elf32_Addr value
)
595 *(Elf32_Half
*) reloc_addr
= (value
+ 0x8000) >> 16;
603 _dl_reloc_bad_type (map
, rinfo
, 0);
607 MODIFIED_CODE_NOQUEUE (reloc_addr
);