1 /* Optimized memcpy implementation for PowerPC A2.
2 Copyright (C) 2010-2014 Free Software Foundation, Inc.
3 Contributed by Michael Brutman <brutman@us.ibm.com>.
4 This file is part of the GNU C Library.
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, see
18 <http://www.gnu.org/licenses/>. */
22 #define PREFETCH_AHEAD 4 /* no cache lines SRC prefetching ahead */
23 #define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */
29 dcbt 0,r4 /* Prefetch ONE SRC cacheline */
30 cmplwi cr1,r5,16 /* is size < 16 ? */
31 mr r6,r3 /* Copy dest reg to r6; */
35 /* Big copy (16 bytes or more)
37 Figure out how far to the nearest quadword boundary, or if we are
40 r3 - return value (always)
41 r4 - current source addr
43 r6 - current dest addr
46 neg r8,r3 /* LS 4 bits = # bytes to 8-byte dest bdry */
47 clrlwi r8,r8,32-4 /* align to 16byte boundary */
48 sub r7,r4,r3 /* compute offset to src from dest */
49 cmplwi cr0,r8,0 /* Were we aligned on a 16 byte bdy? */
54 /* Destination is not aligned on quadword boundary. Get us to one.
56 r3 - return value (always)
57 r4 - current source addr
59 r6 - current dest addr
60 r7 - offset to src from dest
61 r8 - number of bytes to quadword boundary
64 mtcrf 0x01,r8 /* put #bytes to boundary into cr7 */
65 subf r5,r8,r5 /* adjust remaining len */
68 lbzx r0,r7,r6 /* copy 1 byte addr */
73 lhzx r0,r7,r6 /* copy 2 byte addr */
78 lwzx r0,r7,r6 /* copy 4 byte addr */
83 lfdx r0,r7,r6 /* copy 8 byte addr */
87 add r4,r7,r6 /* update src addr */
91 /* Dest is quadword aligned now.
93 Lots of decisions to make. If we are copying less than a cache
94 line we won't be here long. If we are not on a cache line
95 boundary we need to get there. And then we need to figure out
96 how many cache lines ahead to pre-touch.
98 r3 - return value (always)
99 r4 - current source addr
101 r6 - current dest addr
111 /* Establishes GOT addressability so we can load __cache_line_size
112 from static. This value was set from the aux vector during startup. */
113 SETUP_GOT_ACCESS(r9,got_label)
114 addis r9,r9,__cache_line_size-got_label@ha
115 lwz r9,__cache_line_size-got_label@l(r9)
118 /* Load __cache_line_size from static. This value was set from the
119 aux vector during startup. */
120 lis r9,__cache_line_size@ha
121 lwz r9,__cache_line_size@l(r9)
125 bne+ cr5,L(cachelineset)
127 /* __cache_line_size not set: generic byte copy without much optimization */
128 andi. r0,r5,1 /* If length is odd copy one byte. */
129 beq L(cachelinenotset_align)
130 lbz r7,0(r4) /* Read one byte from source. */
131 addi r5,r5,-1 /* Update length. */
132 addi r4,r4,1 /* Update source pointer address. */
133 stb r7,0(r6) /* Store one byte on dest. */
134 addi r6,r6,1 /* Update dest pointer address. */
135 L(cachelinenotset_align):
136 cmpwi cr7,r5,0 /* If length is 0 return. */
138 ori r2,r2,0 /* Force a new dispatch group. */
139 L(cachelinenotset_loop):
140 addic. r5,r5,-2 /* Update length. */
141 lbz r7,0(r4) /* Load 2 bytes from source. */
143 addi r4,r4,2 /* Update source pointer address. */
144 stb r7,0(r6) /* Store 2 bytes on dest. */
146 addi r6,r6,2 /* Update dest pointer address. */
147 bne L(cachelinenotset_loop)
155 cmpw cr5,r5,r10 /* Less than a cacheline to go? */
157 neg r7,r6 /* How far to next cacheline bdy? */
159 addi r6,r6,-8 /* prepare for stdu */
161 addi r4,r4,-8 /* prepare for ldu */
164 ble+ cr5,L(lessthancacheline)
166 beq- cr0,L(big_lines) /* 128 byte line code */
171 /* More than a cacheline left to go, and using 64 byte cachelines */
173 clrlwi r7,r7,32-6 /* How far to next cacheline bdy? */
175 cmplwi cr6,r7,0 /* Are we on a cacheline bdy already? */
177 /* Reduce total len by what it takes to get to the next cache line */
179 srwi r7,r7,4 /* How many qws to get to the line bdy? */
181 /* How many full cache lines to copy after getting to a line bdy? */
184 cmplwi r10,0 /* If no full cache lines to copy ... */
185 li r11,0 /* number cachelines to copy with prefetch */
186 beq L(nocacheprefetch)
189 /* We are here because we have at least one full cache line to copy,
190 and therefore some pre-touching to do. */
192 cmplwi r10,PREFETCH_AHEAD
193 li r12,64+8 /* prefetch distance */
194 ble L(lessthanmaxprefetch)
196 /* We can only do so much pre-fetching. R11 will have the count of
197 lines left to prefetch after the initial batch of prefetches
200 subi r11,r10,PREFETCH_AHEAD
201 li r10,PREFETCH_AHEAD
203 L(lessthanmaxprefetch):
206 /* At this point r10/ctr hold the number of lines to prefetch in this
207 initial batch, and r11 holds any remainder. */
215 /* Prefetching is done, or was not needed.
217 cr6 - are we on a cacheline boundary already?
218 r7 - number of quadwords to the next cacheline boundary
224 cmplwi cr1,r5,64 /* Less than a cache line to copy? */
226 /* How many bytes are left after we copy whatever full
227 cache lines we can get? */
230 beq cr6,L(cachelinealigned)
233 /* Copy quadwords up to the next cacheline boundary */
240 bdnz L(aligntocacheline)
244 L(cachelinealigned): /* copy while cache lines */
246 blt- cr1,L(lessthancacheline) /* size <64 */
253 li r11,64*ZERO_AHEAD +8 /* DCBZ dist */
256 /* Copy whole cachelines, optimized by prefetching SRC cacheline */
257 L(loop): /* Copy aligned body */
258 dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
285 L(loop2): /* Copy aligned body */
308 L(lessthancacheline): /* Was there less than cache to do ? */
310 srwi r7,r5,4 /* divide size by 16 */
319 bdnz L(copy_remaining)
321 L(do_lt16): /* less than 16 ? */
322 cmplwi cr0,r5,0 /* copy remaining bytes (0-15) */
323 beqlr+ /* no rest to copy */
327 L(shortcopy): /* SIMPLE COPY to handle size =< 15 bytes */
331 lfdx fp9,r7,r6 /* copy 8 byte */
336 lwzx r0,r7,r6 /* copy 4 byte */
341 lhzx r0,r7,r6 /* copy 2 byte */
346 lbzx r0,r7,r6 /* copy 1 byte */
355 /* Similar to above, but for use with 128 byte lines. */
360 clrlwi r7,r7,32-7 /* How far to next cacheline bdy? */
362 cmplwi cr6,r7,0 /* Are we on a cacheline bdy already? */
364 /* Reduce total len by what it takes to get to the next cache line */
366 srwi r7,r7,4 /* How many qw to get to the line bdy? */
368 /* How many full cache lines to copy after getting to a line bdy? */
371 cmplwi r10,0 /* If no full cache lines to copy ... */
372 li r11,0 /* number cachelines to copy with prefetch */
373 beq L(nocacheprefetch_128)
376 /* We are here because we have at least one full cache line to copy,
377 and therefore some pre-touching to do. */
379 cmplwi r10,PREFETCH_AHEAD
380 li r12,128+8 /* prefetch distance */
381 ble L(lessthanmaxprefetch_128)
383 /* We can only do so much pre-fetching. R11 will have the count of
384 lines left to prefetch after the initial batch of prefetches
387 subi r11,r10,PREFETCH_AHEAD
388 li r10,PREFETCH_AHEAD
390 L(lessthanmaxprefetch_128):
393 /* At this point r10/ctr hold the number of lines to prefetch in this
394 initial batch, and r11 holds any remainder. */
399 bdnz L(prefetchSRC_128)
402 /* Prefetching is done, or was not needed.
404 cr6 - are we on a cacheline boundary already?
405 r7 - number of quadwords to the next cacheline boundary
408 L(nocacheprefetch_128):
411 cmplwi cr1,r5,128 /* Less than a cache line to copy? */
413 /* How many bytes are left after we copy whatever full
414 cache lines we can get? */
417 beq cr6,L(cachelinealigned_128)
420 /* Copy quadwords up to the next cacheline boundary */
422 L(aligntocacheline_128):
427 bdnz L(aligntocacheline_128)
430 L(cachelinealigned_128): /* copy while cache lines */
432 blt- cr1,L(lessthancacheline) /* size <128 */
439 li r11,128*ZERO_AHEAD +8 /* DCBZ dist */
442 /* Copy whole cachelines, optimized by prefetching SRC cacheline */
443 L(loop_128): /* Copy aligned body */
444 dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
487 L(loop2_128): /* Copy aligned body */
523 b L(lessthancacheline)
527 libc_hidden_builtin_def (memcpy)