ports/sysdeps/mips/math_private.h

   1 /* Internal math stuff.  MIPS version.
   2    Copyright (C) 2013-2014 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #ifndef _MATH_PRIVATE_H
  20
  21 #ifdef __mips_nan2008
  22 /* MIPS aligned to IEEE 754-2008.  */
  23 #else
  24 /* One of the few architectures where the meaning of the quiet/signaling bit is
  25    inverse to IEEE 754-2008 (as well as common practice for IEEE 754-1985).  */
  26 # define HIGH_ORDER_BIT_IS_SET_FOR_SNAN
  27 #endif
  28
  29 /* Inline functions to speed up the math library implementation.  The
  30    default versions of these routines are in generic/math_private.h
  31    and call fesetround, feholdexcept, etc.  These routines use inlined
  32    code instead.  */
  33
  34 #ifdef __mips_hard_float
  35
  36 # include <fenv.h>
  37 # include <fenv_libc.h>
  38 # include <fpu_control.h>
  39
  40 static __always_inline void
  41 libc_feholdexcept_mips (fenv_t *envp)
  42 {
  43   fpu_control_t cw;
  44
  45   /* Save the current state.  */
  46   _FPU_GETCW (cw);
  47   envp->__fp_control_register = cw;
  48
  49   /* Clear all exception enable bits and flags.  */
  50   cw &= ~(_FPU_MASK_V|_FPU_MASK_Z|_FPU_MASK_O|_FPU_MASK_U|_FPU_MASK_I|FE_ALL_EXCEPT);
  51   _FPU_SETCW (cw);
  52 }
  53 # define libc_feholdexcept libc_feholdexcept_mips
  54 # define libc_feholdexceptf libc_feholdexcept_mips
  55 # define libc_feholdexceptl libc_feholdexcept_mips
  56
  57 static __always_inline void
  58 libc_fesetround_mips (int round)
  59 {
  60   fpu_control_t cw;
  61
  62   /* Get current state.  */
  63   _FPU_GETCW (cw);
  64
  65   /* Set rounding bits.  */
  66   cw &= ~_FPU_RC_MASK;
  67   cw |= round;
  68
  69   /* Set new state.  */
  70   _FPU_SETCW (cw);
  71 }
  72 # define libc_fesetround libc_fesetround_mips
  73 # define libc_fesetroundf libc_fesetround_mips
  74 # define libc_fesetroundl libc_fesetround_mips
  75
  76 static __always_inline void
  77 libc_feholdexcept_setround_mips (fenv_t *envp, int round)
  78 {
  79   fpu_control_t cw;
  80
  81   /* Save the current state.  */
  82   _FPU_GETCW (cw);
  83   envp->__fp_control_register = cw;
  84
  85   /* Clear all exception enable bits and flags.  */
  86   cw &= ~(_FPU_MASK_V|_FPU_MASK_Z|_FPU_MASK_O|_FPU_MASK_U|_FPU_MASK_I|FE_ALL_EXCEPT);
  87
  88   /* Set rounding bits.  */
  89   cw &= ~_FPU_RC_MASK;
  90   cw |= round;
  91
  92   /* Set new state.  */
  93   _FPU_SETCW (cw);
  94 }
  95 # define libc_feholdexcept_setround libc_feholdexcept_setround_mips
  96 # define libc_feholdexcept_setroundf libc_feholdexcept_setround_mips
  97 # define libc_feholdexcept_setroundl libc_feholdexcept_setround_mips
  98
  99 static __always_inline void
 100 libc_fesetenv_mips (fenv_t *envp)
 101 {
 102   fpu_control_t cw;
 103
 104   /* Read current state to flush fpu pipeline.  */
 105   _FPU_GETCW (cw);
 106
 107   _FPU_SETCW (envp->__fp_control_register);
 108 }
 109 # define libc_fesetenv libc_fesetenv_mips
 110 # define libc_fesetenvf libc_fesetenv_mips
 111 # define libc_fesetenvl libc_fesetenv_mips
 112
 113 static __always_inline void
 114 libc_feupdateenv_mips (fenv_t *envp)
 115 {
 116   int temp;
 117
 118   /* Save current exceptions.  */
 119   _FPU_GETCW (temp);
 120
 121   /* Set flag bits (which are accumulative), and *also* set the
 122      cause bits.  The setting of the cause bits is what actually causes
 123      the hardware to generate the exception, if the corresponding enable
 124      bit is set as well.  */
 125   temp &= FE_ALL_EXCEPT;
 126   temp |= envp->__fp_control_register | (temp << CAUSE_SHIFT);
 127
 128   /* Set new state.  */
 129   _FPU_SETCW (temp);
 130 }
 131 # define libc_feupdateenv libc_feupdateenv_mips
 132 # define libc_feupdateenvf libc_feupdateenv_mips
 133 # define libc_feupdateenvl libc_feupdateenv_mips
 134
 135 #endif
 136
 137 #include_next <math_private.h>
 138
 139 #endif