sysdeps/aarch64/fpu/feenablxcpt.c

   1 /* Copyright (C) 2001-2017 Free Software Foundation, Inc.
   2
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public License as
   7    published by the Free Software Foundation; either version 2.1 of the
   8    License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #include <fenv.h>
  20 #include <fpu_control.h>
  21
  22 int
  23 feenableexcept (int excepts)
  24 {
  25   fpu_control_t fpcr;
  26   fpu_control_t fpcr_new;
  27   fpu_control_t updated_fpcr;
  28
  29   _FPU_GETCW (fpcr);
  30   excepts &= FE_ALL_EXCEPT;
  31   fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT);
  32
  33   if (fpcr != fpcr_new)
  34     {
  35       _FPU_SETCW (fpcr_new);
  36
  37       /* Trapping exceptions are optional in AArch64; the relevant enable
  38          bits in FPCR are RES0 hence the absence of support can be detected
  39          by reading back the FPCR and comparing with the required value.  */
  40       _FPU_GETCW (updated_fpcr);
  41
  42       if (fpcr_new & ~updated_fpcr)
  43         return -1;
  44     }
  45
  46   return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
  47 }