sysdeps/unix/sysv/linux/sys/serial.h

   1 /* Copyright (C) 1996 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Library General Public License as
   6    published by the Free Software Foundation; either version 2 of the
   7    License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Library General Public License for more details.
  13
  14    You should have received a copy of the GNU Library General Public
  15    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  16    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  17    Boston, MA 02111-1307, USA.  */
  18
  19 #ifndef _SYS_SERIAL_H
  20 #define _SYS_SERIAL_H   1
  21 /* Defines for PC AT serial port.  */
  22
  23 /* Serial port addresses and IRQs.  */
  24 #define PORT_0          0x03F8
  25 #define PORT_1          0x02F8
  26 #define IRQ_0           0x04
  27 #define IRQ_1           0x03
  28
  29 /* Definitions for INS8250 / 16550 chips.  */
  30
  31 /* Defined as offsets from the port address (data port).  */
  32 #define DAT     0       /* Receive/transmit data.  */
  33 #define ICR     1       /* Interrupt control register.  */
  34 #define ISR     2       /* Interrupt status register.  */
  35 #define LCR     3       /* Line control register.  */
  36 #define MCR     4       /* Modem control register.  */
  37 #define LSR     5       /* Line status register.  */
  38 #define MSR     6       /* Modem status register.  */
  39 #define DLL     0       /* Divisor latch (lsb).  */
  40 #define DLH     1       /* Divisor latch (msb).  */
  41
  42
  43 /* ICR.  */
  44 #define RIEN    0x01    /* Enable receiver interrupt.  */
  45 #define TIEN    0x02    /* Enable transmitter interrupt.  */
  46 #define SIEN    0x04    /* Enable receiver line status interrupt.  */
  47 #define MIEN    0x08    /* Enable modem status interrupt.  */
  48
  49
  50 /* ISR */
  51 #define FFTMOUT 0x0c    /* Fifo rcvr timeout.  */
  52 #define RSTATUS 0x06    /* Change in receiver line status.  */
  53 #define RxRDY   0x04    /* Receiver data available.  */
  54 #define TxRDY   0x02    /* Transmitter holding register empty.  */
  55 #define MSTATUS 0x00    /* Change in modem status.  */
  56
  57
  58 /* LCR 3
  59    Number of data bits per received/transmitted character.  */
  60 #define RXLEN   0x03
  61 #define STOP1   0x00
  62 #define STOP2   0x04
  63 #define PAREN   0x08
  64 #define PAREVN  0x10
  65 #define PARMARK 0x20
  66 #define SNDBRK  0x40
  67 #define DLAB    0x80
  68
  69 /* Baud rate definitions.  */
  70 #define ASY9600 12
  71
  72 /* Definitions for character length (data bits) in RXLEN field.  */
  73 #define BITS5   0x00
  74 #define BITS6   0x01
  75 #define BITS7   0x02
  76 #define BITS8   0x03
  77
  78 /* MCR.  */
  79 #define DTR     0x01    /* Bring up DTR.  */
  80 #define RTS     0x02    /* Bring up RTS.  */
  81 #define OUT1    0x04
  82 #define OUT2    0x08
  83 #define LOOP    0x10    /* Put chip into loopback state.  */
  84
  85
  86 /* LSR */
  87 #define RCA     0x01    /* Receive char available.  */
  88 #define OVRRUN  0x02    /* Receive overrun.  */
  89 #define PARERR  0x04    /* Parity error.  */
  90 #define FRMERR  0x08    /* Framing/CRC error.  */
  91 #define BRKDET  0x10    /* Break detected (null char + frame error).  */
  92 #define XHRE    0x20    /* Transmit holding register empty.  */
  93 #define XSRE    0x40    /* Transmit shift register empty.  */
  94
  95
  96 /* MSR */
  97 #define DCTS    0x01    /* CTS has changed state.  */
  98 #define DDSR    0x02    /* DSR has changed state.  */
  99 #define DRI     0x04    /* RI has changed state.  */
 100 #define DDCD    0x08    /* DCD has changed state.  */
 101 #define CTS     0x10    /* State of CTS.  */
 102 #define DSR     0x20    /* State of DSR.  */
 103 #define RI      0x40    /* State of RI.  */
 104 #define DCD     0x80    /* State of DCD.  */
 105
 106
 107 #define DELTAS(x)       ((x) & (DCTS | DDSR | DRI | DDCD))
 108 #define STATES(x)       ((x) (CTS | DSR | RI | DCD))
 109
 110 #endif /* sys/serial.h */