sysdeps/sparc/sparc64/soft-fp/sfp-machine.h

   1 /* Machine-dependent software floating-point definitions.
   2    Sparc64 userland (_Q_* and _Qp_*) version.
   3    Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
   4    This file is part of the GNU C Library.
   5    Contributed by Richard Henderson (rth@cygnus.com),
   6                   Jakub Jelinek (jj@ultra.linux.cz) and
   7                   David S. Miller (davem@redhat.com).
   8
   9    The GNU C Library is free software; you can redistribute it and/or
  10    modify it under the terms of the GNU Lesser General Public
  11    License as published by the Free Software Foundation; either
  12    version 2.1 of the License, or (at your option) any later version.
  13
  14    The GNU C Library is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17    Lesser General Public License for more details.
  18
  19    You should have received a copy of the GNU Lesser General Public
  20    License along with the GNU C Library; if not, write to the Free
  21    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22    02111-1307 USA.  */
  23
  24 #include <fpu_control.h>
  25 #include <fenv.h>
  26
  27 #define _FP_W_TYPE_SIZE         64
  28 #define _FP_W_TYPE              unsigned long
  29 #define _FP_WS_TYPE             signed long
  30 #define _FP_I_TYPE              long
  31
  32 /* Helper macros for _FP_MUL_MEAT_2_120_240_double.  */
  33 #define _FP_MUL_MEAT_SET_FE_TZ                                  \
  34 do {                                                            \
  35   static fpu_control_t _fetz = _FPU_RC_DOWN;                    \
  36   _FPU_SETCW(_fetz);                                            \
  37 } while (0)
  38 #ifndef _FP_MUL_MEAT_RESET_FE
  39 #define _FP_MUL_MEAT_RESET_FE _FPU_SETCW(_fcw)
  40 #endif
  41
  42 #define _FP_MUL_MEAT_S(R,X,Y)                                   \
  43   _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
  44 #define _FP_MUL_MEAT_D(R,X,Y)                                   \
  45   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
  46 #define _FP_MUL_MEAT_Q(R,X,Y)                                   \
  47   _FP_MUL_MEAT_2_120_240_double(_FP_WFRACBITS_Q,R,X,Y,          \
  48                                 _FP_MUL_MEAT_SET_FE_TZ,         \
  49                                 _FP_MUL_MEAT_RESET_FE)
  50
  51 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
  52 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
  53 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
  54
  55 #define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
  56 #define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1)
  57 #define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1
  58 #define _FP_NANSIGN_S           0
  59 #define _FP_NANSIGN_D           0
  60 #define _FP_NANSIGN_Q           0
  61
  62 #define _FP_KEEPNANFRACP 1
  63
  64 /* If one NaN is signaling and the other is not,
  65  * we choose that one, otherwise we choose Y.
  66  */
  67 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
  68   do {                                                          \
  69     if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
  70         && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
  71       {                                                         \
  72         R##_s = X##_s;                                          \
  73         _FP_FRAC_COPY_##wc(R,X);                                \
  74       }                                                         \
  75     else                                                        \
  76       {                                                         \
  77         R##_s = Y##_s;                                          \
  78         _FP_FRAC_COPY_##wc(R,Y);                                \
  79       }                                                         \
  80     R##_c = FP_CLS_NAN;                                         \
  81   } while (0)
  82
  83 /* Obtain the current rounding mode. */
  84 #ifndef FP_ROUNDMODE
  85 #define FP_ROUNDMODE    ((_fcw >> 30) & 0x3)
  86 #endif
  87
  88 /* Exception flags. */
  89 #define FP_EX_INVALID           (1 << 4)
  90 #define FP_EX_OVERFLOW          (1 << 3)
  91 #define FP_EX_UNDERFLOW         (1 << 2)
  92 #define FP_EX_DIVZERO           (1 << 1)
  93 #define FP_EX_INEXACT           (1 << 0)
  94
  95 #define _FP_DECL_EX     fpu_control_t _fcw
  96
  97 #define FP_INIT_ROUNDMODE                                       \
  98 do {                                                            \
  99   _FPU_GETCW(_fcw);                                             \
 100 } while (0)
 101
 102 #define FP_INHIBIT_RESULTS ((_fcw >> 23) & _fex)
 103
 104 /* Simulate exceptions using double arithmetics. */
 105 extern double __Qp_handle_exceptions(int exc);
 106
 107 #define FP_HANDLE_EXCEPTIONS                                    \
 108 do {                                                            \
 109   if (!_fex)                                                    \
 110     {                                                           \
 111       /* This is the common case, so we do it inline.           \
 112        * We need to clear cexc bits if any.                     \
 113        */                                                       \
 114       __asm__ __volatile__("\n"                                 \
 115 "       fzero %%f62\n"                                          \
 116 "       faddd %%f62, %%f62, %%f62\n"                            \
 117 "       " : : : "f62");                                         \
 118     }                                                           \
 119   else                                                          \
 120     {                                                           \
 121       __Qp_handle_exceptions (_fex);                            \
 122     }                                                           \
 123 } while (0)
 124
 125 #define QP_HANDLE_EXCEPTIONS(_a)                                \
 126 do {                                                            \
 127   if ((_fcw >> 23) & _fex)                                      \
 128     {                                                           \
 129       _a;                                                       \
 130     }                                                           \
 131   else                                                          \
 132     {                                                           \
 133       _fcw = (_fcw & ~0x1fL) | (_fex << 5) | _fex;              \
 134       _FPU_SETCW(_fcw);                                         \
 135     }                                                           \
 136 } while (0)
 137
 138 #define QP_NO_EXCEPTIONS                                        \
 139   __asm ("fzero %%f62\n"                                        \
 140 "         faddd %%f62, %%f62, %%f62" : : : "f62")
 141
 142 #define QP_CLOBBER "memory", "f52", "f54", "f56", "f58", "f60", "f62"
 143 #define QP_CLOBBER_CC QP_CLOBBER , "cc"