Test for stack alignment.
[glibc.git] / sysdeps / mach / hurd / hppa / bits / sigcontext.h
blob5db43fc22c9ca9f0d6cebea6bf26a72144aff97f
1 /* Machine-dependent signal context structure for GNU Hurd. HPPA version.
2 Copyright (C) 1995,97,2001 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
20 #if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H
21 # error "Never use <bits/sigcontext.h> directly; include <signal.h> instead."
22 #endif
24 #ifndef sc_parisc_thread_state
26 /* Signal handlers are actually called:
27 void handler (int sig, int code, struct sigcontext *scp); */
29 /* State of this thread when the signal was taken. */
30 struct sigcontext
32 /* These first members are machine-independent. */
34 int sc_onstack; /* Nonzero if running on sigstack. */
35 __sigset_t sc_mask; /* Blocked signals to restore. */
37 /* MiG reply port this thread is using. */
38 unsigned int sc_reply_port;
40 /* Port this thread is doing an interruptible RPC on. */
41 unsigned int sc_intr_port;
43 /* Error code associated with this signal (interpreted as `error_t'). */
44 int sc_error;
46 /* All following members are machine-dependent. The rest of this
47 structure is written to be laid out identically to a `struct
48 parisc_thread_state'. trampoline.c knows this, so it must be
49 changed if this changes. */
51 #define sc_parisc_thread_state sc_flags /* Beginning of correspondence. */
52 /* "General" registers $1..$31. */
53 unsigned int sc_regs[31];
55 /* Control registers. */
56 unsigned int sc_cr11; /* sar */
57 /* These four registers make up the PC. */
58 unsigned int iioq_head;
59 unsigned int iisq_head;
60 unsigned int iioq_tail;
61 unsigned int iisq_tail;
62 unsigned int sc_cr15;
63 unsigned int sc_cr19;
64 unsigned int sc_cr20;
65 unsigned int sc_cr21;
66 unsigned int sc_cr22; /* ipsw */
67 unsigned int sc_bsd_goto; /* unused */
68 unsigned int sc_sr4;
69 unsigned int sc_sr0;
70 unsigned int sc_sr1;
71 unsigned int sc_sr2;
72 unsigned int sc_sr3;
73 unsigned int sc_sr5;
74 unsigned int sc_sr6;
75 unsigned int sc_sr7;
76 unsigned int sc_cr0;
77 unsigned int sc_cr8;
78 unsigned int sc_cr9;
79 unsigned int sc_cr10; /* unused */
80 unsigned int sc_cr12;
81 unsigned int sc_cr13;
82 unsigned int sc_cr24; /* unused */
83 unsigned int sc_cr25; /* unused */
84 unsigned int sc_cr26; /* unused */
85 unsigned sc_mpsfu_high; /* unused */
86 unsigned sc_mpsfu_low; /* unused */
87 unsigned sc_mpsfu_ovflo; /* unused */
88 int sc_pad;
90 /* Floating point registers $f0..$f31. */
91 double sc_fpregs[32];
94 #endif /* sc_parisc_thread_state */