sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h

   1 /* Copyright (C) 1998-2017 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Lesser General Public
   6    License as published by the Free Software Foundation; either
   7    version 2.1 of the License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public
  15    License along with the GNU C Library; if not, see
  16    <http://www.gnu.org/licenses/>.  */
  17
  18 #ifndef _SYS_UCONTEXT_H
  19 #define _SYS_UCONTEXT_H 1
  20
  21 #include <features.h>
  22
  23 #include <bits/sigcontext.h>
  24 #include <bits/types/sigset_t.h>
  25 #include <bits/types/stack_t.h>
  26
  27
  28 #ifdef __USE_MISC
  29 # define __ctx(fld) fld
  30 #else
  31 # define __ctx(fld) __ ## fld
  32 #endif
  33
  34 #if __WORDSIZE == 32
  35
  36 /* Number of general registers.  */
  37 # define __NGREG        48
  38 # ifdef __USE_MISC
  39 #  define NGREG __NGREG
  40 # endif
  41
  42 /* Container for all general registers.  */
  43 typedef unsigned long gregset_t[__NGREG];
  44
  45 /* Container for floating-point registers and status */
  46 typedef struct _libc_fpstate
  47 {
  48         double __ctx(fpregs)[32];
  49         double __ctx(fpscr);
  50         unsigned int _pad[2];
  51 } fpregset_t;
  52
  53 /* Container for Altivec/VMX registers and status.
  54    Needs to be aligned on a 16-byte boundary. */
  55 typedef struct _libc_vrstate
  56 {
  57         unsigned int __ctx(vrregs)[32][4];
  58         unsigned int __ctx(vrsave);
  59         unsigned int _pad[2];
  60         unsigned int __ctx(vscr);
  61 } vrregset_t;
  62
  63 /* Context to describe whole processor state.  */
  64 typedef struct
  65 {
  66         gregset_t __ctx(gregs);
  67         fpregset_t __ctx(fpregs);
  68         vrregset_t __ctx(vrregs) __attribute__((__aligned__(16)));
  69 } mcontext_t;
  70
  71 #else
  72
  73 /* For 64-bit kernels with Altivec support, a machine context is exactly
  74  * a sigcontext.  For older kernel (without Altivec) the sigcontext matches
  75  * the mcontext upto but not including the v_regs field.  For kernels that
  76  * don't set AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the
  77  * v_regs field may not exist and should not be referenced.  The v_regd field
  78  * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC
  79  * is set in AT_HWCAP.  */
  80
  81 /* Number of general registers.  */
  82 # define __NGREG        48      /* includes r0-r31, nip, msr, lr, etc.   */
  83 # define __NFPREG       33      /* includes fp0-fp31 &fpscr.  */
  84 # define __NVRREG       34      /* includes v0-v31, vscr, & vrsave in
  85                                    split vectors */
  86 # ifdef __USE_MISC
  87 #  define NGREG __NGREG
  88 #  define NFPREG        __NFPREG
  89 #  define NVRREG        __NVRREG
  90 # endif
  91
  92 typedef unsigned long gregset_t[__NGREG];
  93 typedef double fpregset_t[__NFPREG];
  94
  95 /* Container for Altivec/VMX Vector Status and Control Register.  Only 32-bits
  96    but can only be copied to/from a 128-bit vector register.  So we allocated
  97    a whole quadword speedup save/restore.  */
  98 typedef struct _libc_vscr
  99 {
 100         unsigned int __pad[3];
 101         unsigned int __ctx(vscr_word);
 102 } vscr_t;
 103
 104 /* Container for Altivec/VMX registers and status.
 105    Must to be aligned on a 16-byte boundary. */
 106 typedef struct _libc_vrstate
 107 {
 108         unsigned int    __ctx(vrregs)[32][4];
 109         vscr_t          __ctx(vscr);
 110         unsigned int    __ctx(vrsave);
 111         unsigned int    __pad[3];
 112 } vrregset_t  __attribute__((__aligned__(16)));
 113
 114 typedef struct {
 115         unsigned long   __glibc_reserved[4];
 116         int             __ctx(signal);
 117         int             __pad0;
 118         unsigned long   __ctx(handler);
 119         unsigned long   __ctx(oldmask);
 120         struct pt_regs  *__ctx(regs);
 121         gregset_t       __ctx(gp_regs);
 122         fpregset_t      __ctx(fp_regs);
 123 /*
 124  * To maintain compatibility with current implementations the sigcontext is
 125  * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
 126  * followed by an unstructured (vmx_reserve) field of 69 doublewords.  This
 127  * allows the array of vector registers to be quadword aligned independent of
 128  * the alignment of the containing sigcontext or ucontext. It is the
 129  * responsibility of the code setting the sigcontext to set this pointer to
 130  * either NULL (if this processor does not support the VMX feature) or the
 131  * address of the first quadword within the allocated (vmx_reserve) area.
 132  *
 133  * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually
 134  * an array of 34 quadword entries.  The entries with
 135  * indexes 0-31 contain the corresponding vector registers.  The entry with
 136  * index 32 contains the vscr as the last word (offset 12) within the
 137  * quadword.  This allows the vscr to be stored as either a quadword (since
 138  * it must be copied via a vector register to/from storage) or as a word.
 139  * The entry with index 33 contains the vrsave as the first word (offset 0)
 140  * within the quadword.
 141  */
 142         vrregset_t      *__ctx(v_regs);
 143         long            __ctx(vmx_reserve)[__NVRREG+__NVRREG+1];
 144 } mcontext_t;
 145
 146 #endif
 147
 148 #undef __ctx
 149
 150 /* Userlevel context.  */
 151 typedef struct ucontext_t
 152   {
 153     unsigned long int uc_flags;
 154     struct ucontext_t *uc_link;
 155     stack_t uc_stack;
 156 #if __WORDSIZE == 32
 157     /*
 158      * These fields are set up this way to maximize source and
 159      * binary compatibility with code written for the old
 160      * ucontext_t definition, which didn't include space for the
 161      * registers.
 162      *
 163      * Different versions of the kernel have stored the registers on
 164      * signal delivery at different offsets from the ucontext struct.
 165      * Programs should thus use the uc_mcontext.uc_regs pointer to
 166      * find where the registers are actually stored.  The registers
 167      * will be stored within the ucontext_t struct but not necessarily
 168      * at a fixed address.  As a side-effect, this lets us achieve
 169      * 16-byte alignment for the register storage space if the
 170      * Altivec registers are to be saved, without requiring 16-byte
 171      * alignment on the whole ucontext_t.
 172      *
 173      * The uc_mcontext.regs field is included for source compatibility
 174      * with programs written against the older ucontext_t definition,
 175      * and its name should therefore not change.  The uc_pad field
 176      * is for binary compatibility with programs compiled against the
 177      * old ucontext_t; it ensures that uc_mcontext.regs and uc_sigmask
 178      * are at the same offset as previously.
 179      */
 180     int uc_pad[7];
 181     union uc_regs_ptr {
 182       struct pt_regs *regs;
 183       mcontext_t *uc_regs;
 184     } uc_mcontext;
 185     sigset_t    uc_sigmask;
 186     char uc_reg_space[sizeof(mcontext_t) + 12];  /* last for extensibility */
 187 #else /* 64-bit */
 188     sigset_t    uc_sigmask;
 189     mcontext_t  uc_mcontext;  /* last for extensibility */
 190 #endif
 191   } ucontext_t;
 192
 193 #endif /* sys/ucontext.h */