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Nuke unnecessary setting of ural(4)'s security registers. ural(4) only
[dragonfly/vkernel-mp.git] / sys / dev / netif / ural / if_ural.c
bloba3704b76897e7454c888281ec1dced9cc6e46492
1 /* $FreeBSD: src/sys/dev/usb/if_ural.c,v 1.10.2.8 2006/07/08 07:48:43 maxim Exp $ */
2 /* $DragonFly: src/sys/dev/netif/ural/if_ural.c,v 1.10 2007/04/23 12:35:03 sephe Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini@free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/param.h>
27 #include <sys/bus.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/mbuf.h>
32 #include <sys/rman.h>
33 #include <sys/socket.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36
37 #include <net/bpf.h>
38 #include <net/ethernet.h>
39 #include <net/if.h>
40 #include <net/if_arp.h>
41 #include <net/if_dl.h>
42 #include <net/if_media.h>
43 #include <net/ifq_var.h>
44
45 #include <netproto/802_11/ieee80211_var.h>
46 #include <netproto/802_11/ieee80211_radiotap.h>
47 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
48
49 #include <bus/usb/usb.h>
50 #include <bus/usb/usbdi.h>
51 #include <bus/usb/usbdi_util.h>
52 #include <bus/usb/usbdevs.h>
53
54 #include <dev/netif/ural/if_uralreg.h>
55 #include <dev/netif/ural/if_uralvar.h>
56
57 #ifdef USB_DEBUG
58 #define DPRINTF(x) do { if (uraldebug > 0) logprintf x; } while (0)
59 #define DPRINTFN(n, x) do { if (uraldebug >= (n)) logprintf x; } while (0)
60 int uraldebug = 0;
61 SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
62 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &uraldebug, 0,
63 "ural debug level");
64 #else
65 #define DPRINTF(x)
66 #define DPRINTFN(n, x)
67 #endif
68
69 #define URAL_RSSI(rssi) \
70 ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \
71 ((rssi) - RAL_NOISE_FLOOR + RAL_RSSI_CORR) : 0)
72
73 /* various supported device vendors/products */
74 static const struct usb_devno ural_devs[] = {
75 { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G },
76 { USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570 },
77 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
78 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54U },
79 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
80 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
81 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
82 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54G },
83 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54GP },
84 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_HU200TS },
85 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
86 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
87 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
88 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
89 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570 },
90 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2 },
91 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3 },
92 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
93 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
94 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
95 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
96 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
97 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570 },
98 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
99 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570 }
100 };
101
102 MODULE_DEPEND(ural, wlan, 1, 1, 1);
103
104 Static int ural_alloc_tx_list(struct ural_softc *);
105 Static void ural_free_tx_list(struct ural_softc *);
106 Static int ural_alloc_rx_list(struct ural_softc *);
107 Static void ural_free_rx_list(struct ural_softc *);
108 Static int ural_media_change(struct ifnet *);
109 Static void ural_next_scan(void *);
110 Static void ural_task(void *);
111 Static int ural_newstate(struct ieee80211com *,
112 enum ieee80211_state, int);
113 Static int ural_rxrate(struct ural_rx_desc *);
114 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
115 usbd_status);
116 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
117 usbd_status);
118 Static uint8_t ural_plcp_signal(int);
119 Static void ural_setup_tx_desc(struct ural_softc *,
120 struct ural_tx_desc *, uint32_t, int, int);
121 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
122 struct ieee80211_node *);
123 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
124 struct ieee80211_node *);
125 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
126 struct ieee80211_node *);
127 Static void ural_start(struct ifnet *);
128 Static void ural_watchdog(struct ifnet *);
129 Static int ural_reset(struct ifnet *);
130 Static int ural_ioctl(struct ifnet *, u_long, caddr_t,
131 struct ucred *);
132 Static void ural_set_testmode(struct ural_softc *);
133 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
134 int);
135 Static uint16_t ural_read(struct ural_softc *, uint16_t);
136 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
137 int);
138 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
139 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
140 int) __unused;
141 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
142 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
143 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
144 Static void ural_set_chan(struct ural_softc *,
145 struct ieee80211_channel *);
146 Static void ural_disable_rf_tune(struct ural_softc *);
147 Static void ural_enable_tsf_sync(struct ural_softc *);
148 Static void ural_update_slot(struct ifnet *);
149 Static void ural_set_txpreamble(struct ural_softc *);
150 Static void ural_set_basicrates(struct ural_softc *);
151 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
152 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
153 Static void ural_update_promisc(struct ural_softc *);
154 Static const char *ural_get_rf(int);
155 Static void ural_read_eeprom(struct ural_softc *);
156 Static int ural_bbp_init(struct ural_softc *);
157 Static void ural_set_txantenna(struct ural_softc *, int);
158 Static void ural_set_rxantenna(struct ural_softc *, int);
159 Static void ural_init(void *);
160 Static void ural_stop(struct ural_softc *);
161 Static void ural_stats(struct ieee80211com *,
162 struct ieee80211_node *,
163 struct ieee80211_ratectl_stats *);
164 Static void ural_stats_update(usbd_xfer_handle,
165 usbd_private_handle, usbd_status);
166 Static void ural_stats_timeout(void *);
167 Static void ural_ratectl_change(struct ieee80211com *ic, u_int,
168 u_int);
169
170 /*
171 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
172 */
173 static const struct ieee80211_rateset ural_rateset_11a =
174 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
175
176 static const struct ieee80211_rateset ural_rateset_11b =
177 { 4, { 2, 4, 11, 22 } };
178
179 static const struct ieee80211_rateset ural_rateset_11g =
180 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
181
182 /*
183 * Default values for MAC registers; values taken from the reference driver.
184 */
185 static const struct {
186 uint16_t reg;
187 uint16_t val;
188 } ural_def_mac[] = {
189 { RAL_TXRX_CSR5, 0x8c8d },
190 { RAL_TXRX_CSR6, 0x8b8a },
191 { RAL_TXRX_CSR7, 0x8687 },
192 { RAL_TXRX_CSR8, 0x0085 },
193 { RAL_MAC_CSR13, 0x1111 },
194 { RAL_MAC_CSR14, 0x1e11 },
195 { RAL_TXRX_CSR21, 0xe78f },
196 { RAL_MAC_CSR9, 0xff1d },
197 { RAL_MAC_CSR11, 0x0002 },
198 { RAL_MAC_CSR22, 0x0053 },
199 { RAL_MAC_CSR15, 0x0000 },
200 { RAL_MAC_CSR8, 0x0780 },
201 { RAL_TXRX_CSR19, 0x0000 },
202 { RAL_TXRX_CSR18, 0x005a },
203 { RAL_PHY_CSR2, 0x0000 },
204 { RAL_TXRX_CSR0, 0x1ec0 },
205 { RAL_PHY_CSR4, 0x000f }
206 };
207
208 /*
209 * Default values for BBP registers; values taken from the reference driver.
210 */
211 static const struct {
212 uint8_t reg;
213 uint8_t val;
214 } ural_def_bbp[] = {
215 { 3, 0x02 },
216 { 4, 0x19 },
217 { 14, 0x1c },
218 { 15, 0x30 },
219 { 16, 0xac },
220 { 17, 0x48 },
221 { 18, 0x18 },
222 { 19, 0xff },
223 { 20, 0x1e },
224 { 21, 0x08 },
225 { 22, 0x08 },
226 { 23, 0x08 },
227 { 24, 0x80 },
228 { 25, 0x50 },
229 { 26, 0x08 },
230 { 27, 0x23 },
231 { 30, 0x10 },
232 { 31, 0x2b },
233 { 32, 0xb9 },
234 { 34, 0x12 },
235 { 35, 0x50 },
236 { 39, 0xc4 },
237 { 40, 0x02 },
238 { 41, 0x60 },
239 { 53, 0x10 },
240 { 54, 0x18 },
241 { 56, 0x08 },
242 { 57, 0x10 },
243 { 58, 0x08 },
244 { 61, 0x60 },
245 { 62, 0x10 },
246 { 75, 0xff }
247 };
248
249 /*
250 * Default values for RF register R2 indexed by channel numbers.
251 */
252 static const uint32_t ural_rf2522_r2[] = {
253 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
254 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
255 };
256
257 static const uint32_t ural_rf2523_r2[] = {
258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
260 };
261
262 static const uint32_t ural_rf2524_r2[] = {
263 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
264 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
265 };
266
267 static const uint32_t ural_rf2525_r2[] = {
268 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
269 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
270 };
271
272 static const uint32_t ural_rf2525_hi_r2[] = {
273 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
274 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
275 };
276
277 static const uint32_t ural_rf2525e_r2[] = {
278 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
279 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
280 };
281
282 static const uint32_t ural_rf2526_hi_r2[] = {
283 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
284 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
285 };
286
287 static const uint32_t ural_rf2526_r2[] = {
288 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
289 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
290 };
291
292 /*
293 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
294 * values taken from the reference driver.
295 */
296 static const struct {
297 uint8_t chan;
298 uint32_t r1;
299 uint32_t r2;
300 uint32_t r4;
301 } ural_rf5222[] = {
302 { 1, 0x08808, 0x0044d, 0x00282 },
303 { 2, 0x08808, 0x0044e, 0x00282 },
304 { 3, 0x08808, 0x0044f, 0x00282 },
305 { 4, 0x08808, 0x00460, 0x00282 },
306 { 5, 0x08808, 0x00461, 0x00282 },
307 { 6, 0x08808, 0x00462, 0x00282 },
308 { 7, 0x08808, 0x00463, 0x00282 },
309 { 8, 0x08808, 0x00464, 0x00282 },
310 { 9, 0x08808, 0x00465, 0x00282 },
311 { 10, 0x08808, 0x00466, 0x00282 },
312 { 11, 0x08808, 0x00467, 0x00282 },
313 { 12, 0x08808, 0x00468, 0x00282 },
314 { 13, 0x08808, 0x00469, 0x00282 },
315 { 14, 0x08808, 0x0046b, 0x00286 },
316
317 { 36, 0x08804, 0x06225, 0x00287 },
318 { 40, 0x08804, 0x06226, 0x00287 },
319 { 44, 0x08804, 0x06227, 0x00287 },
320 { 48, 0x08804, 0x06228, 0x00287 },
321 { 52, 0x08804, 0x06229, 0x00287 },
322 { 56, 0x08804, 0x0622a, 0x00287 },
323 { 60, 0x08804, 0x0622b, 0x00287 },
324 { 64, 0x08804, 0x0622c, 0x00287 },
325
326 { 100, 0x08804, 0x02200, 0x00283 },
327 { 104, 0x08804, 0x02201, 0x00283 },
328 { 108, 0x08804, 0x02202, 0x00283 },
329 { 112, 0x08804, 0x02203, 0x00283 },
330 { 116, 0x08804, 0x02204, 0x00283 },
331 { 120, 0x08804, 0x02205, 0x00283 },
332 { 124, 0x08804, 0x02206, 0x00283 },
333 { 128, 0x08804, 0x02207, 0x00283 },
334 { 132, 0x08804, 0x02208, 0x00283 },
335 { 136, 0x08804, 0x02209, 0x00283 },
336 { 140, 0x08804, 0x0220a, 0x00283 },
337
338 { 149, 0x08808, 0x02429, 0x00281 },
339 { 153, 0x08808, 0x0242b, 0x00281 },
340 { 157, 0x08808, 0x0242d, 0x00281 },
341 { 161, 0x08808, 0x0242f, 0x00281 }
342 };
343
344 USB_DECLARE_DRIVER(ural);
345
346 USB_MATCH(ural)
347 {
348 USB_MATCH_START(ural, uaa);
349
350 if (uaa->iface != NULL)
351 return UMATCH_NONE;
352
353 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
354 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
355 }
356
357 USB_ATTACH(ural)
358 {
359 USB_ATTACH_START(ural, sc, uaa);
360 struct ifnet *ifp;
361 struct ieee80211com *ic = &sc->sc_ic;
362 usb_interface_descriptor_t *id;
363 usb_endpoint_descriptor_t *ed;
364 usbd_status error;
365 char devinfo[1024];
366 int i;
367
368 sc->sc_udev = uaa->device;
369 sc->sc_tx_retries = 7; /* TODO tunable/sysctl */
370
371 usbd_devinfo(sc->sc_udev, 0, devinfo);
372 USB_ATTACH_SETUP;
373
374 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
375 kprintf("%s: could not set configuration no\n",
376 USBDEVNAME(sc->sc_dev));
377 USB_ATTACH_ERROR_RETURN;
378 }
379
380 /* get the first interface handle */
381 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
382 &sc->sc_iface);
383 if (error != 0) {
384 kprintf("%s: could not get interface handle\n",
385 USBDEVNAME(sc->sc_dev));
386 USB_ATTACH_ERROR_RETURN;
387 }
388
389 /*
390 * Find endpoints.
391 */
392 id = usbd_get_interface_descriptor(sc->sc_iface);
393
394 sc->sc_rx_no = sc->sc_tx_no = -1;
395 for (i = 0; i < id->bNumEndpoints; i++) {
396 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
397 if (ed == NULL) {
398 kprintf("%s: no endpoint descriptor for %d\n",
399 USBDEVNAME(sc->sc_dev), i);
400 USB_ATTACH_ERROR_RETURN;
401 }
402
403 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
404 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
405 sc->sc_rx_no = ed->bEndpointAddress;
406 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
407 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
408 sc->sc_tx_no = ed->bEndpointAddress;
409 }
410 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
411 kprintf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev));
412 USB_ATTACH_ERROR_RETURN;
413 }
414
415 #if 0
416 mtx_init(&sc->sc_mtx, USBDEVNAME(sc->sc_dev), MTX_NETWORK_LOCK,
417 MTX_DEF | MTX_RECURSE);
418 #endif
419
420 usb_init_task(&sc->sc_task, ural_task, sc);
421 callout_init(&sc->scan_ch);
422 callout_init(&sc->stats_ch);
423
424 /* retrieve RT2570 rev. no */
425 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
426
427 /* retrieve MAC address and various other things from EEPROM */
428 ural_read_eeprom(sc);
429
430 kprintf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
431 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev));
432
433 ifp = &ic->ic_if;
434 ifp->if_softc = sc;
435 if_initname(ifp, "ural", USBDEVUNIT(sc->sc_dev));
436 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
437 ifp->if_init = ural_init;
438 ifp->if_ioctl = ural_ioctl;
439 ifp->if_start = ural_start;
440 ifp->if_watchdog = ural_watchdog;
441 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
442 ifq_set_ready(&ifp->if_snd);
443
444 ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE;
445 ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_ONOE;
446 ic->ic_ratectl.rc_st_valid_stats =
447 IEEE80211_RATECTL_STATS_PKT_NORETRY |
448 IEEE80211_RATECTL_STATS_PKT_OK |
449 IEEE80211_RATECTL_STATS_PKT_ERR |
450 IEEE80211_RATECTL_STATS_RETRIES;
451 ic->ic_ratectl.rc_st_stats = ural_stats;
452 ic->ic_ratectl.rc_st_change = ural_ratectl_change;
453
454 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
455 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
456 ic->ic_state = IEEE80211_S_INIT;
457
458 /* set device capabilities */
459 ic->ic_caps =
460 IEEE80211_C_IBSS | /* IBSS mode supported */
461 IEEE80211_C_MONITOR | /* monitor mode supported */
462 IEEE80211_C_HOSTAP | /* HostAp mode supported */
463 IEEE80211_C_TXPMGT | /* tx power management */
464 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
465 IEEE80211_C_SHSLOT | /* short slot time supported */
466 IEEE80211_C_WPA; /* 802.11i */
467
468 if (sc->rf_rev == RAL_RF_5222) {
469 /* set supported .11a rates */
470 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
471
472 /* set supported .11a channels */
473 for (i = 36; i <= 64; i += 4) {
474 ic->ic_channels[i].ic_freq =
475 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
476 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
477 }
478 for (i = 100; i <= 140; i += 4) {
479 ic->ic_channels[i].ic_freq =
480 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
481 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
482 }
483 for (i = 149; i <= 161; i += 4) {
484 ic->ic_channels[i].ic_freq =
485 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
486 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
487 }
488 }
489
490 /* set supported .11b and .11g rates */
491 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
492 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
493
494 /* set supported .11b and .11g channels (1 through 14) */
495 for (i = 1; i <= 14; i++) {
496 ic->ic_channels[i].ic_freq =
497 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
498 ic->ic_channels[i].ic_flags =
499 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
500 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
501 }
502
503 sc->sc_sifs = IEEE80211_DUR_SIFS; /* Default SIFS */
504
505 ieee80211_ifattach(ic);
506 ic->ic_reset = ural_reset;
507 /* enable s/w bmiss handling in sta mode */
508 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
509
510 /* override state transition machine */
511 sc->sc_newstate = ic->ic_newstate;
512 ic->ic_newstate = ural_newstate;
513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
514
515 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
516 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
517
518 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
519 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
520 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
521
522 sc->sc_txtap_len = sizeof sc->sc_txtapu;
523 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
524 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
525
526 if (bootverbose)
527 ieee80211_announce(ic);
528
529 USB_ATTACH_SUCCESS_RETURN;
530 }
531
532 USB_DETACH(ural)
533 {
534 USB_DETACH_START(ural, sc);
535 struct ieee80211com *ic = &sc->sc_ic;
536 struct ifnet *ifp = &ic->ic_if;
537
538 lwkt_serialize_enter(ifp->if_serializer);
539
540 callout_stop(&sc->scan_ch);
541 callout_stop(&sc->stats_ch);
542
543 sc->sc_flags |= URAL_FLAG_SYNCTASK;
544 ural_stop(sc);
545
546 lwkt_serialize_exit(ifp->if_serializer);
547
548 usb_rem_task(sc->sc_udev, &sc->sc_task);
549
550 if (sc->stats_xfer != NULL) {
551 usbd_free_xfer(sc->stats_xfer);
552 sc->stats_xfer = NULL;
553 }
554
555 if (sc->sc_rx_pipeh != NULL) {
556 usbd_abort_pipe(sc->sc_rx_pipeh);
557 usbd_close_pipe(sc->sc_rx_pipeh);
558 }
559
560 if (sc->sc_tx_pipeh != NULL) {
561 usbd_abort_pipe(sc->sc_tx_pipeh);
562 usbd_close_pipe(sc->sc_tx_pipeh);
563 }
564
565 ural_free_rx_list(sc);
566 ural_free_tx_list(sc);
567
568 bpfdetach(ifp);
569 ieee80211_ifdetach(ic);
570
571 #if 0
572 mtx_destroy(&sc->sc_mtx);
573 #endif
574
575 return 0;
576 }
577
578 Static int
579 ural_alloc_tx_list(struct ural_softc *sc)
580 {
581 struct ural_tx_data *data;
582 int i, error;
583
584 sc->tx_queued = 0;
585
586 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
587 data = &sc->tx_data[i];
588
589 data->sc = sc;
590
591 data->xfer = usbd_alloc_xfer(sc->sc_udev);
592 if (data->xfer == NULL) {
593 kprintf("%s: could not allocate tx xfer\n",
594 USBDEVNAME(sc->sc_dev));
595 error = ENOMEM;
596 goto fail;
597 }
598
599 data->buf = usbd_alloc_buffer(data->xfer,
600 RAL_TX_DESC_SIZE + MCLBYTES);
601 if (data->buf == NULL) {
602 kprintf("%s: could not allocate tx buffer\n",
603 USBDEVNAME(sc->sc_dev));
604 error = ENOMEM;
605 goto fail;
606 }
607 }
608
609 return 0;
610
611 fail: ural_free_tx_list(sc);
612 return error;
613 }
614
615 Static void
616 ural_free_tx_list(struct ural_softc *sc)
617 {
618 struct ural_tx_data *data;
619 int i;
620
621 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
622 data = &sc->tx_data[i];
623
624 if (data->xfer != NULL) {
625 usbd_free_xfer(data->xfer);
626 data->xfer = NULL;
627 }
628
629 if (data->ni != NULL) {
630 ieee80211_free_node(data->ni);
631 data->ni = NULL;
632 }
633 }
634 }
635
636 Static int
637 ural_alloc_rx_list(struct ural_softc *sc)
638 {
639 struct ural_rx_data *data;
640 int i, error;
641
642 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
643 data = &sc->rx_data[i];
644
645 data->sc = sc;
646
647 data->xfer = usbd_alloc_xfer(sc->sc_udev);
648 if (data->xfer == NULL) {
649 kprintf("%s: could not allocate rx xfer\n",
650 USBDEVNAME(sc->sc_dev));
651 error = ENOMEM;
652 goto fail;
653 }
654
655 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
656 kprintf("%s: could not allocate rx buffer\n",
657 USBDEVNAME(sc->sc_dev));
658 error = ENOMEM;
659 goto fail;
660 }
661
662 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
663 if (data->m == NULL) {
664 kprintf("%s: could not allocate rx mbuf\n",
665 USBDEVNAME(sc->sc_dev));
666 error = ENOMEM;
667 goto fail;
668 }
669
670 data->buf = mtod(data->m, uint8_t *);
671 }
672
673 return 0;
674
675 fail: ural_free_tx_list(sc);
676 return error;
677 }
678
679 Static void
680 ural_free_rx_list(struct ural_softc *sc)
681 {
682 struct ural_rx_data *data;
683 int i;
684
685 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
686 data = &sc->rx_data[i];
687
688 if (data->xfer != NULL) {
689 usbd_free_xfer(data->xfer);
690 data->xfer = NULL;
691 }
692
693 if (data->m != NULL) {
694 m_freem(data->m);
695 data->m = NULL;
696 }
697 }
698 }
699
700 Static int
701 ural_media_change(struct ifnet *ifp)
702 {
703 struct ural_softc *sc = ifp->if_softc;
704 int error;
705
706 error = ieee80211_media_change(ifp);
707 if (error != ENETRESET)
708 return error;
709
710 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
711 ural_init(sc);
712
713 return 0;
714 }
715
716 /*
717 * This function is called periodically (every 200ms) during scanning to
718 * switch from one channel to another.
719 */
720 Static void
721 ural_next_scan(void *arg)
722 {
723 struct ural_softc *sc = arg;
724 struct ieee80211com *ic = &sc->sc_ic;
725 struct ifnet *ifp = &ic->ic_if;
726
727 lwkt_serialize_enter(ifp->if_serializer);
728
729 if (ic->ic_state == IEEE80211_S_SCAN)
730 ieee80211_next_scan(ic);
731
732 lwkt_serialize_exit(ifp->if_serializer);
733 }
734
735 Static void
736 ural_task(void *xarg)
737 {
738 struct ural_softc *sc = xarg;
739 struct ieee80211com *ic = &sc->sc_ic;
740 struct ifnet *ifp = &ic->ic_if;
741 enum ieee80211_state ostate;
742 struct ieee80211_node *ni;
743 struct mbuf *m;
744 int arg;
745
746 lwkt_serialize_enter(ifp->if_serializer);
747
748 ieee80211_ratectl_newstate(ic, sc->sc_state);
749
750 ostate = ic->ic_state;
751 arg = sc->sc_newstate_arg;
752
753 switch (sc->sc_state) {
754 case IEEE80211_S_INIT:
755 if (ostate == IEEE80211_S_RUN) {
756 /* abort TSF synchronization */
757 ural_write(sc, RAL_TXRX_CSR19, 0);
758
759 /* force tx led to stop blinking */
760 ural_write(sc, RAL_MAC_CSR20, 0);
761 }
762 break;
763
764 case IEEE80211_S_SCAN:
765 ural_set_chan(sc, ic->ic_curchan);
766 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc);
767 break;
768
769 case IEEE80211_S_AUTH:
770 ural_set_chan(sc, ic->ic_curchan);
771 break;
772
773 case IEEE80211_S_ASSOC:
774 ural_set_chan(sc, ic->ic_curchan);
775 break;
776
777 case IEEE80211_S_RUN:
778 ural_set_chan(sc, ic->ic_curchan);
779
780 ni = ic->ic_bss;
781
782 lwkt_serialize_exit(ifp->if_serializer);
783
784 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
785 ural_update_slot(&ic->ic_if);
786 ural_set_txpreamble(sc);
787 ural_set_basicrates(sc);
788 ural_set_bssid(sc, ni->ni_bssid);
789 }
790
791 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
792 ic->ic_opmode == IEEE80211_M_IBSS) {
793 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
794 if (m == NULL) {
795 kprintf("%s: could not allocate beacon\n",
796 USBDEVNAME(sc->sc_dev));
797 return;
798 }
799
800 if (ural_tx_bcn(sc, m, ni) != 0) {
801 kprintf("%s: could not send beacon\n",
802 USBDEVNAME(sc->sc_dev));
803 return;
804 }
805 }
806
807 /* make tx led blink on tx (controlled by ASIC) */
808 ural_write(sc, RAL_MAC_CSR20, 1);
809
810 if (ic->ic_opmode != IEEE80211_M_MONITOR)
811 ural_enable_tsf_sync(sc);
812
813 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
814 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
815
816 lwkt_serialize_enter(ifp->if_serializer);
817
818 callout_reset(&sc->stats_ch, 4 * hz / 5,
819 ural_stats_timeout, sc);
820
821 break;
822 }
823
824 sc->sc_newstate(ic, sc->sc_state, arg);
825
826 lwkt_serialize_exit(ifp->if_serializer);
827 }
828
829 Static int
830 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
831 {
832 struct ifnet *ifp = &ic->ic_if;
833 struct ural_softc *sc = ifp->if_softc;
834
835 ASSERT_SERIALIZED(ifp->if_serializer);
836
837 callout_stop(&sc->scan_ch);
838 callout_stop(&sc->stats_ch);
839
840 /* do it in a process context */
841 sc->sc_state = nstate;
842 sc->sc_newstate_arg = arg;
843
844 lwkt_serialize_exit(ifp->if_serializer);
845 usb_rem_task(sc->sc_udev, &sc->sc_task);
846
847 if (sc->sc_flags & URAL_FLAG_SYNCTASK) {
848 usb_do_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER,
849 USBD_NO_TIMEOUT);
850 } else {
851 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
852 }
853 lwkt_serialize_enter(ifp->if_serializer);
854
855 return 0;
856 }
857
858 /* quickly determine if a given rate is CCK or OFDM */
859 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
860
861 #define RAL_ACK_SIZE (sizeof(struct ieee80211_frame_ack) + IEEE80211_FCS_LEN)
862
863 #define RAL_RXTX_TURNAROUND 5 /* us */
864
865 /*
866 * This function is only used by the Rx radiotap code.
867 */
868 Static int
869 ural_rxrate(struct ural_rx_desc *desc)
870 {
871 if (le32toh(desc->flags) & RAL_RX_OFDM) {
872 /* reverse function of ural_plcp_signal */
873 switch (desc->rate) {
874 case 0xb: return 12;
875 case 0xf: return 18;
876 case 0xa: return 24;
877 case 0xe: return 36;
878 case 0x9: return 48;
879 case 0xd: return 72;
880 case 0x8: return 96;
881 case 0xc: return 108;
882 }
883 } else {
884 if (desc->rate == 10)
885 return 2;
886 if (desc->rate == 20)
887 return 4;
888 if (desc->rate == 55)
889 return 11;
890 if (desc->rate == 110)
891 return 22;
892 }
893 return 2; /* should not get there */
894 }
895
896 Static void
897 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
898 {
899 struct ural_tx_data *data = priv;
900 struct ural_softc *sc = data->sc;
901 struct ifnet *ifp = &sc->sc_ic.ic_if;
902
903 if (status != USBD_NORMAL_COMPLETION) {
904 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
905 return;
906
907 kprintf("%s: could not transmit buffer: %s\n",
908 USBDEVNAME(sc->sc_dev), usbd_errstr(status));
909
910 if (status == USBD_STALLED)
911 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
912
913 ifp->if_oerrors++;
914 return;
915 }
916
917 lwkt_serialize_enter(ifp->if_serializer);
918
919 m_freem(data->m);
920 data->m = NULL;
921 ieee80211_free_node(data->ni);
922 data->ni = NULL;
923
924 sc->tx_queued--;
925 ifp->if_opackets++;
926
927 DPRINTFN(10, ("tx done\n"));
928
929 sc->sc_tx_timer = 0;
930 ifp->if_flags &= ~IFF_OACTIVE;
931 ural_start(ifp);
932
933 lwkt_serialize_exit(ifp->if_serializer);
934 }
935
936 Static void
937 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
938 {
939 struct ural_rx_data *data = priv;
940 struct ural_softc *sc = data->sc;
941 struct ieee80211com *ic = &sc->sc_ic;
942 struct ifnet *ifp = &ic->ic_if;
943 struct ural_rx_desc *desc;
944 struct ieee80211_frame *wh;
945 struct ieee80211_node *ni;
946 struct mbuf *mnew, *m;
947 int len;
948
949 if (status != USBD_NORMAL_COMPLETION) {
950 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
951 return;
952
953 if (status == USBD_STALLED)
954 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
955 goto skip;
956 }
957
958 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
959
960 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
961 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
962 len));
963 ifp->if_ierrors++;
964 goto skip;
965 }
966
967 /* rx descriptor is located at the end */
968 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
969
970 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
971 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
972 /*
973 * This should not happen since we did not request to receive
974 * those frames when we filled RAL_TXRX_CSR2.
975 */
976 DPRINTFN(5, ("PHY or CRC error\n"));
977 ifp->if_ierrors++;
978 goto skip;
979 }
980
981 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
982 if (mnew == NULL) {
983 ifp->if_ierrors++;
984 goto skip;
985 }
986
987 m = data->m;
988 data->m = mnew;
989 data->buf = mtod(data->m, uint8_t *);
990
991 /* finalize mbuf */
992 m->m_pkthdr.rcvif = ifp;
993 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
994
995 lwkt_serialize_enter(ifp->if_serializer);
996
997 if (sc->sc_drvbpf != NULL) {
998 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
999
1000 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; /* h/w leaves FCS */
1001 tap->wr_rate = ural_rxrate(desc);
1002 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1003 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1004 tap->wr_antenna = sc->rx_ant;
1005 tap->wr_antsignal = URAL_RSSI(desc->rssi);
1006
1007 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1008 }
1009
1010 /* trim CRC here so WEP can find its own CRC at the end of packet. */
1011 m_adj(m, -IEEE80211_CRC_LEN);
1012
1013 wh = mtod(m, struct ieee80211_frame *);
1014 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1015
1016 /* send the frame to the 802.11 layer */
1017 ieee80211_input(ic, m, ni, URAL_RSSI(desc->rssi), 0);
1018
1019 /* node is no longer needed */
1020 ieee80211_free_node(ni);
1021
1022 DPRINTFN(15, ("rx done\n"));
1023
1024 lwkt_serialize_exit(ifp->if_serializer);
1025
1026 skip: /* setup a new transfer */
1027 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1028 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1029 usbd_transfer(xfer);
1030 }
1031
1032 Static uint8_t
1033 ural_plcp_signal(int rate)
1034 {
1035 switch (rate) {
1036 /* CCK rates (returned values are device-dependent) */
1037 case 2: return 0x0;
1038 case 4: return 0x1;
1039 case 11: return 0x2;
1040 case 22: return 0x3;
1041
1042 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1043 case 12: return 0xb;
1044 case 18: return 0xf;
1045 case 24: return 0xa;
1046 case 36: return 0xe;
1047 case 48: return 0x9;
1048 case 72: return 0xd;
1049 case 96: return 0x8;
1050 case 108: return 0xc;
1051
1052 /* unsupported rates (should not get there) */
1053 default: return 0xff;
1054 }
1055 }
1056
1057 Static void
1058 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1059 uint32_t flags, int len, int rate)
1060 {
1061 struct ieee80211com *ic = &sc->sc_ic;
1062 uint16_t plcp_length;
1063 int remainder;
1064
1065 desc->flags = htole32(flags);
1066 desc->flags |= htole32(RAL_TX_NEWSEQ);
1067 desc->flags |= htole32(len << 16);
1068
1069 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1070 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1071
1072 /* setup PLCP fields */
1073 desc->plcp_signal = ural_plcp_signal(rate);
1074 desc->plcp_service = 4;
1075
1076 len += IEEE80211_CRC_LEN;
1077 if (RAL_RATE_IS_OFDM(rate)) {
1078 desc->flags |= htole32(RAL_TX_OFDM);
1079
1080 plcp_length = len & 0xfff;
1081 desc->plcp_length_hi = plcp_length >> 6;
1082 desc->plcp_length_lo = plcp_length & 0x3f;
1083 } else {
1084 plcp_length = (16 * len + rate - 1) / rate;
1085 if (rate == 22) {
1086 remainder = (16 * len) % 22;
1087 if (remainder != 0 && remainder < 7)
1088 desc->plcp_service |= RAL_PLCP_LENGEXT;
1089 }
1090 desc->plcp_length_hi = plcp_length >> 8;
1091 desc->plcp_length_lo = plcp_length & 0xff;
1092
1093 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1094 desc->plcp_signal |= 0x08;
1095 }
1096
1097 desc->iv = 0;
1098 desc->eiv = 0;
1099 }
1100
1101 #define RAL_TX_TIMEOUT 5000
1102
1103 Static int
1104 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1105 {
1106 struct ural_tx_desc *desc;
1107 usbd_xfer_handle xfer;
1108 uint8_t cmd = 0;
1109 usbd_status error;
1110 uint8_t *buf;
1111 int xferlen, rate;
1112
1113 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1114
1115 xfer = usbd_alloc_xfer(sc->sc_udev);
1116 if (xfer == NULL)
1117 return ENOMEM;
1118
1119 /* xfer length needs to be a multiple of two! */
1120 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1121
1122 buf = usbd_alloc_buffer(xfer, xferlen);
1123 if (buf == NULL) {
1124 usbd_free_xfer(xfer);
1125 return ENOMEM;
1126 }
1127
1128 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1129 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1130
1131 error = usbd_sync_transfer(xfer);
1132 if (error != 0) {
1133 usbd_free_xfer(xfer);
1134 return error;
1135 }
1136
1137 desc = (struct ural_tx_desc *)buf;
1138
1139 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1140 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1141 m0->m_pkthdr.len, rate);
1142
1143 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1144 m0->m_pkthdr.len, rate, xferlen));
1145
1146 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1147 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1148
1149 error = usbd_sync_transfer(xfer);
1150 usbd_free_xfer(xfer);
1151
1152 return error;
1153 }
1154
1155 Static int
1156 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1157 {
1158 struct ieee80211com *ic = &sc->sc_ic;
1159 struct ural_tx_desc *desc;
1160 struct ural_tx_data *data;
1161 struct ieee80211_frame *wh;
1162 uint32_t flags = 0;
1163 uint16_t dur;
1164 usbd_status error;
1165 int xferlen, rate;
1166
1167 data = &sc->tx_data[0];
1168 desc = (struct ural_tx_desc *)data->buf;
1169
1170 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1171
1172 data->m = m0;
1173 data->ni = ni;
1174
1175 wh = mtod(m0, struct ieee80211_frame *);
1176
1177 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1178 flags |= RAL_TX_ACK;
1179
1180 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, rate, ic->ic_flags) +
1181 sc->sc_sifs;
1182 *(uint16_t *)wh->i_dur = htole16(dur);
1183
1184 /* tell hardware to add timestamp for probe responses */
1185 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1186 IEEE80211_FC0_TYPE_MGT &&
1187 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1188 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1189 flags |= RAL_TX_TIMESTAMP;
1190 }
1191
1192 if (sc->sc_drvbpf != NULL) {
1193 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1194
1195 tap->wt_flags = 0;
1196 tap->wt_rate = rate;
1197 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1198 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1199 tap->wt_antenna = sc->tx_ant;
1200
1201 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1202 }
1203
1204 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1205 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1206
1207 /* align end on a 2-bytes boundary */
1208 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1209
1210 /*
1211 * No space left in the last URB to store the extra 2 bytes, force
1212 * sending of another URB.
1213 */
1214 if ((xferlen % 64) == 0)
1215 xferlen += 2;
1216
1217 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1218 m0->m_pkthdr.len, rate, xferlen));
1219
1220 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1221 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1222 ural_txeof);
1223
1224 error = usbd_transfer(data->xfer);
1225 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1226 return error;
1227
1228 sc->tx_queued++;
1229
1230 return 0;
1231 }
1232
1233 Static int
1234 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1235 {
1236 struct ieee80211com *ic = &sc->sc_ic;
1237 struct ural_tx_desc *desc;
1238 struct ural_tx_data *data;
1239 struct ieee80211_frame *wh;
1240 struct ieee80211_key *k;
1241 uint32_t flags = 0;
1242 uint16_t dur;
1243 usbd_status error;
1244 int xferlen, rate, rate_idx;
1245
1246 wh = mtod(m0, struct ieee80211_frame *);
1247
1248 ieee80211_ratectl_findrate(ni, m0->m_pkthdr.len, &rate_idx, 1);
1249 rate = IEEE80211_RS_RATE(&ni->ni_rates, rate_idx);
1250
1251 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1252 k = ieee80211_crypto_encap(ic, ni, m0);
1253 if (k == NULL) {
1254 m_freem(m0);
1255 return ENOBUFS;
1256 }
1257
1258 /* packet header may have moved, reset our local pointer */
1259 wh = mtod(m0, struct ieee80211_frame *);
1260 }
1261
1262 data = &sc->tx_data[0];
1263 desc = (struct ural_tx_desc *)data->buf;
1264
1265 data->m = m0;
1266 data->ni = ni;
1267
1268 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1269 flags |= RAL_TX_ACK;
1270 flags |= RAL_TX_RETRY(sc->sc_tx_retries);
1271
1272 dur = ieee80211_txtime(ni, RAL_ACK_SIZE,
1273 ieee80211_ack_rate(ni, rate), ic->ic_flags) +
1274 sc->sc_sifs;
1275 *(uint16_t *)wh->i_dur = htole16(dur);
1276 }
1277
1278 if (sc->sc_drvbpf != NULL) {
1279 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1280
1281 tap->wt_flags = 0;
1282 tap->wt_rate = rate;
1283 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1284 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1285 tap->wt_antenna = sc->tx_ant;
1286
1287 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1288 }
1289
1290 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1291 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1292
1293 /* align end on a 2-bytes boundary */
1294 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1295
1296 /*
1297 * No space left in the last URB to store the extra 2 bytes, force
1298 * sending of another URB.
1299 */
1300 if ((xferlen % 64) == 0)
1301 xferlen += 2;
1302
1303 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1304 m0->m_pkthdr.len, rate, xferlen));
1305
1306 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1307 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1308 ural_txeof);
1309
1310 error = usbd_transfer(data->xfer);
1311 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1312 return error;
1313
1314 sc->tx_queued++;
1315
1316 return 0;
1317 }
1318
1319 Static void
1320 ural_start(struct ifnet *ifp)
1321 {
1322 struct ural_softc *sc = ifp->if_softc;
1323 struct ieee80211com *ic = &sc->sc_ic;
1324 struct mbuf *m0;
1325 struct ether_header *eh;
1326 struct ieee80211_node *ni;
1327
1328 ASSERT_SERIALIZED(ifp->if_serializer);
1329
1330 if ((ifp->if_flags & (IFF_OACTIVE | IFF_RUNNING)) != IFF_RUNNING)
1331 return;
1332
1333 for (;;) {
1334 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1335 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1336 ifp->if_flags |= IFF_OACTIVE;
1337 break;
1338 }
1339 IF_DEQUEUE(&ic->ic_mgtq, m0);
1340
1341 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1342 m0->m_pkthdr.rcvif = NULL;
1343
1344 if (ic->ic_rawbpf != NULL)
1345 bpf_mtap(ic->ic_rawbpf, m0);
1346
1347 if (ural_tx_mgt(sc, m0, ni) != 0)
1348 break;
1349
1350 } else {
1351 if (ic->ic_state != IEEE80211_S_RUN)
1352 break;
1353 m0 = ifq_poll(&ifp->if_snd);
1354 if (m0 == NULL)
1355 break;
1356 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1357 ifp->if_flags |= IFF_OACTIVE;
1358 break;
1359 }
1360
1361 ifq_dequeue(&ifp->if_snd, m0);
1362
1363 if (m0->m_len < sizeof (struct ether_header) &&
1364 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1365 continue;
1366
1367 eh = mtod(m0, struct ether_header *);
1368 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1369 if (ni == NULL) {
1370 m_freem(m0);
1371 continue;
1372 }
1373 BPF_MTAP(ifp, m0);
1374
1375 m0 = ieee80211_encap(ic, m0, ni);
1376 if (m0 == NULL) {
1377 ieee80211_free_node(ni);
1378 continue;
1379 }
1380
1381 if (ic->ic_rawbpf != NULL)
1382 bpf_mtap(ic->ic_rawbpf, m0);
1383
1384 if (ural_tx_data(sc, m0, ni) != 0) {
1385 ieee80211_free_node(ni);
1386 ifp->if_oerrors++;
1387 break;
1388 }
1389 }
1390
1391 sc->sc_tx_timer = 5;
1392 ifp->if_timer = 1;
1393 }
1394 }
1395
1396 Static void
1397 ural_watchdog(struct ifnet *ifp)
1398 {
1399 struct ural_softc *sc = ifp->if_softc;
1400 struct ieee80211com *ic = &sc->sc_ic;
1401
1402 ASSERT_SERIALIZED(ifp->if_serializer);
1403
1404 ifp->if_timer = 0;
1405
1406 if (sc->sc_tx_timer > 0) {
1407 if (--sc->sc_tx_timer == 0) {
1408 device_printf(sc->sc_dev, "device timeout\n");
1409 /*ural_init(sc); XXX needs a process context! */
1410 ifp->if_oerrors++;
1411 return;
1412 }
1413 ifp->if_timer = 1;
1414 }
1415
1416 ieee80211_watchdog(ic);
1417 }
1418
1419 /*
1420 * This function allows for fast channel switching in monitor mode (used by
1421 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1422 * generate a new beacon frame.
1423 */
1424 Static int
1425 ural_reset(struct ifnet *ifp)
1426 {
1427 struct ural_softc *sc = ifp->if_softc;
1428 struct ieee80211com *ic = &sc->sc_ic;
1429
1430 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1431 return ENETRESET;
1432
1433 ural_set_chan(sc, ic->ic_curchan);
1434
1435 return 0;
1436 }
1437
1438 Static int
1439 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1440 {
1441 struct ural_softc *sc = ifp->if_softc;
1442 struct ieee80211com *ic = &sc->sc_ic;
1443 int error = 0;
1444
1445 ASSERT_SERIALIZED(ifp->if_serializer);
1446
1447 switch (cmd) {
1448 case SIOCSIFFLAGS:
1449 if (ifp->if_flags & IFF_UP) {
1450 if (ifp->if_flags & IFF_RUNNING)
1451 ural_update_promisc(sc);
1452 else
1453 ural_init(sc);
1454 } else {
1455 if (ifp->if_flags & IFF_RUNNING)
1456 ural_stop(sc);
1457 }
1458 break;
1459
1460 default:
1461 error = ieee80211_ioctl(ic, cmd, data, cr);
1462 }
1463
1464 if (error == ENETRESET) {
1465 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1466 (IFF_UP | IFF_RUNNING) &&
1467 ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
1468 ural_init(sc);
1469 error = 0;
1470 }
1471 return error;
1472 }
1473
1474 Static void
1475 ural_set_testmode(struct ural_softc *sc)
1476 {
1477 usb_device_request_t req;
1478 usbd_status error;
1479
1480 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1481 req.bRequest = RAL_VENDOR_REQUEST;
1482 USETW(req.wValue, 4);
1483 USETW(req.wIndex, 1);
1484 USETW(req.wLength, 0);
1485
1486 error = usbd_do_request(sc->sc_udev, &req, NULL);
1487 if (error != 0) {
1488 kprintf("%s: could not set test mode: %s\n",
1489 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1490 }
1491 }
1492
1493 Static void
1494 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1495 {
1496 usb_device_request_t req;
1497 usbd_status error;
1498
1499 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1500 req.bRequest = RAL_READ_EEPROM;
1501 USETW(req.wValue, 0);
1502 USETW(req.wIndex, addr);
1503 USETW(req.wLength, len);
1504
1505 error = usbd_do_request(sc->sc_udev, &req, buf);
1506 if (error != 0) {
1507 kprintf("%s: could not read EEPROM: %s\n",
1508 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1509 }
1510 }
1511
1512 Static uint16_t
1513 ural_read(struct ural_softc *sc, uint16_t reg)
1514 {
1515 usb_device_request_t req;
1516 usbd_status error;
1517 uint16_t val;
1518
1519 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1520 req.bRequest = RAL_READ_MAC;
1521 USETW(req.wValue, 0);
1522 USETW(req.wIndex, reg);
1523 USETW(req.wLength, sizeof (uint16_t));
1524
1525 error = usbd_do_request(sc->sc_udev, &req, &val);
1526 if (error != 0) {
1527 kprintf("%s: could not read MAC register: %s\n",
1528 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1529 return 0;
1530 }
1531
1532 return le16toh(val);
1533 }
1534
1535 Static void
1536 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1537 {
1538 usb_device_request_t req;
1539 usbd_status error;
1540
1541 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1542 req.bRequest = RAL_READ_MULTI_MAC;
1543 USETW(req.wValue, 0);
1544 USETW(req.wIndex, reg);
1545 USETW(req.wLength, len);
1546
1547 error = usbd_do_request(sc->sc_udev, &req, buf);
1548 if (error != 0) {
1549 kprintf("%s: could not read MAC register: %s\n",
1550 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1551 }
1552 }
1553
1554 Static void
1555 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1556 {
1557 usb_device_request_t req;
1558 usbd_status error;
1559
1560 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1561 req.bRequest = RAL_WRITE_MAC;
1562 USETW(req.wValue, val);
1563 USETW(req.wIndex, reg);
1564 USETW(req.wLength, 0);
1565
1566 error = usbd_do_request(sc->sc_udev, &req, NULL);
1567 if (error != 0) {
1568 kprintf("%s: could not write MAC register: %s\n",
1569 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1570 }
1571 }
1572
1573 Static void
1574 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1575 {
1576 usb_device_request_t req;
1577 usbd_status error;
1578
1579 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1580 req.bRequest = RAL_WRITE_MULTI_MAC;
1581 USETW(req.wValue, 0);
1582 USETW(req.wIndex, reg);
1583 USETW(req.wLength, len);
1584
1585 error = usbd_do_request(sc->sc_udev, &req, buf);
1586 if (error != 0) {
1587 kprintf("%s: could not write MAC register: %s\n",
1588 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1589 }
1590 }
1591
1592 Static void
1593 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1594 {
1595 uint16_t tmp;
1596 int ntries;
1597
1598 for (ntries = 0; ntries < 5; ntries++) {
1599 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1600 break;
1601 }
1602 if (ntries == 5) {
1603 kprintf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1604 return;
1605 }
1606
1607 tmp = reg << 8 | val;
1608 ural_write(sc, RAL_PHY_CSR7, tmp);
1609 }
1610
1611 Static uint8_t
1612 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1613 {
1614 uint16_t val;
1615 int ntries;
1616
1617 val = RAL_BBP_WRITE | reg << 8;
1618 ural_write(sc, RAL_PHY_CSR7, val);
1619
1620 for (ntries = 0; ntries < 5; ntries++) {
1621 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1622 break;
1623 }
1624 if (ntries == 5) {
1625 kprintf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1626 return 0;
1627 }
1628
1629 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1630 }
1631
1632 Static void
1633 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1634 {
1635 uint32_t tmp;
1636 int ntries;
1637
1638 for (ntries = 0; ntries < 5; ntries++) {
1639 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1640 break;
1641 }
1642 if (ntries == 5) {
1643 kprintf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1644 return;
1645 }
1646
1647 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1648 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1649 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1650
1651 /* remember last written value in sc */
1652 sc->rf_regs[reg] = val;
1653
1654 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1655 }
1656
1657 Static void
1658 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1659 {
1660 struct ieee80211com *ic = &sc->sc_ic;
1661 struct ifnet *ifp = &ic->ic_if;
1662 uint8_t power, tmp;
1663 u_int i, chan;
1664
1665 ASSERT_SERIALIZED(ifp->if_serializer);
1666
1667 chan = ieee80211_chan2ieee(ic, c);
1668 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1669 return;
1670
1671 lwkt_serialize_exit(ifp->if_serializer);
1672
1673 if (IEEE80211_IS_CHAN_2GHZ(c))
1674 power = min(sc->txpow[chan - 1], 31);
1675 else
1676 power = 31;
1677
1678 /* adjust txpower using ifconfig settings */
1679 power -= (100 - ic->ic_txpowlimit) / 8;
1680
1681 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1682
1683 switch (sc->rf_rev) {
1684 case RAL_RF_2522:
1685 ural_rf_write(sc, RAL_RF1, 0x00814);
1686 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1687 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1688 break;
1689
1690 case RAL_RF_2523:
1691 ural_rf_write(sc, RAL_RF1, 0x08804);
1692 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1693 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1694 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1695 break;
1696
1697 case RAL_RF_2524:
1698 ural_rf_write(sc, RAL_RF1, 0x0c808);
1699 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1700 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1701 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1702 break;
1703
1704 case RAL_RF_2525:
1705 ural_rf_write(sc, RAL_RF1, 0x08808);
1706 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1707 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1708 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1709
1710 ural_rf_write(sc, RAL_RF1, 0x08808);
1711 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1712 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1713 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1714 break;
1715
1716 case RAL_RF_2525E:
1717 ural_rf_write(sc, RAL_RF1, 0x08808);
1718 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1719 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1720 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1721 break;
1722
1723 case RAL_RF_2526:
1724 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1725 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1726 ural_rf_write(sc, RAL_RF1, 0x08804);
1727
1728 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1729 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1730 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1731 break;
1732
1733 /* dual-band RF */
1734 case RAL_RF_5222:
1735 for (i = 0; ural_rf5222[i].chan != chan; i++)
1736 ; /* EMPTY */
1737
1738 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1739 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1740 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1741 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1742 break;
1743 }
1744
1745 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1746 ic->ic_state != IEEE80211_S_SCAN) {
1747 /* set Japan filter bit for channel 14 */
1748 tmp = ural_bbp_read(sc, 70);
1749
1750 tmp &= ~RAL_JAPAN_FILTER;
1751 if (chan == 14)
1752 tmp |= RAL_JAPAN_FILTER;
1753
1754 ural_bbp_write(sc, 70, tmp);
1755
1756 /* clear CRC errors */
1757 ural_read(sc, RAL_STA_CSR0);
1758
1759 DELAY(10000);
1760 ural_disable_rf_tune(sc);
1761 }
1762
1763 sc->sc_sifs = IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS
1764 : IEEE80211_DUR_SIFS;
1765
1766 lwkt_serialize_enter(ifp->if_serializer);
1767 }
1768
1769 /*
1770 * Disable RF auto-tuning.
1771 */
1772 Static void
1773 ural_disable_rf_tune(struct ural_softc *sc)
1774 {
1775 uint32_t tmp;
1776
1777 if (sc->rf_rev != RAL_RF_2523) {
1778 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1779 ural_rf_write(sc, RAL_RF1, tmp);
1780 }
1781
1782 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1783 ural_rf_write(sc, RAL_RF3, tmp);
1784
1785 DPRINTFN(2, ("disabling RF autotune\n"));
1786 }
1787
1788 /*
1789 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1790 * synchronization.
1791 */
1792 Static void
1793 ural_enable_tsf_sync(struct ural_softc *sc)
1794 {
1795 struct ieee80211com *ic = &sc->sc_ic;
1796 uint16_t logcwmin, preload, tmp;
1797
1798 /* first, disable TSF synchronization */
1799 ural_write(sc, RAL_TXRX_CSR19, 0);
1800
1801 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1802 ural_write(sc, RAL_TXRX_CSR18, tmp);
1803
1804 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1805 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1806 tmp = logcwmin << 12 | preload;
1807 ural_write(sc, RAL_TXRX_CSR20, tmp);
1808
1809 /* finally, enable TSF synchronization */
1810 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1811 if (ic->ic_opmode == IEEE80211_M_STA)
1812 tmp |= RAL_ENABLE_TSF_SYNC(1);
1813 else
1814 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1815 ural_write(sc, RAL_TXRX_CSR19, tmp);
1816
1817 DPRINTF(("enabling TSF synchronization\n"));
1818 }
1819
1820 Static void
1821 ural_update_slot(struct ifnet *ifp)
1822 {
1823 struct ural_softc *sc = ifp->if_softc;
1824 struct ieee80211com *ic = &sc->sc_ic;
1825 uint16_t slottime, sifs, eifs;
1826
1827 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1828
1829 /*
1830 * These settings may sound a bit inconsistent but this is what the
1831 * reference driver does.
1832 */
1833 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1834 sifs = 16 - RAL_RXTX_TURNAROUND;
1835 eifs = 364;
1836 } else {
1837 sifs = 10 - RAL_RXTX_TURNAROUND;
1838 eifs = 64;
1839 }
1840
1841 ural_write(sc, RAL_MAC_CSR10, slottime);
1842 ural_write(sc, RAL_MAC_CSR11, sifs);
1843 ural_write(sc, RAL_MAC_CSR12, eifs);
1844 }
1845
1846 Static void
1847 ural_set_txpreamble(struct ural_softc *sc)
1848 {
1849 uint16_t tmp;
1850
1851 tmp = ural_read(sc, RAL_TXRX_CSR10);
1852
1853 tmp &= ~RAL_SHORT_PREAMBLE;
1854 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1855 tmp |= RAL_SHORT_PREAMBLE;
1856
1857 ural_write(sc, RAL_TXRX_CSR10, tmp);
1858 }
1859
1860 Static void
1861 ural_set_basicrates(struct ural_softc *sc)
1862 {
1863 struct ieee80211com *ic = &sc->sc_ic;
1864
1865 /* update basic rate set */
1866 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1867 /* 11b basic rates: 1, 2Mbps */
1868 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1869 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1870 /* 11a basic rates: 6, 12, 24Mbps */
1871 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1872 } else {
1873 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1874 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1875 }
1876 }
1877
1878 Static void
1879 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1880 {
1881 uint16_t tmp;
1882
1883 tmp = bssid[0] | bssid[1] << 8;
1884 ural_write(sc, RAL_MAC_CSR5, tmp);
1885
1886 tmp = bssid[2] | bssid[3] << 8;
1887 ural_write(sc, RAL_MAC_CSR6, tmp);
1888
1889 tmp = bssid[4] | bssid[5] << 8;
1890 ural_write(sc, RAL_MAC_CSR7, tmp);
1891
1892 DPRINTF(("setting BSSID to %6D\n", bssid, ":"));
1893 }
1894
1895 Static void
1896 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1897 {
1898 uint16_t tmp;
1899
1900 tmp = addr[0] | addr[1] << 8;
1901 ural_write(sc, RAL_MAC_CSR2, tmp);
1902
1903 tmp = addr[2] | addr[3] << 8;
1904 ural_write(sc, RAL_MAC_CSR3, tmp);
1905
1906 tmp = addr[4] | addr[5] << 8;
1907 ural_write(sc, RAL_MAC_CSR4, tmp);
1908
1909 DPRINTF(("setting MAC address to %6D\n", addr, ":"));
1910 }
1911
1912 Static void
1913 ural_update_promisc(struct ural_softc *sc)
1914 {
1915 struct ifnet *ifp = &sc->sc_ic.ic_if;
1916 uint32_t tmp;
1917
1918 tmp = ural_read(sc, RAL_TXRX_CSR2);
1919
1920 tmp &= ~RAL_DROP_NOT_TO_ME;
1921 if (!(ifp->if_flags & IFF_PROMISC))
1922 tmp |= RAL_DROP_NOT_TO_ME;
1923
1924 ural_write(sc, RAL_TXRX_CSR2, tmp);
1925
1926 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1927 "entering" : "leaving"));
1928 }
1929
1930 Static const char *
1931 ural_get_rf(int rev)
1932 {
1933 switch (rev) {
1934 case RAL_RF_2522: return "RT2522";
1935 case RAL_RF_2523: return "RT2523";
1936 case RAL_RF_2524: return "RT2524";
1937 case RAL_RF_2525: return "RT2525";
1938 case RAL_RF_2525E: return "RT2525e";
1939 case RAL_RF_2526: return "RT2526";
1940 case RAL_RF_5222: return "RT5222";
1941 default: return "unknown";
1942 }
1943 }
1944
1945 Static void
1946 ural_read_eeprom(struct ural_softc *sc)
1947 {
1948 struct ieee80211com *ic = &sc->sc_ic;
1949 uint16_t val;
1950
1951 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1952 val = le16toh(val);
1953 sc->rf_rev = (val >> 11) & 0x7;
1954 sc->hw_radio = (val >> 10) & 0x1;
1955 sc->led_mode = (val >> 6) & 0x7;
1956 sc->rx_ant = (val >> 4) & 0x3;
1957 sc->tx_ant = (val >> 2) & 0x3;
1958 sc->nb_ant = val & 0x3;
1959
1960 /* read MAC address */
1961 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1962
1963 /* read default values for BBP registers */
1964 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1965
1966 /* read Tx power for all b/g channels */
1967 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1968 }
1969
1970 Static int
1971 ural_bbp_init(struct ural_softc *sc)
1972 {
1973 #define N(a) (sizeof (a) / sizeof ((a)[0]))
1974 int i, ntries;
1975
1976 /* wait for BBP to be ready */
1977 for (ntries = 0; ntries < 100; ntries++) {
1978 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1979 break;
1980 DELAY(1000);
1981 }
1982 if (ntries == 100) {
1983 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1984 return EIO;
1985 }
1986
1987 /* initialize BBP registers to default values */
1988 for (i = 0; i < N(ural_def_bbp); i++)
1989 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1990
1991 #if 0
1992 /* initialize BBP registers to values stored in EEPROM */
1993 for (i = 0; i < 16; i++) {
1994 if (sc->bbp_prom[i].reg == 0xff)
1995 continue;
1996 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1997 }
1998 #endif
1999
2000 return 0;
2001 #undef N
2002 }
2003
2004 Static void
2005 ural_set_txantenna(struct ural_softc *sc, int antenna)
2006 {
2007 uint16_t tmp;
2008 uint8_t tx;
2009
2010 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2011 if (antenna == 1)
2012 tx |= RAL_BBP_ANTA;
2013 else if (antenna == 2)
2014 tx |= RAL_BBP_ANTB;
2015 else
2016 tx |= RAL_BBP_DIVERSITY;
2017
2018 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2019 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2020 sc->rf_rev == RAL_RF_5222)
2021 tx |= RAL_BBP_FLIPIQ;
2022
2023 ural_bbp_write(sc, RAL_BBP_TX, tx);
2024
2025 /* update values in PHY_CSR5 and PHY_CSR6 */
2026 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2027 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2028
2029 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2030 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2031 }
2032
2033 Static void
2034 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2035 {
2036 uint8_t rx;
2037
2038 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2039 if (antenna == 1)
2040 rx |= RAL_BBP_ANTA;
2041 else if (antenna == 2)
2042 rx |= RAL_BBP_ANTB;
2043 else
2044 rx |= RAL_BBP_DIVERSITY;
2045
2046 /* need to force no I/Q flip for RF 2525e and 2526 */
2047 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2048 rx &= ~RAL_BBP_FLIPIQ;
2049
2050 ural_bbp_write(sc, RAL_BBP_RX, rx);
2051 }
2052
2053 Static void
2054 ural_init(void *priv)
2055 {
2056 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2057 struct ural_softc *sc = priv;
2058 struct ieee80211com *ic = &sc->sc_ic;
2059 struct ifnet *ifp = &ic->ic_if;
2060 struct ural_rx_data *data;
2061 uint16_t tmp;
2062 usbd_status error;
2063 int i, ntries;
2064
2065 ASSERT_SERIALIZED(ifp->if_serializer);
2066
2067 ural_set_testmode(sc);
2068 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2069
2070 ural_stop(sc);
2071
2072 /* initialize MAC registers to default values */
2073 for (i = 0; i < N(ural_def_mac); i++)
2074 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2075
2076 /* wait for BBP and RF to wake up (this can take a long time!) */
2077 for (ntries = 0; ntries < 100; ntries++) {
2078 tmp = ural_read(sc, RAL_MAC_CSR17);
2079 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2080 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2081 break;
2082 DELAY(1000);
2083 }
2084 if (ntries == 100) {
2085 kprintf("%s: timeout waiting for BBP/RF to wakeup\n",
2086 USBDEVNAME(sc->sc_dev));
2087 goto fail;
2088 }
2089
2090 /* we're ready! */
2091 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2092
2093 /* set basic rate set (will be updated later) */
2094 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2095
2096 if (ural_bbp_init(sc) != 0)
2097 goto fail;
2098
2099 /* set default BSS channel */
2100 ural_set_chan(sc, ic->ic_curchan);
2101
2102 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2103 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2104
2105 ural_set_txantenna(sc, sc->tx_ant);
2106 ural_set_rxantenna(sc, sc->rx_ant);
2107
2108 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2109 ural_set_macaddr(sc, ic->ic_myaddr);
2110
2111 /*
2112 * Allocate xfer for AMRR statistics requests.
2113 */
2114 sc->stats_xfer = usbd_alloc_xfer(sc->sc_udev);
2115 if (sc->stats_xfer == NULL) {
2116 kprintf("%s: could not allocate AMRR xfer\n",
2117 USBDEVNAME(sc->sc_dev));
2118 goto fail;
2119 }
2120
2121 /*
2122 * Open Tx and Rx USB bulk pipes.
2123 */
2124 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2125 &sc->sc_tx_pipeh);
2126 if (error != 0) {
2127 kprintf("%s: could not open Tx pipe: %s\n",
2128 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2129 goto fail;
2130 }
2131
2132 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2133 &sc->sc_rx_pipeh);
2134 if (error != 0) {
2135 kprintf("%s: could not open Rx pipe: %s\n",
2136 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2137 goto fail;
2138 }
2139
2140 /*
2141 * Allocate Tx and Rx xfer queues.
2142 */
2143 error = ural_alloc_tx_list(sc);
2144 if (error != 0) {
2145 kprintf("%s: could not allocate Tx list\n",
2146 USBDEVNAME(sc->sc_dev));
2147 goto fail;
2148 }
2149
2150 error = ural_alloc_rx_list(sc);
2151 if (error != 0) {
2152 kprintf("%s: could not allocate Rx list\n",
2153 USBDEVNAME(sc->sc_dev));
2154 goto fail;
2155 }
2156
2157 /*
2158 * Start up the receive pipe.
2159 */
2160 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2161 data = &sc->rx_data[i];
2162
2163 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2164 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2165 usbd_transfer(data->xfer);
2166 }
2167
2168 /* kick Rx */
2169 tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2170 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2171 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2172 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2173 tmp |= RAL_DROP_TODS;
2174 if (!(ifp->if_flags & IFF_PROMISC))
2175 tmp |= RAL_DROP_NOT_TO_ME;
2176 }
2177 ural_write(sc, RAL_TXRX_CSR2, tmp);
2178
2179 ifp->if_flags &= ~IFF_OACTIVE;
2180 ifp->if_flags |= IFF_RUNNING;
2181
2182 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2183 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2184
2185 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2186 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2187 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2188 } else
2189 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2190
2191 return;
2192
2193 fail: ural_stop(sc);
2194 #undef N
2195 }
2196
2197 Static void
2198 ural_stop(struct ural_softc *sc)
2199 {
2200 struct ieee80211com *ic = &sc->sc_ic;
2201 struct ifnet *ifp = &ic->ic_if;
2202
2203 ASSERT_SERIALIZED(ifp->if_serializer);
2204
2205 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2206
2207 sc->sc_tx_timer = 0;
2208 ifp->if_timer = 0;
2209 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2210
2211 /* disable Rx */
2212 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2213
2214 /* reset ASIC and BBP (but won't reset MAC registers!) */
2215 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2216 ural_write(sc, RAL_MAC_CSR1, 0);
2217
2218 if (sc->stats_xfer != NULL) {
2219 usbd_free_xfer(sc->stats_xfer);
2220 sc->stats_xfer = NULL;
2221 }
2222
2223 if (sc->sc_rx_pipeh != NULL) {
2224 usbd_abort_pipe(sc->sc_rx_pipeh);
2225 usbd_close_pipe(sc->sc_rx_pipeh);
2226 sc->sc_rx_pipeh = NULL;
2227 }
2228
2229 if (sc->sc_tx_pipeh != NULL) {
2230 usbd_abort_pipe(sc->sc_tx_pipeh);
2231 usbd_close_pipe(sc->sc_tx_pipeh);
2232 sc->sc_tx_pipeh = NULL;
2233 }
2234
2235 ural_free_rx_list(sc);
2236 ural_free_tx_list(sc);
2237 }
2238
2239 Static void
2240 ural_stats_timeout(void *arg)
2241 {
2242 struct ural_softc *sc = (struct ural_softc *)arg;
2243 struct ifnet *ifp = &sc->sc_ic.ic_if;
2244 usb_device_request_t req;
2245
2246 lwkt_serialize_enter(ifp->if_serializer);
2247
2248 /*
2249 * Asynchronously read statistic registers (cleared by read).
2250 */
2251 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2252 req.bRequest = RAL_READ_MULTI_MAC;
2253 USETW(req.wValue, 0);
2254 USETW(req.wIndex, RAL_STA_CSR0);
2255 USETW(req.wLength, sizeof(sc->sta));
2256
2257 usbd_setup_default_xfer(sc->stats_xfer, sc->sc_udev, sc,
2258 USBD_DEFAULT_TIMEOUT, &req,
2259 sc->sta, sizeof(sc->sta), 0,
2260 ural_stats_update);
2261 usbd_transfer(sc->stats_xfer);
2262
2263 lwkt_serialize_exit(ifp->if_serializer);
2264 }
2265
2266 Static void
2267 ural_stats_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2268 usbd_status status)
2269 {
2270 struct ural_softc *sc = (struct ural_softc *)priv;
2271 struct ifnet *ifp = &sc->sc_ic.ic_if;
2272 struct ieee80211_ratectl_stats *stats = &sc->sc_stats;
2273
2274 if (status != USBD_NORMAL_COMPLETION) {
2275 device_printf(sc->sc_dev, "could not retrieve Tx statistics - "
2276 "cancelling automatic rate control\n");
2277 return;
2278 }
2279
2280 lwkt_serialize_enter(ifp->if_serializer);
2281
2282 /* count TX retry-fail as Tx errors */
2283 ifp->if_oerrors += sc->sta[RAL_TX_PKT_FAIL];
2284
2285 stats->stats_pkt_ok += sc->sta[RAL_TX_PKT_NO_RETRY] +
2286 sc->sta[RAL_TX_PKT_ONE_RETRY] +
2287 sc->sta[RAL_TX_PKT_MULTI_RETRY];
2288
2289 stats->stats_pkt_err += sc->sta[RAL_TX_PKT_FAIL];
2290
2291 stats->stats_pkt_noretry += sc->sta[RAL_TX_PKT_NO_RETRY];
2292
2293 stats->stats_retries += sc->sta[RAL_TX_PKT_ONE_RETRY];
2294 #if 1
2295 /*
2296 * XXX Estimated average:
2297 * Actual number of retries for each packet should belong to
2298 * [2, sc->sc_tx_retries]
2299 */
2300 stats->stats_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY] *
2301 ((2 + sc->sc_tx_retries) / 2);
2302 #else
2303 stats->stats_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY];
2304 #endif
2305 stats->stats_retries += sc->sta[RAL_TX_PKT_FAIL] * sc->sc_tx_retries;
2306
2307 callout_reset(&sc->stats_ch, 4 * hz / 5, ural_stats_timeout, sc);
2308
2309 lwkt_serialize_exit(ifp->if_serializer);
2310 }
2311
2312 Static void
2313 ural_stats(struct ieee80211com *ic, struct ieee80211_node *ni __unused,
2314 struct ieee80211_ratectl_stats *stats)
2315 {
2316 struct ifnet *ifp = &ic->ic_if;
2317 struct ural_softc *sc = ifp->if_softc;
2318
2319 ASSERT_SERIALIZED(ifp->if_serializer);
2320
2321 bcopy(&sc->sc_stats, stats, sizeof(*stats));
2322 bzero(&sc->sc_stats, sizeof(sc->sc_stats));
2323 }
2324
2325 Static void
2326 ural_ratectl_change(struct ieee80211com *ic, u_int orc __unused, u_int nrc)
2327 {
2328 struct ieee80211_ratectl_state *st = &ic->ic_ratectl;
2329 struct ieee80211_onoe_param *oparam;
2330
2331 if (st->rc_st_param != NULL) {
2332 kfree(st->rc_st_param, M_DEVBUF);
2333 st->rc_st_param = NULL;
2334 }
2335
2336 switch (nrc) {
2337 case IEEE80211_RATECTL_ONOE:
2338 oparam = kmalloc(sizeof(*oparam), M_DEVBUF, M_INTWAIT);
2339
2340 IEEE80211_ONOE_PARAM_SETUP(oparam);
2341 oparam->onoe_raise = 20;
2342
2343 st->rc_st_param = oparam;
2344 break;
2345 case IEEE80211_RATECTL_NONE:
2346 /* This could only happen during detaching */
2347 break;
2348 default:
2349 panic("unknown rate control algo %u\n", nrc);
2350 }
2351 }
2352
2353 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, usbd_driver_load, 0);
DragonFly vkernel multiprocessor port