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Another round of spelling fixes in manpages, messages, readmes etc.
[dragonfly/vkernel-mp.git] / sys / bus / usb / uhci.c
blob35389c6c7f4c95153b5f2f6b7ede27a59ca791ec
1 /* $NetBSD: uhci.c,v 1.170 2003/02/19 01:35:04 augustss Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.162.2.1 2006/03/01 01:59:04 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/uhci.c,v 1.21 2007/05/13 22:25:42 swildner Exp $ */
4
5 /* Also already incorporated from NetBSD:
6 * $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $
7 * $NetBSD: uhci.c,v 1.173 2003/05/13 04:41:59 gson Exp $
8 * $NetBSD: uhci.c,v 1.175 2003/09/12 16:18:08 mycroft Exp $
9 * $NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $
10 * $NetBSD: uhci.c,v 1.177 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: uhci.c,v 1.178 2004/03/02 16:32:05 martin Exp $
12 * $NetBSD: uhci.c,v 1.180 2004/07/17 20:12:03 mycroft Exp $
13 */
14
15 /*
16 * Copyright (c) 1998 The NetBSD Foundation, Inc.
17 * All rights reserved.
18 *
19 * This code is derived from software contributed to The NetBSD Foundation
20 * by Lennart Augustsson (lennart@augustsson.net) at
21 * Carlstedt Research & Technology.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * This product includes software developed by the NetBSD
34 * Foundation, Inc. and its contributors.
35 * 4. Neither the name of The NetBSD Foundation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
40 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
41 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52 /*
53 * USB Universal Host Controller driver.
54 * Handles e.g. PIIX3 and PIIX4.
55 *
56 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
57 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
59 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
60 */
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/kernel.h>
65 #include <sys/malloc.h>
66 #if defined(__NetBSD__) || defined(__OpenBSD__)
67 #include <sys/device.h>
68 #include <sys/select.h>
69 #elif defined(__FreeBSD__) || defined(__DragonFly__)
70 #include <sys/endian.h>
71 #include <sys/module.h>
72 #include <sys/bus.h>
73 #if defined(DIAGNOSTIC) && defined(__i386__)
74 #include <machine/cpu.h>
75 #endif
76 #endif
77 #include <sys/proc.h>
78 #include <sys/queue.h>
79 #include <sys/sysctl.h>
80 #ifdef __DragonFly__
81 #include <sys/thread2.h>
82 #endif
83
84 #include <machine/endian.h>
85
86 #include <bus/usb/usb.h>
87 #include <bus/usb/usbdi.h>
88 #include <bus/usb/usbdivar.h>
89 #include <bus/usb/usb_mem.h>
90 #include <bus/usb/usb_quirks.h>
91
92 #include <bus/usb/uhcireg.h>
93 #include <bus/usb/uhcivar.h>
94
95 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
96 /*#define UHCI_CTL_LOOP */
97
98 #if defined(__FreeBSD__) || defined(__DragonFly__)
99 #define delay(d) DELAY(d)
100 #endif
101
102 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
103
104 #if defined(__OpenBSD__)
105 struct cfdriver uhci_cd = {
106 NULL, "uhci", DV_DULL
107 };
108 #endif
109
110 #ifdef USB_DEBUG
111 uhci_softc_t *thesc;
112 #define DPRINTF(x) if (uhcidebug) kprintf x
113 #define DPRINTFN(n,x) if (uhcidebug>(n)) kprintf x
114 int uhcidebug = 0;
115 int uhcinoloop = 0;
116 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
117 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
118 &uhcidebug, 0, "uhci debug level");
119 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
120 &uhcinoloop, 0, "uhci noloop");
121 #ifndef __NetBSD__
122 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
123 #endif
124 #else
125 #define DPRINTF(x)
126 #define DPRINTFN(n,x)
127 #endif
128
129 /*
130 * The UHCI controller is little endian, so on big endian machines
131 * the data strored in memory needs to be swapped.
132 */
133 #if defined(__OpenBSD__)
134 #if BYTE_ORDER == BIG_ENDIAN
135 #define htole32(x) (bswap32(x))
136 #define le32toh(x) (bswap32(x))
137 #else
138 #define htole32(x) (x)
139 #define le32toh(x) (x)
140 #endif
141 #endif
142
143 struct uhci_pipe {
144 struct usbd_pipe pipe;
145 int nexttoggle;
146
147 u_char aborting;
148 usbd_xfer_handle abortstart, abortend;
149
150 /* Info needed for different pipe kinds. */
151 union {
152 /* Control pipe */
153 struct {
154 uhci_soft_qh_t *sqh;
155 usb_dma_t reqdma;
156 uhci_soft_td_t *setup, *stat;
157 u_int length;
158 } ctl;
159 /* Interrupt pipe */
160 struct {
161 int npoll;
162 int isread;
163 uhci_soft_qh_t **qhs;
164 } intr;
165 /* Bulk pipe */
166 struct {
167 uhci_soft_qh_t *sqh;
168 u_int length;
169 int isread;
170 } bulk;
171 /* Iso pipe */
172 struct iso {
173 uhci_soft_td_t **stds;
174 int next, inuse;
175 } iso;
176 } u;
177 };
178
179 Static void uhci_globalreset(uhci_softc_t *);
180 Static usbd_status uhci_portreset(uhci_softc_t*, int);
181 Static void uhci_reset(uhci_softc_t *);
182 #if defined(__NetBSD__) || defined(__OpenBSD__)
183 Static void uhci_shutdown(void *v);
184 Static void uhci_power(int, void *);
185 #endif
186 Static usbd_status uhci_run(uhci_softc_t *, int run);
187 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
188 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
189 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
190 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
191 #if 0
192 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
193 uhci_intr_info_t *);
194 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
195 #endif
196
197 Static void uhci_free_std_chain(uhci_softc_t *,
198 uhci_soft_td_t *, uhci_soft_td_t *);
199 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
200 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
201 uhci_soft_td_t **, uhci_soft_td_t **);
202 Static void uhci_poll_hub(void *);
203 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
204 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
205 Static void uhci_idone(uhci_intr_info_t *);
206
207 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
208
209 Static void uhci_timeout(void *);
210 Static void uhci_timeout_task(void *);
211 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
212 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
213 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
214 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
215 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
216 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
217 Static int uhci_str(usb_string_descriptor_t *, int, char *);
218 Static void uhci_add_loop(uhci_softc_t *sc);
219 Static void uhci_rem_loop(uhci_softc_t *sc);
220
221 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
222 Static void uhci_device_isoc_enter(usbd_xfer_handle);
223
224 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
225 Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
226
227 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
228 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
229
230 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
231 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
232 Static void uhci_device_ctrl_abort(usbd_xfer_handle);
233 Static void uhci_device_ctrl_close(usbd_pipe_handle);
234 Static void uhci_device_ctrl_done(usbd_xfer_handle);
235
236 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
237 Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
238 Static void uhci_device_intr_abort(usbd_xfer_handle);
239 Static void uhci_device_intr_close(usbd_pipe_handle);
240 Static void uhci_device_intr_done(usbd_xfer_handle);
241
242 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
243 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
244 Static void uhci_device_bulk_abort(usbd_xfer_handle);
245 Static void uhci_device_bulk_close(usbd_pipe_handle);
246 Static void uhci_device_bulk_done(usbd_xfer_handle);
247
248 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
249 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
250 Static void uhci_device_isoc_abort(usbd_xfer_handle);
251 Static void uhci_device_isoc_close(usbd_pipe_handle);
252 Static void uhci_device_isoc_done(usbd_xfer_handle);
253
254 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
255 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
256 Static void uhci_root_ctrl_abort(usbd_xfer_handle);
257 Static void uhci_root_ctrl_close(usbd_pipe_handle);
258 Static void uhci_root_ctrl_done(usbd_xfer_handle);
259
260 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
261 Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
262 Static void uhci_root_intr_abort(usbd_xfer_handle);
263 Static void uhci_root_intr_close(usbd_pipe_handle);
264 Static void uhci_root_intr_done(usbd_xfer_handle);
265
266 Static usbd_status uhci_open(usbd_pipe_handle);
267 Static void uhci_poll(struct usbd_bus *);
268 Static void uhci_softintr(void *);
269
270 Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
271
272 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
273 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
274 Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
275 struct uhci_pipe *pipe, int ival);
276
277 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
278 Static void uhci_noop(usbd_pipe_handle pipe);
279
280 Static __inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
281 uhci_soft_qh_t *);
282
283 #ifdef USB_DEBUG
284 Static void uhci_dump_all(uhci_softc_t *);
285 Static void uhci_dumpregs(uhci_softc_t *);
286 Static void uhci_dump_qhs(uhci_soft_qh_t *);
287 Static void uhci_dump_qh(uhci_soft_qh_t *);
288 Static void uhci_dump_tds(uhci_soft_td_t *);
289 Static void uhci_dump_td(uhci_soft_td_t *);
290 Static void uhci_dump_ii(uhci_intr_info_t *ii);
291 void uhci_dump(void);
292 #endif
293
294 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
295 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
296 #define UWRITE1(sc, r, x) \
297 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
298 } while (/*CONSTCOND*/0)
299 #define UWRITE2(sc, r, x) \
300 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
301 } while (/*CONSTCOND*/0)
302 #define UWRITE4(sc, r, x) \
303 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
304 } while (/*CONSTCOND*/0)
305 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
306 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
307 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
308
309 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
310 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
311
312 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
313
314 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
315
316 #define UHCI_INTR_ENDPT 1
317
318 struct usbd_bus_methods uhci_bus_methods = {
319 uhci_open,
320 uhci_softintr,
321 uhci_poll,
322 uhci_allocm,
323 uhci_freem,
324 uhci_allocx,
325 uhci_freex,
326 };
327
328 struct usbd_pipe_methods uhci_root_ctrl_methods = {
329 uhci_root_ctrl_transfer,
330 uhci_root_ctrl_start,
331 uhci_root_ctrl_abort,
332 uhci_root_ctrl_close,
333 uhci_noop,
334 uhci_root_ctrl_done,
335 };
336
337 struct usbd_pipe_methods uhci_root_intr_methods = {
338 uhci_root_intr_transfer,
339 uhci_root_intr_start,
340 uhci_root_intr_abort,
341 uhci_root_intr_close,
342 uhci_noop,
343 uhci_root_intr_done,
344 };
345
346 struct usbd_pipe_methods uhci_device_ctrl_methods = {
347 uhci_device_ctrl_transfer,
348 uhci_device_ctrl_start,
349 uhci_device_ctrl_abort,
350 uhci_device_ctrl_close,
351 uhci_noop,
352 uhci_device_ctrl_done,
353 };
354
355 struct usbd_pipe_methods uhci_device_intr_methods = {
356 uhci_device_intr_transfer,
357 uhci_device_intr_start,
358 uhci_device_intr_abort,
359 uhci_device_intr_close,
360 uhci_device_clear_toggle,
361 uhci_device_intr_done,
362 };
363
364 struct usbd_pipe_methods uhci_device_bulk_methods = {
365 uhci_device_bulk_transfer,
366 uhci_device_bulk_start,
367 uhci_device_bulk_abort,
368 uhci_device_bulk_close,
369 uhci_device_clear_toggle,
370 uhci_device_bulk_done,
371 };
372
373 struct usbd_pipe_methods uhci_device_isoc_methods = {
374 uhci_device_isoc_transfer,
375 uhci_device_isoc_start,
376 uhci_device_isoc_abort,
377 uhci_device_isoc_close,
378 uhci_noop,
379 uhci_device_isoc_done,
380 };
381
382 #define uhci_add_intr_info(sc, ii) \
383 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
384 #define uhci_del_intr_info(ii) \
385 do { \
386 LIST_REMOVE((ii), list); \
387 (ii)->list.le_prev = NULL; \
388 } while (0)
389 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
390
391 Static __inline uhci_soft_qh_t *
392 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
393 {
394 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
395
396 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
397 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
398 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
399 kprintf("uhci_find_prev_qh: QH not found\n");
400 return (NULL);
401 }
402 #endif
403 }
404 return (pqh);
405 }
406
407 void
408 uhci_globalreset(uhci_softc_t *sc)
409 {
410 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
411 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
412 UHCICMD(sc, 0); /* do nothing */
413 }
414
415 usbd_status
416 uhci_init(uhci_softc_t *sc)
417 {
418 usbd_status err;
419 int i, j;
420 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
421 uhci_soft_td_t *std;
422
423 DPRINTFN(1,("uhci_init: start\n"));
424
425 #ifdef USB_DEBUG
426 thesc = sc;
427
428 if (uhcidebug > 2)
429 uhci_dumpregs(sc);
430 #endif
431
432 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
433 uhci_globalreset(sc); /* reset the controller */
434 uhci_reset(sc);
435
436 /* Allocate and initialize real frame array. */
437 err = usb_allocmem(&sc->sc_bus,
438 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
439 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
440 if (err)
441 return (err);
442 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
443 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
444 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
445
446 /*
447 * Allocate a TD, inactive, that hangs from the last QH.
448 * This is to avoid a bug in the PIIX that makes it run berserk
449 * otherwise.
450 */
451 std = uhci_alloc_std(sc);
452 if (std == NULL)
453 return (USBD_NOMEM);
454 std->link.std = NULL;
455 std->td.td_link = htole32(UHCI_PTR_T);
456 std->td.td_status = htole32(0); /* inactive */
457 std->td.td_token = htole32(0);
458 std->td.td_buffer = htole32(0);
459
460 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
461 lsqh = uhci_alloc_sqh(sc);
462 if (lsqh == NULL)
463 return (USBD_NOMEM);
464 lsqh->hlink = NULL;
465 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
466 lsqh->elink = std;
467 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
468 sc->sc_last_qh = lsqh;
469
470 /* Allocate the dummy QH where bulk traffic will be queued. */
471 bsqh = uhci_alloc_sqh(sc);
472 if (bsqh == NULL)
473 return (USBD_NOMEM);
474 bsqh->hlink = lsqh;
475 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
476 bsqh->elink = NULL;
477 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
478 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
479
480 /* Allocate dummy QH where high speed control traffic will be queued. */
481 chsqh = uhci_alloc_sqh(sc);
482 if (chsqh == NULL)
483 return (USBD_NOMEM);
484 chsqh->hlink = bsqh;
485 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
486 chsqh->elink = NULL;
487 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
488 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
489
490 /* Allocate dummy QH where control traffic will be queued. */
491 clsqh = uhci_alloc_sqh(sc);
492 if (clsqh == NULL)
493 return (USBD_NOMEM);
494 clsqh->hlink = bsqh;
495 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
496 clsqh->elink = NULL;
497 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
498 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
499
500 /*
501 * Make all (virtual) frame list pointers point to the interrupt
502 * queue heads and the interrupt queue heads at the control
503 * queue head and point the physical frame list to the virtual.
504 */
505 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
506 std = uhci_alloc_std(sc);
507 sqh = uhci_alloc_sqh(sc);
508 if (std == NULL || sqh == NULL)
509 return (USBD_NOMEM);
510 std->link.sqh = sqh;
511
512 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
513 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
514 std->td.td_token = htole32(0);
515 std->td.td_buffer = htole32(0);
516 sqh->hlink = clsqh;
517 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
518 sqh->elink = NULL;
519 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
520 sc->sc_vframes[i].htd = std;
521 sc->sc_vframes[i].etd = std;
522 sc->sc_vframes[i].hqh = sqh;
523 sc->sc_vframes[i].eqh = sqh;
524 for (j = i;
525 j < UHCI_FRAMELIST_COUNT;
526 j += UHCI_VFRAMELIST_COUNT) {
527 sc->sc_pframes[j] = htole32(std->physaddr);
528 }
529 }
530
531 LIST_INIT(&sc->sc_intrhead);
532
533 SIMPLEQ_INIT(&sc->sc_free_xfers);
534
535 usb_callout_init(sc->sc_poll_handle);
536
537 /* Set up the bus struct. */
538 sc->sc_bus.methods = &uhci_bus_methods;
539 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
540
541 #if defined(__NetBSD__) || defined(__OpenBSD__)
542 sc->sc_suspend = PWR_RESUME;
543 sc->sc_powerhook = powerhook_establish(uhci_power, sc);
544 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
545 #endif
546 DPRINTFN(1,("uhci_init: enabling\n"));
547 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
548 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
549
550 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
551
552 return (uhci_run(sc, 1)); /* and here we go... */
553 }
554
555 #if defined(__NetBSD__) || defined(__OpenBSD__)
556 int
557 uhci_activate(device_ptr_t self, enum devact act)
558 {
559 struct uhci_softc *sc = (struct uhci_softc *)self;
560 int rv = 0;
561
562 switch (act) {
563 case DVACT_ACTIVATE:
564 return (EOPNOTSUPP);
565
566 case DVACT_DEACTIVATE:
567 if (sc->sc_child != NULL)
568 rv = config_deactivate(sc->sc_child);
569 break;
570 }
571 return (rv);
572 }
573 #endif
574
575 int
576 uhci_detach(struct uhci_softc *sc, int flags)
577 {
578 usbd_xfer_handle xfer;
579 int rv = 0;
580
581 #if defined(__NetBSD__) || defined(__OpenBSD__)
582 if (sc->sc_child != NULL)
583 rv = config_detach(sc->sc_child, flags);
584
585 if (rv != 0)
586 return (rv);
587 #endif
588
589 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
590 uhci_run(sc, 0);
591
592 #if defined(__NetBSD__) || defined(__OpenBSD__)
593 powerhook_disestablish(sc->sc_powerhook);
594 shutdownhook_disestablish(sc->sc_shutdownhook);
595 #endif
596
597 /* Free all xfers associated with this HC. */
598 for (;;) {
599 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
600 if (xfer == NULL)
601 break;
602 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
603 kfree(xfer, M_USB);
604 }
605
606 /* XXX free other data structures XXX */
607 usb_freemem(&sc->sc_bus, &sc->sc_dma);
608
609 return (rv);
610 }
611
612 usbd_status
613 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
614 {
615 return (usb_allocmem(bus, size, 0, dma));
616 }
617
618 void
619 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
620 {
621 usb_freemem(bus, dma);
622 }
623
624 usbd_xfer_handle
625 uhci_allocx(struct usbd_bus *bus)
626 {
627 struct uhci_softc *sc = (struct uhci_softc *)bus;
628 usbd_xfer_handle xfer;
629
630 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
631 if (xfer != NULL) {
632 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
633 #ifdef DIAGNOSTIC
634 if (xfer->busy_free != XFER_FREE) {
635 kprintf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
636 xfer->busy_free);
637 }
638 #endif
639 } else {
640 xfer = kmalloc(sizeof(struct uhci_xfer), M_USB, M_INTWAIT);
641 }
642 if (xfer != NULL) {
643 memset(xfer, 0, sizeof (struct uhci_xfer));
644 UXFER(xfer)->iinfo.sc = sc;
645 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
646 xfer);
647 UXFER(xfer)->uhci_xfer_flags = 0;
648 #ifdef DIAGNOSTIC
649 UXFER(xfer)->iinfo.isdone = 1;
650 xfer->busy_free = XFER_BUSY;
651 #endif
652 }
653 return (xfer);
654 }
655
656 void
657 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
658 {
659 struct uhci_softc *sc = (struct uhci_softc *)bus;
660
661 #ifdef DIAGNOSTIC
662 if (xfer->busy_free != XFER_BUSY) {
663 kprintf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
664 xfer->busy_free);
665 return;
666 }
667 xfer->busy_free = XFER_FREE;
668 if (!UXFER(xfer)->iinfo.isdone) {
669 kprintf("uhci_freex: !isdone\n");
670 return;
671 }
672 #endif
673 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
674 }
675
676 /*
677 * Shut down the controller when the system is going down.
678 */
679 void
680 uhci_shutdown(void *v)
681 {
682 uhci_softc_t *sc = v;
683
684 DPRINTF(("uhci_shutdown: stopping the HC\n"));
685 uhci_run(sc, 0); /* stop the controller */
686 }
687
688 /*
689 * Handle suspend/resume.
690 *
691 * We need to switch to polling mode here, because this routine is
692 * called from an interrupt context. This is all right since we
693 * are almost suspended anyway.
694 */
695 void
696 uhci_power(int why, void *v)
697 {
698 uhci_softc_t *sc = v;
699 int cmd;
700
701 crit_enter();
702 cmd = UREAD2(sc, UHCI_CMD);
703
704 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
705 sc, why, sc->sc_suspend, cmd));
706
707 if (why != PWR_RESUME) {
708 #ifdef USB_DEBUG
709 if (uhcidebug > 2)
710 uhci_dumpregs(sc);
711 #endif
712 if (sc->sc_intr_xfer != NULL)
713 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
714 sc->sc_intr_xfer);
715 sc->sc_bus.use_polling++;
716 uhci_run(sc, 0); /* stop the controller */
717
718 /* save some state if BIOS doesn't */
719 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
720 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
721
722 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
723
724 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
725 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
726 sc->sc_suspend = why;
727 sc->sc_bus.use_polling--;
728 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
729 } else {
730 #ifdef DIAGNOSTIC
731 if (sc->sc_suspend == PWR_RESUME)
732 kprintf("uhci_power: weird, resume without suspend.\n");
733 #endif
734 sc->sc_bus.use_polling++;
735 sc->sc_suspend = why;
736 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
737 uhci_globalreset(sc); /* reset the controller */
738 uhci_reset(sc);
739 if (cmd & UHCI_CMD_RS)
740 uhci_run(sc, 0); /* in case BIOS has started it */
741
742 uhci_globalreset(sc);
743 uhci_reset(sc);
744
745 /* restore saved state */
746 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
747 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
748 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
749
750 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
751 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
752 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
753 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
754 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
755 UHCICMD(sc, UHCI_CMD_MAXP);
756 uhci_run(sc, 1); /* and start traffic again */
757 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
758 sc->sc_bus.use_polling--;
759 if (sc->sc_intr_xfer != NULL)
760 usb_callout(sc->sc_poll_handle, sc->sc_ival,
761 uhci_poll_hub, sc->sc_intr_xfer);
762 #ifdef USB_DEBUG
763 if (uhcidebug > 2)
764 uhci_dumpregs(sc);
765 #endif
766 }
767 crit_exit();
768 }
769
770 #ifdef USB_DEBUG
771 Static void
772 uhci_dumpregs(uhci_softc_t *sc)
773 {
774 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
775 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
776 USBDEVNAME(sc->sc_bus.bdev),
777 UREAD2(sc, UHCI_CMD),
778 UREAD2(sc, UHCI_STS),
779 UREAD2(sc, UHCI_INTR),
780 UREAD2(sc, UHCI_FRNUM),
781 UREAD4(sc, UHCI_FLBASEADDR),
782 UREAD1(sc, UHCI_SOF),
783 UREAD2(sc, UHCI_PORTSC1),
784 UREAD2(sc, UHCI_PORTSC2)));
785 }
786
787 void
788 uhci_dump_td(uhci_soft_td_t *p)
789 {
790 char sbuf[128], sbuf2[128];
791
792 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
793 "token=0x%08lx buffer=0x%08lx\n",
794 p, (long)p->physaddr,
795 (long)le32toh(p->td.td_link),
796 (long)le32toh(p->td.td_status),
797 (long)le32toh(p->td.td_token),
798 (long)le32toh(p->td.td_buffer)));
799
800 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
801 sbuf, sizeof(sbuf));
802 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
803 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
804 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
805 sbuf2, sizeof(sbuf2));
806
807 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
808 "D=%d,maxlen=%d\n", sbuf, sbuf2,
809 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
810 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
811 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
812 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
813 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
814 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
815 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
816 }
817
818 void
819 uhci_dump_qh(uhci_soft_qh_t *sqh)
820 {
821 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
822 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
823 le32toh(sqh->qh.qh_elink)));
824 }
825
826 #if 1
827 void
828 uhci_dump(void)
829 {
830 uhci_dump_all(thesc);
831 }
832 #endif
833
834 void
835 uhci_dump_all(uhci_softc_t *sc)
836 {
837 uhci_dumpregs(sc);
838 kprintf("intrs=%d\n", sc->sc_bus.no_intrs);
839 /*kprintf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
840 uhci_dump_qh(sc->sc_lctl_start);
841 }
842
843 void
844 uhci_dump_qhs(uhci_soft_qh_t *sqh)
845 {
846 uhci_dump_qh(sqh);
847
848 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
849 * Traverses sideways first, then down.
850 *
851 * QH1
852 * QH2
853 * No QH
854 * TD2.1
855 * TD2.2
856 * TD1.1
857 * etc.
858 *
859 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
860 */
861
862
863 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
864 uhci_dump_qhs(sqh->hlink);
865 else
866 DPRINTF(("No QH\n"));
867
868 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
869 uhci_dump_tds(sqh->elink);
870 else
871 DPRINTF(("No TD\n"));
872 }
873
874 void
875 uhci_dump_tds(uhci_soft_td_t *std)
876 {
877 uhci_soft_td_t *td;
878
879 for(td = std; td != NULL; td = td->link.std) {
880 uhci_dump_td(td);
881
882 /* Check whether the link pointer in this TD marks
883 * the link pointer as end of queue. This avoids
884 * printing the free list in case the queue/TD has
885 * already been moved there (seatbelt).
886 */
887 if (le32toh(td->td.td_link) & UHCI_PTR_T ||
888 le32toh(td->td.td_link) == 0)
889 break;
890 }
891 }
892
893 Static void
894 uhci_dump_ii(uhci_intr_info_t *ii)
895 {
896 usbd_pipe_handle pipe;
897 usb_endpoint_descriptor_t *ed;
898 usbd_device_handle dev;
899
900 #ifdef DIAGNOSTIC
901 #define DONE ii->isdone
902 #else
903 #define DONE 0
904 #endif
905 if (ii == NULL) {
906 kprintf("ii NULL\n");
907 return;
908 }
909 if (ii->xfer == NULL) {
910 kprintf("ii %p: done=%d xfer=NULL\n",
911 ii, DONE);
912 return;
913 }
914 pipe = ii->xfer->pipe;
915 if (pipe == NULL) {
916 kprintf("ii %p: done=%d xfer=%p pipe=NULL\n",
917 ii, DONE, ii->xfer);
918 return;
919 }
920 if (pipe->endpoint == NULL) {
921 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
922 ii, DONE, ii->xfer, pipe);
923 return;
924 }
925 if (pipe->device == NULL) {
926 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
927 ii, DONE, ii->xfer, pipe);
928 return;
929 }
930 ed = pipe->endpoint->edesc;
931 dev = pipe->device;
932 kprintf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
933 ii, DONE, ii->xfer, dev,
934 UGETW(dev->ddesc.idVendor),
935 UGETW(dev->ddesc.idProduct),
936 dev->address, pipe,
937 ed->bEndpointAddress, ed->bmAttributes);
938 #undef DONE
939 }
940
941 void uhci_dump_iis(struct uhci_softc *sc);
942 void
943 uhci_dump_iis(struct uhci_softc *sc)
944 {
945 uhci_intr_info_t *ii;
946
947 kprintf("intr_info list:\n");
948 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
949 uhci_dump_ii(ii);
950 }
951
952 void iidump(void);
953 void iidump(void) { uhci_dump_iis(thesc); }
954
955 #endif
956
957 /*
958 * This routine is executed periodically and simulates interrupts
959 * from the root controller interrupt pipe for port status change.
960 */
961 void
962 uhci_poll_hub(void *addr)
963 {
964 usbd_xfer_handle xfer = addr;
965 usbd_pipe_handle pipe = xfer->pipe;
966 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
967 u_char *p;
968
969 DPRINTFN(20, ("uhci_poll_hub\n"));
970
971 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
972
973 p = KERNADDR(&xfer->dmabuf, 0);
974 p[0] = 0;
975 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
976 p[0] |= 1<<1;
977 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
978 p[0] |= 1<<2;
979 if (p[0] == 0)
980 /* No change, try again in a while */
981 return;
982
983 xfer->actlen = 1;
984 xfer->status = USBD_NORMAL_COMPLETION;
985 crit_enter();
986 xfer->device->bus->intr_context++;
987 usb_transfer_complete(xfer);
988 xfer->device->bus->intr_context--;
989 crit_exit();
990 }
991
992 void
993 uhci_root_intr_done(usbd_xfer_handle xfer)
994 {
995 }
996
997 void
998 uhci_root_ctrl_done(usbd_xfer_handle xfer)
999 {
1000 }
1001
1002 /*
1003 * Let the last QH loop back to the high speed control transfer QH.
1004 * This is what intel calls "bandwidth reclamation" and improves
1005 * USB performance a lot for some devices.
1006 * If we are already looping, just count it.
1007 */
1008 void
1009 uhci_add_loop(uhci_softc_t *sc) {
1010 #ifdef USB_DEBUG
1011 if (uhcinoloop)
1012 return;
1013 #endif
1014 if (++sc->sc_loops == 1) {
1015 DPRINTFN(5,("uhci_start_loop: add\n"));
1016 /* Note, we don't loop back the soft pointer. */
1017 sc->sc_last_qh->qh.qh_hlink =
1018 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1019 }
1020 }
1021
1022 void
1023 uhci_rem_loop(uhci_softc_t *sc) {
1024 #ifdef USB_DEBUG
1025 if (uhcinoloop)
1026 return;
1027 #endif
1028 if (--sc->sc_loops == 0) {
1029 DPRINTFN(5,("uhci_end_loop: remove\n"));
1030 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1031 }
1032 }
1033
1034 /* Add high speed control QH, called from a critical section. */
1035 void
1036 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1037 {
1038 uhci_soft_qh_t *eqh;
1039
1040 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1041 eqh = sc->sc_hctl_end;
1042 sqh->hlink = eqh->hlink;
1043 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1044 eqh->hlink = sqh;
1045 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1046 sc->sc_hctl_end = sqh;
1047 #ifdef UHCI_CTL_LOOP
1048 uhci_add_loop(sc);
1049 #endif
1050 }
1051
1052 /* Remove high speed control QH, called from a critical section. */
1053 void
1054 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1055 {
1056 uhci_soft_qh_t *pqh;
1057
1058 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1059 #ifdef UHCI_CTL_LOOP
1060 uhci_rem_loop(sc);
1061 #endif
1062 /*
1063 * The T bit should be set in the elink of the QH so that the HC
1064 * doesn't follow the pointer. This condition may fail if the
1065 * the transferred packet was short so that the QH still points
1066 * at the last used TD.
1067 * In this case we set the T bit and wait a little for the HC
1068 * to stop looking at the TD.
1069 */
1070 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1071 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1072 delay(UHCI_QH_REMOVE_DELAY);
1073 }
1074
1075 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1076 pqh->hlink = sqh->hlink;
1077 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1078 delay(UHCI_QH_REMOVE_DELAY);
1079 if (sc->sc_hctl_end == sqh)
1080 sc->sc_hctl_end = pqh;
1081 }
1082
1083 /* Add low speed control QH, called from a critical section. */
1084 void
1085 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1086 {
1087 uhci_soft_qh_t *eqh;
1088
1089 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1090 eqh = sc->sc_lctl_end;
1091 sqh->hlink = eqh->hlink;
1092 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1093 eqh->hlink = sqh;
1094 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1095 sc->sc_lctl_end = sqh;
1096 }
1097
1098 /* Remove low speed control QH, called from a critical section. */
1099 void
1100 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1101 {
1102 uhci_soft_qh_t *pqh;
1103
1104 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1105 /* See comment in uhci_remove_hs_ctrl() */
1106 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1107 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1108 delay(UHCI_QH_REMOVE_DELAY);
1109 }
1110 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1111 pqh->hlink = sqh->hlink;
1112 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1113 delay(UHCI_QH_REMOVE_DELAY);
1114 if (sc->sc_lctl_end == sqh)
1115 sc->sc_lctl_end = pqh;
1116 }
1117
1118 /* Add bulk QH, called from a critical section. */
1119 void
1120 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1121 {
1122 uhci_soft_qh_t *eqh;
1123
1124 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1125 eqh = sc->sc_bulk_end;
1126 sqh->hlink = eqh->hlink;
1127 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1128 eqh->hlink = sqh;
1129 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1130 sc->sc_bulk_end = sqh;
1131 uhci_add_loop(sc);
1132 }
1133
1134 /* Remove bulk QH, called from a critical section. */
1135 void
1136 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1137 {
1138 uhci_soft_qh_t *pqh;
1139
1140 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1141 uhci_rem_loop(sc);
1142 /* See comment in uhci_remove_hs_ctrl() */
1143 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1144 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1145 delay(UHCI_QH_REMOVE_DELAY);
1146 }
1147 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1148 pqh->hlink = sqh->hlink;
1149 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1150 delay(UHCI_QH_REMOVE_DELAY);
1151 if (sc->sc_bulk_end == sqh)
1152 sc->sc_bulk_end = pqh;
1153 }
1154
1155 Static int uhci_intr1(uhci_softc_t *);
1156
1157 int
1158 uhci_intr(void *arg)
1159 {
1160 uhci_softc_t *sc = arg;
1161
1162 if (sc->sc_dying || (sc->sc_flags & UHCI_SCFLG_DONEINIT) == 0)
1163 return (0);
1164
1165 DPRINTFN(15,("uhci_intr: real interrupt\n"));
1166 if (sc->sc_bus.use_polling) {
1167 #ifdef DIAGNOSTIC
1168 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1169 #endif
1170 return (0);
1171 }
1172
1173 return (uhci_intr1(sc));
1174 }
1175
1176 int
1177 uhci_intr1(uhci_softc_t *sc)
1178 {
1179
1180 int status;
1181 int ack;
1182
1183 /*
1184 * It can happen that an interrupt will be delivered to
1185 * us before the device has been fully attached and the
1186 * softc struct has been configured. Usually this happens
1187 * when kldloading the USB support as a module after the
1188 * system has been booted. If we detect this condition,
1189 * we need to squelch the unwanted interrupts until we're
1190 * ready for them.
1191 */
1192 if (sc->sc_bus.bdev == NULL) {
1193 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */
1194 uhci_run(sc, 0); /* stop the controller */
1195 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
1196 return(0);
1197 }
1198
1199 #ifdef USB_DEBUG
1200 if (uhcidebug > 15) {
1201 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1202 uhci_dumpregs(sc);
1203 }
1204 #endif
1205 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1206 if (status == 0) /* The interrupt was not for us. */
1207 return (0);
1208
1209 #if defined(DIAGNOSTIC) && defined(__NetBSD__)
1210 if (sc->sc_suspend != PWR_RESUME)
1211 kprintf("uhci_intr: suspended sts=0x%x\n", status);
1212 #endif
1213
1214 if (sc->sc_suspend != PWR_RESUME) {
1215 kprintf("%s: interrupt while not operating ignored\n",
1216 USBDEVNAME(sc->sc_bus.bdev));
1217 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1218 return (0);
1219 }
1220
1221 ack = 0;
1222 if (status & UHCI_STS_USBINT)
1223 ack |= UHCI_STS_USBINT;
1224 if (status & UHCI_STS_USBEI)
1225 ack |= UHCI_STS_USBEI;
1226 if (status & UHCI_STS_RD) {
1227 ack |= UHCI_STS_RD;
1228 #ifdef USB_DEBUG
1229 kprintf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1230 #endif
1231 }
1232 if (status & UHCI_STS_HSE) {
1233 ack |= UHCI_STS_HSE;
1234 kprintf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1235 }
1236 if (status & UHCI_STS_HCPE) {
1237 ack |= UHCI_STS_HCPE;
1238 kprintf("%s: host controller process error\n",
1239 USBDEVNAME(sc->sc_bus.bdev));
1240 }
1241 if (status & UHCI_STS_HCH) {
1242 /* no acknowledge needed */
1243 if (!sc->sc_dying) {
1244 kprintf("%s: host controller halted\n",
1245 USBDEVNAME(sc->sc_bus.bdev));
1246 #ifdef USB_DEBUG
1247 uhci_dump_all(sc);
1248 #endif
1249 }
1250 sc->sc_dying = 1;
1251 }
1252
1253 if (!ack)
1254 return (0); /* nothing to acknowledge */
1255 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1256
1257 sc->sc_bus.no_intrs++;
1258 usb_schedsoftintr(&sc->sc_bus);
1259
1260 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1261
1262 return (1);
1263 }
1264
1265 void
1266 uhci_softintr(void *v)
1267 {
1268 uhci_softc_t *sc = v;
1269 uhci_intr_info_t *ii, *nextii;
1270
1271 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1272 sc->sc_bus.intr_context));
1273
1274 sc->sc_bus.intr_context++;
1275
1276 /*
1277 * Interrupts on UHCI really suck. When the host controller
1278 * interrupts because a transfer is completed there is no
1279 * way of knowing which transfer it was. You can scan down
1280 * the TDs and QHs of the previous frame to limit the search,
1281 * but that assumes that the interrupt was not delayed by more
1282 * than 1 ms, which may not always be true (e.g. after debug
1283 * output on a slow console).
1284 * We scan all interrupt descriptors to see if any have
1285 * completed.
1286 */
1287 LIST_FOREACH_MUTABLE(ii, &sc->sc_intrhead, list, nextii)
1288 uhci_check_intr(sc, ii);
1289
1290 #ifdef USB_USE_SOFTINTR
1291 if (sc->sc_softwake) {
1292 sc->sc_softwake = 0;
1293 wakeup(&sc->sc_softwake);
1294 }
1295 #endif /* USB_USE_SOFTINTR */
1296
1297 sc->sc_bus.intr_context--;
1298 }
1299
1300 /* Check for an interrupt. */
1301 void
1302 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1303 {
1304 uhci_soft_td_t *std, *lstd;
1305 u_int32_t status;
1306
1307 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1308 #ifdef DIAGNOSTIC
1309 if (ii == NULL) {
1310 kprintf("uhci_check_intr: no ii? %p\n", ii);
1311 return;
1312 }
1313 #endif
1314 if (ii->xfer->status == USBD_CANCELLED ||
1315 ii->xfer->status == USBD_TIMEOUT) {
1316 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1317 return;
1318 }
1319
1320 if (ii->stdstart == NULL)
1321 return;
1322 lstd = ii->stdend;
1323 #ifdef DIAGNOSTIC
1324 if (lstd == NULL) {
1325 kprintf("uhci_check_intr: std==0\n");
1326 return;
1327 }
1328 #endif
1329 /*
1330 * If the last TD is still active we need to check whether there
1331 * is an error somewhere in the middle, or whether there was a
1332 * short packet (SPD and not ACTIVE).
1333 */
1334 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1335 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1336 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1337 status = le32toh(std->td.td_status);
1338 /* If there's an active TD the xfer isn't done. */
1339 if (status & UHCI_TD_ACTIVE)
1340 break;
1341 /* Any kind of error makes the xfer done. */
1342 if (status & UHCI_TD_STALLED)
1343 goto done;
1344 /* We want short packets, and it is short: it's done */
1345 if ((status & UHCI_TD_SPD) &&
1346 UHCI_TD_GET_ACTLEN(status) <
1347 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
1348 goto done;
1349 }
1350 }
1351 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1352 ii, ii->stdstart));
1353 return;
1354 }
1355 done:
1356 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1357 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1358 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
1359 uhci_idone(ii);
1360 }
1361
1362 /* Called from a critical section. */
1363 void
1364 uhci_idone(uhci_intr_info_t *ii)
1365 {
1366 usbd_xfer_handle xfer = ii->xfer;
1367 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1368 uhci_soft_td_t *std;
1369 u_int32_t status = 0, nstatus;
1370 int actlen;
1371
1372 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1373 #ifdef DIAGNOSTIC
1374 {
1375 crit_enter();
1376 if (ii->isdone) {
1377 crit_exit();
1378 #ifdef USB_DEBUG
1379 kprintf("uhci_idone: ii is done!\n ");
1380 uhci_dump_ii(ii);
1381 #else
1382 kprintf("uhci_idone: ii=%p is done!\n", ii);
1383 #endif
1384 return;
1385 }
1386 ii->isdone = 1;
1387 crit_exit();
1388 }
1389 #endif
1390
1391 if (xfer->nframes != 0) {
1392 /* Isoc transfer, do things differently. */
1393 uhci_soft_td_t **stds = upipe->u.iso.stds;
1394 int i, n, nframes, len;
1395
1396 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1397
1398 nframes = xfer->nframes;
1399 actlen = 0;
1400 n = UXFER(xfer)->curframe;
1401 for (i = 0; i < nframes; i++) {
1402 std = stds[n];
1403 #ifdef USB_DEBUG
1404 if (uhcidebug > 5) {
1405 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1406 uhci_dump_td(std);
1407 }
1408 #endif
1409 if (++n >= UHCI_VFRAMELIST_COUNT)
1410 n = 0;
1411 status = le32toh(std->td.td_status);
1412 len = UHCI_TD_GET_ACTLEN(status);
1413 xfer->frlengths[i] = len;
1414 actlen += len;
1415 }
1416 upipe->u.iso.inuse -= nframes;
1417 xfer->actlen = actlen;
1418 xfer->status = USBD_NORMAL_COMPLETION;
1419 goto end;
1420 }
1421
1422 #ifdef USB_DEBUG
1423 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1424 ii, xfer, upipe));
1425 if (uhcidebug > 10)
1426 uhci_dump_tds(ii->stdstart);
1427 #endif
1428
1429 /* The transfer is done, compute actual length and status. */
1430 actlen = 0;
1431 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1432 nstatus = le32toh(std->td.td_status);
1433 if (nstatus & UHCI_TD_ACTIVE)
1434 break;
1435
1436 status = nstatus;
1437 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1438 UHCI_TD_PID_SETUP) {
1439 actlen += UHCI_TD_GET_ACTLEN(status);
1440 } else {
1441 /*
1442 * UHCI will report CRCTO in addition to a STALL or NAK
1443 * for a SETUP transaction. See section 3.2.2, "TD
1444 * CONTROL AND STATUS".
1445 */
1446 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1447 status &= ~UHCI_TD_CRCTO;
1448 }
1449
1450 }
1451 /* If there are left over TDs we need to update the toggle. */
1452 if (std != NULL)
1453 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1454
1455 status &= UHCI_TD_ERROR;
1456 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1457 actlen, status));
1458 xfer->actlen = actlen;
1459 if (status != 0) {
1460 #ifdef USB_DEBUG
1461 char sbuf[128];
1462
1463 bitmask_snprintf((u_int32_t)status,
1464 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1465 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1466 sbuf, sizeof(sbuf));
1467
1468 DPRINTFN((status == UHCI_TD_STALLED)*10,
1469 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1470 "status 0x%s\n",
1471 xfer->pipe->device->address,
1472 xfer->pipe->endpoint->edesc->bEndpointAddress,
1473 sbuf));
1474 #endif
1475 if (status == UHCI_TD_STALLED)
1476 xfer->status = USBD_STALLED;
1477 else
1478 xfer->status = USBD_IOERROR; /* more info XXX */
1479 } else {
1480 xfer->status = USBD_NORMAL_COMPLETION;
1481 }
1482
1483 end:
1484 usb_transfer_complete(xfer);
1485 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1486 }
1487
1488 /*
1489 * Called when a request does not complete.
1490 */
1491 void
1492 uhci_timeout(void *addr)
1493 {
1494 uhci_intr_info_t *ii = addr;
1495 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1496 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1497 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1498
1499 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1500
1501 if (sc->sc_dying) {
1502 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1503 return;
1504 }
1505
1506 /* Execute the abort in a process context. */
1507 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1508 USB_TASKQ_HC);
1509 }
1510
1511 void
1512 uhci_timeout_task(void *addr)
1513 {
1514 usbd_xfer_handle xfer = addr;
1515
1516 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1517
1518 crit_enter();
1519 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1520 crit_exit();
1521 }
1522
1523 /*
1524 * Wait here until controller claims to have an interrupt.
1525 * Then call uhci_intr and return. Use timeout to avoid waiting
1526 * too long.
1527 * Only used during boot when interrupts are not enabled yet.
1528 */
1529 void
1530 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1531 {
1532 int timo = xfer->timeout;
1533 uhci_intr_info_t *ii;
1534
1535 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1536
1537 xfer->status = USBD_IN_PROGRESS;
1538 for (; timo >= 0; timo--) {
1539 usb_delay_ms(&sc->sc_bus, 1);
1540 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1541 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1542 uhci_intr1(sc);
1543 if (xfer->status != USBD_IN_PROGRESS)
1544 return;
1545 }
1546
1547 /* Timeout */
1548 DPRINTF(("uhci_waitintr: timeout\n"));
1549 for (ii = LIST_FIRST(&sc->sc_intrhead);
1550 ii != NULL && ii->xfer != xfer;
1551 ii = LIST_NEXT(ii, list))
1552 ;
1553 #ifdef DIAGNOSTIC
1554 if (ii == NULL)
1555 panic("uhci_waitintr: lost intr_info");
1556 #endif
1557 uhci_idone(ii);
1558 }
1559
1560 void
1561 uhci_poll(struct usbd_bus *bus)
1562 {
1563 uhci_softc_t *sc = (uhci_softc_t *)bus;
1564
1565 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1566 uhci_intr1(sc);
1567 }
1568
1569 void
1570 uhci_reset(uhci_softc_t *sc)
1571 {
1572 int n;
1573
1574 UHCICMD(sc, UHCI_CMD_HCRESET);
1575 /* The reset bit goes low when the controller is done. */
1576 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1577 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1578 usb_delay_ms(&sc->sc_bus, 1);
1579 if (n >= UHCI_RESET_TIMEOUT)
1580 kprintf("%s: controller did not reset\n",
1581 USBDEVNAME(sc->sc_bus.bdev));
1582 }
1583
1584 usbd_status
1585 uhci_run(uhci_softc_t *sc, int run)
1586 {
1587 int n, running;
1588 u_int16_t cmd;
1589
1590 run = run != 0;
1591 crit_enter();
1592 DPRINTF(("uhci_run: setting run=%d\n", run));
1593 cmd = UREAD2(sc, UHCI_CMD);
1594 if (run)
1595 cmd |= UHCI_CMD_RS;
1596 else
1597 cmd &= ~UHCI_CMD_RS;
1598 UHCICMD(sc, cmd);
1599 for(n = 0; n < 10; n++) {
1600 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1601 /* return when we've entered the state we want */
1602 if (run == running) {
1603 crit_exit();
1604 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1605 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1606 return (USBD_NORMAL_COMPLETION);
1607 }
1608 usb_delay_ms(&sc->sc_bus, 1);
1609 }
1610 crit_exit();
1611 kprintf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1612 run ? "start" : "stop");
1613 return (USBD_IOERROR);
1614 }
1615
1616 /*
1617 * Memory management routines.
1618 * uhci_alloc_std allocates TDs
1619 * uhci_alloc_sqh allocates QHs
1620 * These two routines do their own free list management,
1621 * partly for speed, partly because allocating DMAable memory
1622 * has page size granularaity so much memory would be wasted if
1623 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1624 */
1625
1626 uhci_soft_td_t *
1627 uhci_alloc_std(uhci_softc_t *sc)
1628 {
1629 uhci_soft_td_t *std;
1630 usbd_status err;
1631 int i, offs;
1632 usb_dma_t dma;
1633
1634 if (sc->sc_freetds == NULL) {
1635 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1636 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1637 UHCI_TD_ALIGN, &dma);
1638 if (err)
1639 return (0);
1640 for(i = 0; i < UHCI_STD_CHUNK; i++) {
1641 offs = i * UHCI_STD_SIZE;
1642 std = KERNADDR(&dma, offs);
1643 std->physaddr = DMAADDR(&dma, offs);
1644 std->link.std = sc->sc_freetds;
1645 sc->sc_freetds = std;
1646 }
1647 }
1648 std = sc->sc_freetds;
1649 sc->sc_freetds = std->link.std;
1650 memset(&std->td, 0, sizeof(uhci_td_t));
1651 return std;
1652 }
1653
1654 void
1655 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1656 {
1657 #ifdef DIAGNOSTIC
1658 #define TD_IS_FREE 0x12345678
1659 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1660 kprintf("uhci_free_std: freeing free TD %p\n", std);
1661 return;
1662 }
1663 std->td.td_token = htole32(TD_IS_FREE);
1664 #endif
1665 std->link.std = sc->sc_freetds;
1666 sc->sc_freetds = std;
1667 }
1668
1669 uhci_soft_qh_t *
1670 uhci_alloc_sqh(uhci_softc_t *sc)
1671 {
1672 uhci_soft_qh_t *sqh;
1673 usbd_status err;
1674 int i, offs;
1675 usb_dma_t dma;
1676
1677 if (sc->sc_freeqhs == NULL) {
1678 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1679 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1680 UHCI_QH_ALIGN, &dma);
1681 if (err)
1682 return (0);
1683 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1684 offs = i * UHCI_SQH_SIZE;
1685 sqh = KERNADDR(&dma, offs);
1686 sqh->physaddr = DMAADDR(&dma, offs);
1687 sqh->hlink = sc->sc_freeqhs;
1688 sc->sc_freeqhs = sqh;
1689 }
1690 }
1691 sqh = sc->sc_freeqhs;
1692 sc->sc_freeqhs = sqh->hlink;
1693 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1694 return (sqh);
1695 }
1696
1697 void
1698 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1699 {
1700 sqh->hlink = sc->sc_freeqhs;
1701 sc->sc_freeqhs = sqh;
1702 }
1703
1704 void
1705 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1706 uhci_soft_td_t *stdend)
1707 {
1708 uhci_soft_td_t *p;
1709
1710 for (; std != stdend; std = p) {
1711 p = std->link.std;
1712 uhci_free_std(sc, std);
1713 }
1714 }
1715
1716 usbd_status
1717 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1718 int rd, u_int16_t flags, usb_dma_t *dma,
1719 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1720 {
1721 uhci_soft_td_t *p, *lastp;
1722 uhci_physaddr_t lastlink;
1723 int i, ntd, l, tog, maxp;
1724 u_int32_t status;
1725 int addr = upipe->pipe.device->address;
1726 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1727
1728 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1729 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1730 upipe->pipe.device->speed, flags));
1731 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1732 if (maxp == 0) {
1733 kprintf("uhci_alloc_std_chain: maxp=0\n");
1734 return (USBD_INVAL);
1735 }
1736 ntd = (len + maxp - 1) / maxp;
1737 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1738 ntd++;
1739 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1740 if (ntd == 0) {
1741 *sp = *ep = 0;
1742 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1743 return (USBD_NORMAL_COMPLETION);
1744 }
1745 tog = upipe->nexttoggle;
1746 if (ntd % 2 == 0)
1747 tog ^= 1;
1748 upipe->nexttoggle = tog ^ 1;
1749 lastp = NULL;
1750 lastlink = UHCI_PTR_T;
1751 ntd--;
1752 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1753 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1754 status |= UHCI_TD_LS;
1755 if (flags & USBD_SHORT_XFER_OK)
1756 status |= UHCI_TD_SPD;
1757 for (i = ntd; i >= 0; i--) {
1758 p = uhci_alloc_std(sc);
1759 if (p == NULL) {
1760 uhci_free_std_chain(sc, lastp, NULL);
1761 return (USBD_NOMEM);
1762 }
1763 p->link.std = lastp;
1764 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1765 lastp = p;
1766 lastlink = p->physaddr;
1767 p->td.td_status = htole32(status);
1768 if (i == ntd) {
1769 /* last TD */
1770 l = len % maxp;
1771 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1772 l = maxp;
1773 *ep = p;
1774 } else
1775 l = maxp;
1776 p->td.td_token =
1777 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1778 UHCI_TD_OUT(l, endpt, addr, tog));
1779 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1780 tog ^= 1;
1781 }
1782 *sp = lastp;
1783 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1784 upipe->nexttoggle));
1785 return (USBD_NORMAL_COMPLETION);
1786 }
1787
1788 void
1789 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1790 {
1791 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1792 upipe->nexttoggle = 0;
1793 }
1794
1795 void
1796 uhci_noop(usbd_pipe_handle pipe)
1797 {
1798 }
1799
1800 usbd_status
1801 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1802 {
1803 usbd_status err;
1804
1805 /* Insert last in queue. */
1806 err = usb_insert_transfer(xfer);
1807 if (err)
1808 return (err);
1809
1810 /*
1811 * Pipe isn't running (otherwise err would be USBD_INPROG),
1812 * so start it first.
1813 */
1814 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1815 }
1816
1817 usbd_status
1818 uhci_device_bulk_start(usbd_xfer_handle xfer)
1819 {
1820 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1821 usbd_device_handle dev = upipe->pipe.device;
1822 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1823 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1824 uhci_soft_td_t *data, *dataend;
1825 uhci_soft_qh_t *sqh;
1826 usbd_status err;
1827 int len, isread, endpt;
1828
1829 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1830 xfer, xfer->length, xfer->flags, ii));
1831
1832 if (sc->sc_dying)
1833 return (USBD_IOERROR);
1834
1835 #ifdef DIAGNOSTIC
1836 if (xfer->rqflags & URQ_REQUEST)
1837 panic("uhci_device_bulk_transfer: a request");
1838 #endif
1839
1840 len = xfer->length;
1841 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1842 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1843 sqh = upipe->u.bulk.sqh;
1844
1845 upipe->u.bulk.isread = isread;
1846 upipe->u.bulk.length = len;
1847
1848 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1849 &xfer->dmabuf, &data, &dataend);
1850 if (err)
1851 return (err);
1852 dataend->td.td_status |= htole32(UHCI_TD_IOC);
1853
1854 #ifdef USB_DEBUG
1855 if (uhcidebug > 8) {
1856 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1857 uhci_dump_tds(data);
1858 }
1859 #endif
1860
1861 /* Set up interrupt info. */
1862 ii->xfer = xfer;
1863 ii->stdstart = data;
1864 ii->stdend = dataend;
1865 #ifdef DIAGNOSTIC
1866 if (!ii->isdone) {
1867 kprintf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1868 }
1869 ii->isdone = 0;
1870 #endif
1871
1872 sqh->elink = data;
1873 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1874
1875 crit_enter();
1876 uhci_add_bulk(sc, sqh);
1877 uhci_add_intr_info(sc, ii);
1878
1879 if (xfer->timeout && !sc->sc_bus.use_polling) {
1880 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1881 uhci_timeout, ii);
1882 }
1883 xfer->status = USBD_IN_PROGRESS;
1884 crit_exit();
1885
1886 #ifdef USB_DEBUG
1887 if (uhcidebug > 10) {
1888 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1889 uhci_dump_tds(data);
1890 }
1891 #endif
1892
1893 if (sc->sc_bus.use_polling)
1894 uhci_waitintr(sc, xfer);
1895
1896 return (USBD_IN_PROGRESS);
1897 }
1898
1899 /* Abort a device bulk request. */
1900 void
1901 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1902 {
1903 DPRINTF(("uhci_device_bulk_abort:\n"));
1904 uhci_abort_xfer(xfer, USBD_CANCELLED);
1905 }
1906
1907 /*
1908 * Abort a device request.
1909 * If this routine is called from a critical section. It guarantees that
1910 * the request will be removed from the hardware scheduling and that
1911 * the callback for it will be called with USBD_CANCELLED status.
1912 * It's impossible to guarantee that the requested transfer will not
1913 * have happened since the hardware runs concurrently.
1914 * If the transaction has already happened we rely on the ordinary
1915 * interrupt processing to process it.
1916 */
1917 void
1918 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1919 {
1920 struct uhci_xfer *uxfer = UXFER(xfer);
1921 uhci_intr_info_t *ii = &uxfer->iinfo;
1922 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1923 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1924 uhci_soft_td_t *std;
1925
1926 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1927
1928 if (sc->sc_dying) {
1929 /* If we're dying, just do the software part. */
1930 crit_enter();
1931 xfer->status = status; /* make software ignore it */
1932 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1933 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1934 usb_transfer_complete(xfer);
1935 crit_exit();
1936 return;
1937 }
1938
1939 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
1940 panic("uhci_abort_xfer: not in process context");
1941
1942 /*
1943 * If an abort is already in progress then just wait for it to
1944 * complete and return.
1945 */
1946 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
1947 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1948 /* No need to wait if we're aborting from a timeout. */
1949 if (status == USBD_TIMEOUT)
1950 return;
1951 /* Override the status which might be USBD_TIMEOUT. */
1952 xfer->status = status;
1953 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
1954 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
1955 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
1956 tsleep(&uxfer->uhci_xfer_flags, 0, "uhciaw", 0);
1957 return;
1958 }
1959
1960 /*
1961 * Step 1: Make interrupt routine and hardware ignore xfer.
1962 */
1963 crit_enter();
1964 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
1965 xfer->status = status; /* make software ignore it */
1966 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
1967 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1968 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1969 for (std = ii->stdstart; std != NULL; std = std->link.std)
1970 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1971 crit_exit();
1972
1973 /*
1974 * Step 2: Wait until we know hardware has finished any possible
1975 * use of the xfer. Also make sure the soft interrupt routine
1976 * has run.
1977 */
1978 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
1979 crit_enter();
1980 #ifdef USB_USE_SOFTINTR
1981 sc->sc_softwake = 1;
1982 #endif /* USB_USE_SOFTINTR */
1983 usb_schedsoftintr(&sc->sc_bus);
1984 #ifdef USB_USE_SOFTINTR
1985 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1986 tsleep(&sc->sc_softwake, 0, "uhciab", 0);
1987 #endif /* USB_USE_SOFTINTR */
1988
1989 /*
1990 * Step 3: Execute callback.
1991 */
1992 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1993 #ifdef DIAGNOSTIC
1994 ii->isdone = 1;
1995 #endif
1996 /* Do the wakeup first to avoid touching the xfer after the callback. */
1997 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTING;
1998 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT) {
1999 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTWAIT;
2000 wakeup(&uxfer->uhci_xfer_flags);
2001 }
2002 usb_transfer_complete(xfer);
2003 crit_exit();
2004 }
2005
2006 /* Close a device bulk pipe. */
2007 void
2008 uhci_device_bulk_close(usbd_pipe_handle pipe)
2009 {
2010 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2011 usbd_device_handle dev = upipe->pipe.device;
2012 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2013
2014 uhci_free_sqh(sc, upipe->u.bulk.sqh);
2015 pipe->endpoint->savedtoggle = upipe->nexttoggle;
2016 }
2017
2018 usbd_status
2019 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2020 {
2021 usbd_status err;
2022
2023 /* Insert last in queue. */
2024 err = usb_insert_transfer(xfer);
2025 if (err)
2026 return (err);
2027
2028 /*
2029 * Pipe isn't running (otherwise err would be USBD_INPROG),
2030 * so start it first.
2031 */
2032 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2033 }
2034
2035 usbd_status
2036 uhci_device_ctrl_start(usbd_xfer_handle xfer)
2037 {
2038 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2039 usbd_status err;
2040
2041 if (sc->sc_dying)
2042 return (USBD_IOERROR);
2043
2044 #ifdef DIAGNOSTIC
2045 if (!(xfer->rqflags & URQ_REQUEST))
2046 panic("uhci_device_ctrl_transfer: not a request");
2047 #endif
2048
2049 err = uhci_device_request(xfer);
2050 if (err)
2051 return (err);
2052
2053 if (sc->sc_bus.use_polling)
2054 uhci_waitintr(sc, xfer);
2055 return (USBD_IN_PROGRESS);
2056 }
2057
2058 usbd_status
2059 uhci_device_intr_transfer(usbd_xfer_handle xfer)
2060 {
2061 usbd_status err;
2062
2063 /* Insert last in queue. */
2064 err = usb_insert_transfer(xfer);
2065 if (err)
2066 return (err);
2067
2068 /*
2069 * Pipe isn't running (otherwise err would be USBD_INPROG),
2070 * so start it first.
2071 */
2072 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2073 }
2074
2075 usbd_status
2076 uhci_device_intr_start(usbd_xfer_handle xfer)
2077 {
2078 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2079 usbd_device_handle dev = upipe->pipe.device;
2080 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2081 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2082 uhci_soft_td_t *data, *dataend;
2083 uhci_soft_qh_t *sqh;
2084 usbd_status err;
2085 int isread, endpt;
2086 int i;
2087
2088 if (sc->sc_dying)
2089 return (USBD_IOERROR);
2090
2091 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2092 xfer, xfer->length, xfer->flags));
2093
2094 #ifdef DIAGNOSTIC
2095 if (xfer->rqflags & URQ_REQUEST)
2096 panic("uhci_device_intr_transfer: a request");
2097 #endif
2098
2099 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2100 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2101 sqh = upipe->u.bulk.sqh;
2102
2103 upipe->u.intr.isread = isread;
2104
2105 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2106 xfer->flags, &xfer->dmabuf, &data,
2107 &dataend);
2108 if (err)
2109 return (err);
2110 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2111
2112 #ifdef USB_DEBUG
2113 if (uhcidebug > 10) {
2114 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2115 uhci_dump_tds(data);
2116 uhci_dump_qh(upipe->u.intr.qhs[0]);
2117 }
2118 #endif
2119
2120 crit_enter();
2121 /* Set up interrupt info. */
2122 ii->xfer = xfer;
2123 ii->stdstart = data;
2124 ii->stdend = dataend;
2125 #ifdef DIAGNOSTIC
2126 if (!ii->isdone) {
2127 kprintf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2128 }
2129 ii->isdone = 0;
2130 #endif
2131
2132 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2133 upipe->u.intr.qhs[0]));
2134 for (i = 0; i < upipe->u.intr.npoll; i++) {
2135 sqh = upipe->u.intr.qhs[i];
2136 sqh->elink = data;
2137 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2138 }
2139 uhci_add_intr_info(sc, ii);
2140 xfer->status = USBD_IN_PROGRESS;
2141 crit_exit();
2142
2143 #ifdef USB_DEBUG
2144 if (uhcidebug > 10) {
2145 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2146 uhci_dump_tds(data);
2147 uhci_dump_qh(upipe->u.intr.qhs[0]);
2148 }
2149 #endif
2150
2151 return (USBD_IN_PROGRESS);
2152 }
2153
2154 /* Abort a device control request. */
2155 void
2156 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2157 {
2158 DPRINTF(("uhci_device_ctrl_abort:\n"));
2159 uhci_abort_xfer(xfer, USBD_CANCELLED);
2160 }
2161
2162 /* Close a device control pipe. */
2163 void
2164 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2165 {
2166 }
2167
2168 /* Abort a device interrupt request. */
2169 void
2170 uhci_device_intr_abort(usbd_xfer_handle xfer)
2171 {
2172 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2173 if (xfer->pipe->intrxfer == xfer) {
2174 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2175 xfer->pipe->intrxfer = NULL;
2176 }
2177 uhci_abort_xfer(xfer, USBD_CANCELLED);
2178 }
2179
2180 /* Close a device interrupt pipe. */
2181 void
2182 uhci_device_intr_close(usbd_pipe_handle pipe)
2183 {
2184 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2185 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2186 int i, npoll;
2187
2188 /* Unlink descriptors from controller data structures. */
2189 npoll = upipe->u.intr.npoll;
2190 crit_enter();
2191 for (i = 0; i < npoll; i++)
2192 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2193 crit_exit();
2194
2195 /*
2196 * We now have to wait for any activity on the physical
2197 * descriptors to stop.
2198 */
2199 usb_delay_ms(&sc->sc_bus, 2);
2200
2201 for(i = 0; i < npoll; i++)
2202 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2203 kfree(upipe->u.intr.qhs, M_USBHC);
2204
2205 /* XXX free other resources */
2206 }
2207
2208 usbd_status
2209 uhci_device_request(usbd_xfer_handle xfer)
2210 {
2211 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2212 usb_device_request_t *req = &xfer->request;
2213 usbd_device_handle dev = upipe->pipe.device;
2214 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2215 int addr = dev->address;
2216 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2217 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2218 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2219 uhci_soft_qh_t *sqh;
2220 int len;
2221 u_int32_t ls;
2222 usbd_status err;
2223 int isread;
2224
2225 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2226 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2227 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2228 UGETW(req->wIndex), UGETW(req->wLength),
2229 addr, endpt));
2230
2231 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2232 isread = req->bmRequestType & UT_READ;
2233 len = UGETW(req->wLength);
2234
2235 setup = upipe->u.ctl.setup;
2236 stat = upipe->u.ctl.stat;
2237 sqh = upipe->u.ctl.sqh;
2238
2239 /* Set up data transaction */
2240 if (len != 0) {
2241 upipe->nexttoggle = 1;
2242 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2243 &xfer->dmabuf, &data, &dataend);
2244 if (err)
2245 return (err);
2246 next = data;
2247 dataend->link.std = stat;
2248 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2249 } else {
2250 next = stat;
2251 }
2252 upipe->u.ctl.length = len;
2253
2254 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2255
2256 setup->link.std = next;
2257 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2258 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2259 UHCI_TD_ACTIVE);
2260 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2261 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2262 stat->link.std = NULL;
2263 stat->td.td_link = htole32(UHCI_PTR_T);
2264 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2265 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2266
2267 stat->td.td_token =
2268 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2269 UHCI_TD_IN (0, endpt, addr, 1));
2270 stat->td.td_buffer = htole32(0);
2271
2272 #ifdef USB_DEBUG
2273 if (uhcidebug > 10) {
2274 DPRINTF(("uhci_device_request: before transfer\n"));
2275 uhci_dump_tds(setup);
2276 }
2277 #endif
2278
2279 /* Set up interrupt info. */
2280 ii->xfer = xfer;
2281 ii->stdstart = setup;
2282 ii->stdend = stat;
2283 #ifdef DIAGNOSTIC
2284 if (!ii->isdone) {
2285 kprintf("uhci_device_request: not done, ii=%p\n", ii);
2286 }
2287 ii->isdone = 0;
2288 #endif
2289
2290 sqh->elink = setup;
2291 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2292
2293 crit_enter();
2294 if (dev->speed == USB_SPEED_LOW)
2295 uhci_add_ls_ctrl(sc, sqh);
2296 else
2297 uhci_add_hs_ctrl(sc, sqh);
2298 uhci_add_intr_info(sc, ii);
2299 #ifdef USB_DEBUG
2300 if (uhcidebug > 12) {
2301 uhci_soft_td_t *std;
2302 uhci_soft_qh_t *xqh;
2303 uhci_soft_qh_t *sxqh;
2304 int maxqh = 0;
2305 uhci_physaddr_t link;
2306 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2307 for (std = sc->sc_vframes[0].htd, link = 0;
2308 (link & UHCI_PTR_QH) == 0;
2309 std = std->link.std) {
2310 link = le32toh(std->td.td_link);
2311 uhci_dump_td(std);
2312 }
2313 sxqh = (uhci_soft_qh_t *)std;
2314 uhci_dump_qh(sxqh);
2315 for (xqh = sxqh;
2316 xqh != NULL;
2317 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2318 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2319 uhci_dump_qh(xqh);
2320 }
2321 DPRINTF(("Enqueued QH:\n"));
2322 uhci_dump_qh(sqh);
2323 uhci_dump_tds(sqh->elink);
2324 }
2325 #endif
2326 if (xfer->timeout && !sc->sc_bus.use_polling) {
2327 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2328 uhci_timeout, ii);
2329 }
2330 xfer->status = USBD_IN_PROGRESS;
2331 crit_exit();
2332
2333 return (USBD_NORMAL_COMPLETION);
2334 }
2335
2336 usbd_status
2337 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2338 {
2339 usbd_status err;
2340
2341 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2342
2343 /* Put it on our queue, */
2344 err = usb_insert_transfer(xfer);
2345
2346 /* bail out on error, */
2347 if (err && err != USBD_IN_PROGRESS)
2348 return (err);
2349
2350 /* XXX should check inuse here */
2351
2352 /* insert into schedule, */
2353 uhci_device_isoc_enter(xfer);
2354
2355 /* and start if the pipe wasn't running */
2356 if (!err)
2357 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2358
2359 return (err);
2360 }
2361
2362 void
2363 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2364 {
2365 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2366 usbd_device_handle dev = upipe->pipe.device;
2367 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2368 struct iso *iso = &upipe->u.iso;
2369 uhci_soft_td_t *std;
2370 u_int32_t buf, len, status;
2371 int i, next, nframes;
2372
2373 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2374 "nframes=%d\n",
2375 iso->inuse, iso->next, xfer, xfer->nframes));
2376
2377 if (sc->sc_dying)
2378 return;
2379
2380 if (xfer->status == USBD_IN_PROGRESS) {
2381 /* This request has already been entered into the frame list */
2382 kprintf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2383 /* XXX */
2384 }
2385
2386 #ifdef DIAGNOSTIC
2387 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2388 kprintf("uhci_device_isoc_enter: overflow!\n");
2389 #endif
2390
2391 next = iso->next;
2392 if (next == -1) {
2393 /* Not in use yet, schedule it a few frames ahead. */
2394 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2395 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2396 }
2397
2398 xfer->status = USBD_IN_PROGRESS;
2399 UXFER(xfer)->curframe = next;
2400
2401 buf = DMAADDR(&xfer->dmabuf, 0);
2402 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2403 UHCI_TD_ACTIVE |
2404 UHCI_TD_IOS);
2405 nframes = xfer->nframes;
2406 crit_enter();
2407 for (i = 0; i < nframes; i++) {
2408 std = iso->stds[next];
2409 if (++next >= UHCI_VFRAMELIST_COUNT)
2410 next = 0;
2411 len = xfer->frlengths[i];
2412 std->td.td_buffer = htole32(buf);
2413 if (i == nframes - 1)
2414 status |= UHCI_TD_IOC;
2415 std->td.td_status = htole32(status);
2416 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2417 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2418 #ifdef USB_DEBUG
2419 if (uhcidebug > 5) {
2420 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2421 uhci_dump_td(std);
2422 }
2423 #endif
2424 buf += len;
2425 }
2426 iso->next = next;
2427 iso->inuse += xfer->nframes;
2428
2429 crit_exit();
2430 }
2431
2432 usbd_status
2433 uhci_device_isoc_start(usbd_xfer_handle xfer)
2434 {
2435 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2436 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2437 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2438 uhci_soft_td_t *end;
2439 int i;
2440
2441 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2442
2443 if (sc->sc_dying)
2444 return (USBD_IOERROR);
2445
2446 #ifdef DIAGNOSTIC
2447 if (xfer->status != USBD_IN_PROGRESS)
2448 kprintf("uhci_device_isoc_start: not in progress %p\n", xfer);
2449 #endif
2450
2451 /* Find the last TD */
2452 i = UXFER(xfer)->curframe + xfer->nframes;
2453 if (i >= UHCI_VFRAMELIST_COUNT)
2454 i -= UHCI_VFRAMELIST_COUNT;
2455 end = upipe->u.iso.stds[i];
2456
2457 #ifdef DIAGNOSTIC
2458 if (end == NULL) {
2459 kprintf("uhci_device_isoc_start: end == NULL\n");
2460 return (USBD_INVAL);
2461 }
2462 #endif
2463
2464 crit_enter();
2465
2466 /* Set up interrupt info. */
2467 ii->xfer = xfer;
2468 ii->stdstart = end;
2469 ii->stdend = end;
2470 #ifdef DIAGNOSTIC
2471 if (!ii->isdone)
2472 kprintf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2473 ii->isdone = 0;
2474 #endif
2475 uhci_add_intr_info(sc, ii);
2476
2477 crit_exit();
2478
2479 return (USBD_IN_PROGRESS);
2480 }
2481
2482 void
2483 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2484 {
2485 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2486 uhci_soft_td_t **stds = upipe->u.iso.stds;
2487 uhci_soft_td_t *std;
2488 int i, n, nframes, maxlen, len;
2489
2490 crit_enter();
2491
2492 /* Transfer is already done. */
2493 if (xfer->status != USBD_NOT_STARTED &&
2494 xfer->status != USBD_IN_PROGRESS) {
2495 crit_exit();
2496 return;
2497 }
2498
2499 /* Give xfer the requested abort code. */
2500 xfer->status = USBD_CANCELLED;
2501
2502 /* make hardware ignore it, */
2503 nframes = xfer->nframes;
2504 n = UXFER(xfer)->curframe;
2505 maxlen = 0;
2506 for (i = 0; i < nframes; i++) {
2507 std = stds[n];
2508 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2509 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2510 if (len > maxlen)
2511 maxlen = len;
2512 if (++n >= UHCI_VFRAMELIST_COUNT)
2513 n = 0;
2514 }
2515
2516 /* and wait until we are sure the hardware has finished. */
2517 delay(maxlen);
2518
2519 #ifdef DIAGNOSTIC
2520 UXFER(xfer)->iinfo.isdone = 1;
2521 #endif
2522 /* Run callback and remove from interrupt list. */
2523 usb_transfer_complete(xfer);
2524
2525 crit_exit();
2526 }
2527
2528 void
2529 uhci_device_isoc_close(usbd_pipe_handle pipe)
2530 {
2531 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2532 usbd_device_handle dev = upipe->pipe.device;
2533 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2534 uhci_soft_td_t *std, *vstd;
2535 struct iso *iso;
2536 int i;
2537
2538 /*
2539 * Make sure all TDs are marked as inactive.
2540 * Wait for completion.
2541 * Unschedule.
2542 * Deallocate.
2543 */
2544 iso = &upipe->u.iso;
2545
2546 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2547 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2548 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2549
2550 crit_enter();
2551 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2552 std = iso->stds[i];
2553 for (vstd = sc->sc_vframes[i].htd;
2554 vstd != NULL && vstd->link.std != std;
2555 vstd = vstd->link.std)
2556 ;
2557 if (vstd == NULL) {
2558 /*panic*/
2559 kprintf("uhci_device_isoc_close: %p not found\n", std);
2560 crit_exit();
2561 return;
2562 }
2563 vstd->link = std->link;
2564 vstd->td.td_link = std->td.td_link;
2565 uhci_free_std(sc, std);
2566 }
2567 crit_exit();
2568
2569 kfree(iso->stds, M_USBHC);
2570 }
2571
2572 usbd_status
2573 uhci_setup_isoc(usbd_pipe_handle pipe)
2574 {
2575 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2576 usbd_device_handle dev = upipe->pipe.device;
2577 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2578 int addr = upipe->pipe.device->address;
2579 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2580 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2581 uhci_soft_td_t *std, *vstd;
2582 u_int32_t token;
2583 struct iso *iso;
2584 int i;
2585
2586 iso = &upipe->u.iso;
2587 iso->stds = kmalloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2588 M_USBHC, M_INTWAIT);
2589
2590 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2591 UHCI_TD_OUT(0, endpt, addr, 0);
2592
2593 /* Allocate the TDs and mark as inactive; */
2594 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2595 std = uhci_alloc_std(sc);
2596 if (std == 0)
2597 goto bad;
2598 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2599 std->td.td_token = htole32(token);
2600 iso->stds[i] = std;
2601 }
2602
2603 /* Insert TDs into schedule. */
2604 crit_enter();
2605 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2606 std = iso->stds[i];
2607 vstd = sc->sc_vframes[i].htd;
2608 std->link = vstd->link;
2609 std->td.td_link = vstd->td.td_link;
2610 vstd->link.std = std;
2611 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2612 }
2613 crit_exit();
2614
2615 iso->next = -1;
2616 iso->inuse = 0;
2617
2618 return (USBD_NORMAL_COMPLETION);
2619
2620 bad:
2621 while (--i >= 0)
2622 uhci_free_std(sc, iso->stds[i]);
2623 kfree(iso->stds, M_USBHC);
2624 return (USBD_NOMEM);
2625 }
2626
2627 void
2628 uhci_device_isoc_done(usbd_xfer_handle xfer)
2629 {
2630 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2631
2632 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2633
2634 if (ii->xfer != xfer)
2635 /* Not on interrupt list, ignore it. */
2636 return;
2637
2638 if (!uhci_active_intr_info(ii))
2639 return;
2640
2641 #ifdef DIAGNOSTIC
2642 if (xfer->busy_free != XFER_BUSY) {
2643 kprintf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2644 xfer, xfer->busy_free);
2645 return;
2646 }
2647
2648 if (ii->stdend == NULL) {
2649 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2650 #ifdef USB_DEBUG
2651 uhci_dump_ii(ii);
2652 #endif
2653 return;
2654 }
2655 #endif
2656
2657 /* Turn off the interrupt since it is active even if the TD is not. */
2658 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2659
2660 uhci_del_intr_info(ii); /* remove from active list */
2661
2662 #ifdef DIAGNOSTIC
2663 if (ii->stdend == NULL) {
2664 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2665 #ifdef USB_DEBUG
2666 uhci_dump_ii(ii);
2667 #endif
2668 return;
2669 }
2670 #endif
2671 }
2672
2673 void
2674 uhci_device_intr_done(usbd_xfer_handle xfer)
2675 {
2676 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2677 uhci_softc_t *sc = ii->sc;
2678 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2679 uhci_soft_qh_t *sqh;
2680 int i, npoll;
2681
2682 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2683
2684 npoll = upipe->u.intr.npoll;
2685 for(i = 0; i < npoll; i++) {
2686 sqh = upipe->u.intr.qhs[i];
2687 sqh->elink = NULL;
2688 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2689 }
2690 uhci_free_std_chain(sc, ii->stdstart, NULL);
2691
2692 /* XXX Wasteful. */
2693 if (xfer->pipe->repeat) {
2694 uhci_soft_td_t *data, *dataend;
2695
2696 DPRINTFN(5,("uhci_device_intr_done: requeueing\n"));
2697
2698 /* This alloc cannot fail since we freed the chain above. */
2699 uhci_alloc_std_chain(upipe, sc, xfer->length,
2700 upipe->u.intr.isread, xfer->flags,
2701 &xfer->dmabuf, &data, &dataend);
2702 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2703
2704 #ifdef USB_DEBUG
2705 if (uhcidebug > 10) {
2706 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2707 uhci_dump_tds(data);
2708 uhci_dump_qh(upipe->u.intr.qhs[0]);
2709 }
2710 #endif
2711
2712 ii->stdstart = data;
2713 ii->stdend = dataend;
2714 #ifdef DIAGNOSTIC
2715 if (!ii->isdone) {
2716 kprintf("uhci_device_intr_done: not done, ii=%p\n", ii);
2717 }
2718 ii->isdone = 0;
2719 #endif
2720 for (i = 0; i < npoll; i++) {
2721 sqh = upipe->u.intr.qhs[i];
2722 sqh->elink = data;
2723 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2724 }
2725 xfer->status = USBD_IN_PROGRESS;
2726 /* The ii is already on the examined list, just leave it. */
2727 } else {
2728 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2729 if (uhci_active_intr_info(ii))
2730 uhci_del_intr_info(ii);
2731 }
2732 }
2733
2734 /* Deallocate request data structures */
2735 void
2736 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2737 {
2738 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2739 uhci_softc_t *sc = ii->sc;
2740 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2741
2742 #ifdef DIAGNOSTIC
2743 if (!(xfer->rqflags & URQ_REQUEST))
2744 panic("uhci_device_ctrl_done: not a request");
2745 #endif
2746
2747 if (!uhci_active_intr_info(ii))
2748 return;
2749
2750 uhci_del_intr_info(ii); /* remove from active list */
2751
2752 if (upipe->pipe.device->speed == USB_SPEED_LOW)
2753 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2754 else
2755 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2756
2757 if (upipe->u.ctl.length != 0)
2758 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2759
2760 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2761 }
2762
2763 /* Deallocate request data structures */
2764 void
2765 uhci_device_bulk_done(usbd_xfer_handle xfer)
2766 {
2767 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2768 uhci_softc_t *sc = ii->sc;
2769 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2770
2771 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2772 xfer, ii, sc, upipe));
2773
2774 if (!uhci_active_intr_info(ii))
2775 return;
2776
2777 uhci_del_intr_info(ii); /* remove from active list */
2778
2779 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2780
2781 uhci_free_std_chain(sc, ii->stdstart, NULL);
2782
2783 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2784 }
2785
2786 /* Add interrupt QH, called with vflock. */
2787 void
2788 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2789 {
2790 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2791 uhci_soft_qh_t *eqh;
2792
2793 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2794
2795 eqh = vf->eqh;
2796 sqh->hlink = eqh->hlink;
2797 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2798 eqh->hlink = sqh;
2799 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2800 vf->eqh = sqh;
2801 vf->bandwidth++;
2802 }
2803
2804 /* Remove interrupt QH. */
2805 void
2806 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2807 {
2808 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2809 uhci_soft_qh_t *pqh;
2810
2811 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2812
2813 /* See comment in uhci_remove_ctrl() */
2814 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2815 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2816 delay(UHCI_QH_REMOVE_DELAY);
2817 }
2818
2819 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2820 pqh->hlink = sqh->hlink;
2821 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2822 delay(UHCI_QH_REMOVE_DELAY);
2823 if (vf->eqh == sqh)
2824 vf->eqh = pqh;
2825 vf->bandwidth--;
2826 }
2827
2828 usbd_status
2829 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2830 {
2831 uhci_soft_qh_t *sqh;
2832 int i, npoll;
2833 u_int bestbw, bw, bestoffs, offs;
2834
2835 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2836 if (ival == 0) {
2837 kprintf("uhci_setintr: 0 interval\n");
2838 return (USBD_INVAL);
2839 }
2840
2841 if (ival > UHCI_VFRAMELIST_COUNT)
2842 ival = UHCI_VFRAMELIST_COUNT;
2843 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2844 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2845
2846 upipe->u.intr.npoll = npoll;
2847 upipe->u.intr.qhs =
2848 kmalloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_INTWAIT);
2849
2850 /*
2851 * Figure out which offset in the schedule that has most
2852 * bandwidth left over.
2853 */
2854 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2855 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2856 for (bw = i = 0; i < npoll; i++)
2857 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2858 if (bw < bestbw) {
2859 bestbw = bw;
2860 bestoffs = offs;
2861 }
2862 }
2863 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2864
2865 for(i = 0; i < npoll; i++) {
2866 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2867 sqh->elink = NULL;
2868 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2869 sqh->pos = MOD(i * ival + bestoffs);
2870 }
2871 #undef MOD
2872
2873 crit_enter();
2874 /* Enter QHs into the controller data structures. */
2875 for(i = 0; i < npoll; i++)
2876 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2877 crit_exit();
2878
2879 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2880 return (USBD_NORMAL_COMPLETION);
2881 }
2882
2883 /* Open a new pipe. */
2884 usbd_status
2885 uhci_open(usbd_pipe_handle pipe)
2886 {
2887 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2888 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2889 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2890 usbd_status err;
2891 int ival;
2892
2893 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2894 pipe, pipe->device->address,
2895 ed->bEndpointAddress, sc->sc_addr));
2896
2897 upipe->aborting = 0;
2898 upipe->nexttoggle = pipe->endpoint->savedtoggle;
2899
2900 if (pipe->device->address == sc->sc_addr) {
2901 switch (ed->bEndpointAddress) {
2902 case USB_CONTROL_ENDPOINT:
2903 pipe->methods = &uhci_root_ctrl_methods;
2904 break;
2905 case UE_DIR_IN | UHCI_INTR_ENDPT:
2906 pipe->methods = &uhci_root_intr_methods;
2907 break;
2908 default:
2909 return (USBD_INVAL);
2910 }
2911 } else {
2912 switch (ed->bmAttributes & UE_XFERTYPE) {
2913 case UE_CONTROL:
2914 pipe->methods = &uhci_device_ctrl_methods;
2915 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2916 if (upipe->u.ctl.sqh == NULL)
2917 goto bad;
2918 upipe->u.ctl.setup = uhci_alloc_std(sc);
2919 if (upipe->u.ctl.setup == NULL) {
2920 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2921 goto bad;
2922 }
2923 upipe->u.ctl.stat = uhci_alloc_std(sc);
2924 if (upipe->u.ctl.stat == NULL) {
2925 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2926 uhci_free_std(sc, upipe->u.ctl.setup);
2927 goto bad;
2928 }
2929 err = usb_allocmem(&sc->sc_bus,
2930 sizeof(usb_device_request_t),
2931 0, &upipe->u.ctl.reqdma);
2932 if (err) {
2933 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2934 uhci_free_std(sc, upipe->u.ctl.setup);
2935 uhci_free_std(sc, upipe->u.ctl.stat);
2936 goto bad;
2937 }
2938 break;
2939 case UE_INTERRUPT:
2940 pipe->methods = &uhci_device_intr_methods;
2941 ival = pipe->interval;
2942 if (ival == USBD_DEFAULT_INTERVAL)
2943 ival = ed->bInterval;
2944 return (uhci_device_setintr(sc, upipe, ival));
2945 case UE_ISOCHRONOUS:
2946 pipe->methods = &uhci_device_isoc_methods;
2947 return (uhci_setup_isoc(pipe));
2948 case UE_BULK:
2949 pipe->methods = &uhci_device_bulk_methods;
2950 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2951 if (upipe->u.bulk.sqh == NULL)
2952 goto bad;
2953 break;
2954 }
2955 }
2956 return (USBD_NORMAL_COMPLETION);
2957
2958 bad:
2959 return (USBD_NOMEM);
2960 }
2961
2962 /*
2963 * Data structures and routines to emulate the root hub.
2964 */
2965 usb_device_descriptor_t uhci_devd = {
2966 USB_DEVICE_DESCRIPTOR_SIZE,
2967 UDESC_DEVICE, /* type */
2968 {0x00, 0x01}, /* USB version */
2969 UDCLASS_HUB, /* class */
2970 UDSUBCLASS_HUB, /* subclass */
2971 UDPROTO_FSHUB, /* protocol */
2972 64, /* max packet */
2973 {0},{0},{0x00,0x01}, /* device id */
2974 1,2,0, /* string indicies */
2975 1 /* # of configurations */
2976 };
2977
2978 usb_config_descriptor_t uhci_confd = {
2979 USB_CONFIG_DESCRIPTOR_SIZE,
2980 UDESC_CONFIG,
2981 {USB_CONFIG_DESCRIPTOR_SIZE +
2982 USB_INTERFACE_DESCRIPTOR_SIZE +
2983 USB_ENDPOINT_DESCRIPTOR_SIZE},
2984 1,
2985 1,
2986 0,
2987 UC_SELF_POWERED,
2988 0 /* max power */
2989 };
2990
2991 usb_interface_descriptor_t uhci_ifcd = {
2992 USB_INTERFACE_DESCRIPTOR_SIZE,
2993 UDESC_INTERFACE,
2994 0,
2995 0,
2996 1,
2997 UICLASS_HUB,
2998 UISUBCLASS_HUB,
2999 UIPROTO_FSHUB,
3000 0
3001 };
3002
3003 usb_endpoint_descriptor_t uhci_endpd = {
3004 USB_ENDPOINT_DESCRIPTOR_SIZE,
3005 UDESC_ENDPOINT,
3006 UE_DIR_IN | UHCI_INTR_ENDPT,
3007 UE_INTERRUPT,
3008 {8},
3009 255
3010 };
3011
3012 usb_hub_descriptor_t uhci_hubd_piix = {
3013 USB_HUB_DESCRIPTOR_SIZE,
3014 UDESC_HUB,
3015 2,
3016 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3017 50, /* power on to power good */
3018 0,
3019 { 0x00 }, /* both ports are removable */
3020 };
3021
3022 int
3023 uhci_str(usb_string_descriptor_t *p, int l, char *s)
3024 {
3025 int i;
3026
3027 if (l == 0)
3028 return (0);
3029 p->bLength = 2 * strlen(s) + 2;
3030 if (l == 1)
3031 return (1);
3032 p->bDescriptorType = UDESC_STRING;
3033 l -= 2;
3034 for (i = 0; s[i] && l > 1; i++, l -= 2)
3035 USETW2(p->bString[i], 0, s[i]);
3036 return (2*i+2);
3037 }
3038
3039 /*
3040 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3041 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3042 * should not be used by the USB subsystem. As we cannot issue a
3043 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3044 * will be enabled as part of the reset.
3045 *
3046 * On the VT83C572, the port cannot be successfully enabled until the
3047 * outstanding "port enable change" and "connection status change"
3048 * events have been reset.
3049 */
3050 Static usbd_status
3051 uhci_portreset(uhci_softc_t *sc, int index)
3052 {
3053 int lim, port, x;
3054
3055 if (index == 1)
3056 port = UHCI_PORTSC1;
3057 else if (index == 2)
3058 port = UHCI_PORTSC2;
3059 else
3060 return (USBD_IOERROR);
3061
3062 x = URWMASK(UREAD2(sc, port));
3063 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3064
3065 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3066
3067 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3068 index, UREAD2(sc, port)));
3069
3070 x = URWMASK(UREAD2(sc, port));
3071 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3072
3073 delay(100);
3074
3075 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3076 index, UREAD2(sc, port)));
3077
3078 x = URWMASK(UREAD2(sc, port));
3079 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3080
3081 for (lim = 10; --lim > 0;) {
3082 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3083
3084 x = UREAD2(sc, port);
3085
3086 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3087 index, lim, x));
3088
3089 if (!(x & UHCI_PORTSC_CCS)) {
3090 /*
3091 * No device is connected (or was disconnected
3092 * during reset). Consider the port reset.
3093 * The delay must be long enough to ensure on
3094 * the initial iteration that the device
3095 * connection will have been registered. 50ms
3096 * appears to be sufficient, but 20ms is not.
3097 */
3098 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3099 index, lim));
3100 break;
3101 }
3102
3103 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3104 /*
3105 * Port enabled changed and/or connection
3106 * status changed were set. Reset either or
3107 * both raised flags (by writing a 1 to that
3108 * bit), and wait again for state to settle.
3109 */
3110 UWRITE2(sc, port, URWMASK(x) |
3111 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3112 continue;
3113 }
3114
3115 if (x & UHCI_PORTSC_PE)
3116 /* Port is enabled */
3117 break;
3118
3119 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3120 }
3121
3122 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3123 index, UREAD2(sc, port)));
3124
3125 if (lim <= 0) {
3126 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3127 return (USBD_TIMEOUT);
3128 }
3129
3130 sc->sc_isreset = 1;
3131 return (USBD_NORMAL_COMPLETION);
3132 }
3133
3134 /*
3135 * Simulate a hardware hub by handling all the necessary requests.
3136 */
3137 usbd_status
3138 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3139 {
3140 usbd_status err;
3141
3142 /* Insert last in queue. */
3143 err = usb_insert_transfer(xfer);
3144 if (err)
3145 return (err);
3146
3147 /*
3148 * Pipe isn't running (otherwise err would be USBD_INPROG),
3149 * so start it first.
3150 */
3151 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3152 }
3153
3154 usbd_status
3155 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3156 {
3157 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3158 usb_device_request_t *req;
3159 void *buf = NULL;
3160 int port, x;
3161 int len, value, index, status, change, l, totlen = 0;
3162 usb_port_status_t ps;
3163 usbd_status err;
3164
3165 if (sc->sc_dying)
3166 return (USBD_IOERROR);
3167
3168 #ifdef DIAGNOSTIC
3169 if (!(xfer->rqflags & URQ_REQUEST))
3170 panic("uhci_root_ctrl_transfer: not a request");
3171 #endif
3172 req = &xfer->request;
3173
3174 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3175 req->bmRequestType, req->bRequest));
3176
3177 len = UGETW(req->wLength);
3178 value = UGETW(req->wValue);
3179 index = UGETW(req->wIndex);
3180
3181 if (len != 0)
3182 buf = KERNADDR(&xfer->dmabuf, 0);
3183
3184 #define C(x,y) ((x) | ((y) << 8))
3185 switch(C(req->bRequest, req->bmRequestType)) {
3186 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3187 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3188 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3189 /*
3190 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3191 * for the integrated root hub.
3192 */
3193 break;
3194 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3195 if (len > 0) {
3196 *(u_int8_t *)buf = sc->sc_conf;
3197 totlen = 1;
3198 }
3199 break;
3200 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3201 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3202 switch(value >> 8) {
3203 case UDESC_DEVICE:
3204 if ((value & 0xff) != 0) {
3205 err = USBD_IOERROR;
3206 goto ret;
3207 }
3208 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3209 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3210 memcpy(buf, &uhci_devd, l);
3211 break;
3212 case UDESC_CONFIG:
3213 if ((value & 0xff) != 0) {
3214 err = USBD_IOERROR;
3215 goto ret;
3216 }
3217 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3218 memcpy(buf, &uhci_confd, l);
3219 buf = (char *)buf + l;
3220 len -= l;
3221 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3222 totlen += l;
3223 memcpy(buf, &uhci_ifcd, l);
3224 buf = (char *)buf + l;
3225 len -= l;
3226 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3227 totlen += l;
3228 memcpy(buf, &uhci_endpd, l);
3229 break;
3230 case UDESC_STRING:
3231 if (len == 0)
3232 break;
3233 *(u_int8_t *)buf = 0;
3234 totlen = 1;
3235 switch (value & 0xff) {
3236 case 1: /* Vendor */
3237 totlen = uhci_str(buf, len, sc->sc_vendor);
3238 break;
3239 case 2: /* Product */
3240 totlen = uhci_str(buf, len, "UHCI root hub");
3241 break;
3242 }
3243 break;
3244 default:
3245 err = USBD_IOERROR;
3246 goto ret;
3247 }
3248 break;
3249 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3250 if (len > 0) {
3251 *(u_int8_t *)buf = 0;
3252 totlen = 1;
3253 }
3254 break;
3255 case C(UR_GET_STATUS, UT_READ_DEVICE):
3256 if (len > 1) {
3257 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3258 totlen = 2;
3259 }
3260 break;
3261 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3262 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3263 if (len > 1) {
3264 USETW(((usb_status_t *)buf)->wStatus, 0);
3265 totlen = 2;
3266 }
3267 break;
3268 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3269 if (value >= USB_MAX_DEVICES) {
3270 err = USBD_IOERROR;
3271 goto ret;
3272 }
3273 sc->sc_addr = value;
3274 break;
3275 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3276 if (value != 0 && value != 1) {
3277 err = USBD_IOERROR;
3278 goto ret;
3279 }
3280 sc->sc_conf = value;
3281 break;
3282 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3283 break;
3284 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3285 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3286 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3287 err = USBD_IOERROR;
3288 goto ret;
3289 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3290 break;
3291 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3292 break;
3293 /* Hub requests */
3294 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3295 break;
3296 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3297 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3298 "port=%d feature=%d\n",
3299 index, value));
3300 if (index == 1)
3301 port = UHCI_PORTSC1;
3302 else if (index == 2)
3303 port = UHCI_PORTSC2;
3304 else {
3305 err = USBD_IOERROR;
3306 goto ret;
3307 }
3308 switch(value) {
3309 case UHF_PORT_ENABLE:
3310 x = URWMASK(UREAD2(sc, port));
3311 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3312 break;
3313 case UHF_PORT_SUSPEND:
3314 x = URWMASK(UREAD2(sc, port));
3315 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3316 break;
3317 case UHF_PORT_RESET:
3318 x = URWMASK(UREAD2(sc, port));
3319 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3320 break;
3321 case UHF_C_PORT_CONNECTION:
3322 x = URWMASK(UREAD2(sc, port));
3323 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3324 break;
3325 case UHF_C_PORT_ENABLE:
3326 x = URWMASK(UREAD2(sc, port));
3327 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3328 break;
3329 case UHF_C_PORT_OVER_CURRENT:
3330 x = URWMASK(UREAD2(sc, port));
3331 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3332 break;
3333 case UHF_C_PORT_RESET:
3334 sc->sc_isreset = 0;
3335 err = USBD_NORMAL_COMPLETION;
3336 goto ret;
3337 case UHF_PORT_CONNECTION:
3338 case UHF_PORT_OVER_CURRENT:
3339 case UHF_PORT_POWER:
3340 case UHF_PORT_LOW_SPEED:
3341 case UHF_C_PORT_SUSPEND:
3342 default:
3343 err = USBD_IOERROR;
3344 goto ret;
3345 }
3346 break;
3347 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3348 if (index == 1)
3349 port = UHCI_PORTSC1;
3350 else if (index == 2)
3351 port = UHCI_PORTSC2;
3352 else {
3353 err = USBD_IOERROR;
3354 goto ret;
3355 }
3356 if (len > 0) {
3357 *(u_int8_t *)buf =
3358 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3359 UHCI_PORTSC_LS_SHIFT;
3360 totlen = 1;
3361 }
3362 break;
3363 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3364 if ((value & 0xff) != 0) {
3365 err = USBD_IOERROR;
3366 goto ret;
3367 }
3368 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3369 totlen = l;
3370 memcpy(buf, &uhci_hubd_piix, l);
3371 break;
3372 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3373 if (len != 4) {
3374 err = USBD_IOERROR;
3375 goto ret;
3376 }
3377 memset(buf, 0, len);
3378 totlen = len;
3379 break;
3380 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3381 if (index == 1)
3382 port = UHCI_PORTSC1;
3383 else if (index == 2)
3384 port = UHCI_PORTSC2;
3385 else {
3386 err = USBD_IOERROR;
3387 goto ret;
3388 }
3389 if (len != 4) {
3390 err = USBD_IOERROR;
3391 goto ret;
3392 }
3393 x = UREAD2(sc, port);
3394 status = change = 0;
3395 if (x & UHCI_PORTSC_CCS)
3396 status |= UPS_CURRENT_CONNECT_STATUS;
3397 if (x & UHCI_PORTSC_CSC)
3398 change |= UPS_C_CONNECT_STATUS;
3399 if (x & UHCI_PORTSC_PE)
3400 status |= UPS_PORT_ENABLED;
3401 if (x & UHCI_PORTSC_POEDC)
3402 change |= UPS_C_PORT_ENABLED;
3403 if (x & UHCI_PORTSC_OCI)
3404 status |= UPS_OVERCURRENT_INDICATOR;
3405 if (x & UHCI_PORTSC_OCIC)
3406 change |= UPS_C_OVERCURRENT_INDICATOR;
3407 if (x & UHCI_PORTSC_SUSP)
3408 status |= UPS_SUSPEND;
3409 if (x & UHCI_PORTSC_LSDA)
3410 status |= UPS_LOW_SPEED;
3411 status |= UPS_PORT_POWER;
3412 if (sc->sc_isreset)
3413 change |= UPS_C_PORT_RESET;
3414 USETW(ps.wPortStatus, status);
3415 USETW(ps.wPortChange, change);
3416 l = min(len, sizeof ps);
3417 memcpy(buf, &ps, l);
3418 totlen = l;
3419 break;
3420 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3421 err = USBD_IOERROR;
3422 goto ret;
3423 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3424 break;
3425 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3426 if (index == 1)
3427 port = UHCI_PORTSC1;
3428 else if (index == 2)
3429 port = UHCI_PORTSC2;
3430 else {
3431 err = USBD_IOERROR;
3432 goto ret;
3433 }
3434 switch(value) {
3435 case UHF_PORT_ENABLE:
3436 x = URWMASK(UREAD2(sc, port));
3437 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3438 break;
3439 case UHF_PORT_SUSPEND:
3440 x = URWMASK(UREAD2(sc, port));
3441 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3442 break;
3443 case UHF_PORT_RESET:
3444 err = uhci_portreset(sc, index);
3445 goto ret;
3446 case UHF_PORT_POWER:
3447 /* Pretend we turned on power */
3448 err = USBD_NORMAL_COMPLETION;
3449 goto ret;
3450 case UHF_C_PORT_CONNECTION:
3451 case UHF_C_PORT_ENABLE:
3452 case UHF_C_PORT_OVER_CURRENT:
3453 case UHF_PORT_CONNECTION:
3454 case UHF_PORT_OVER_CURRENT:
3455 case UHF_PORT_LOW_SPEED:
3456 case UHF_C_PORT_SUSPEND:
3457 case UHF_C_PORT_RESET:
3458 default:
3459 err = USBD_IOERROR;
3460 goto ret;
3461 }
3462 break;
3463 default:
3464 err = USBD_IOERROR;
3465 goto ret;
3466 }
3467 xfer->actlen = totlen;
3468 err = USBD_NORMAL_COMPLETION;
3469 ret:
3470 xfer->status = err;
3471 crit_enter();
3472 usb_transfer_complete(xfer);
3473 crit_exit();
3474 return (USBD_IN_PROGRESS);
3475 }
3476
3477 /* Abort a root control request. */
3478 void
3479 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3480 {
3481 /* Nothing to do, all transfers are synchronous. */
3482 }
3483
3484 /* Close the root pipe. */
3485 void
3486 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3487 {
3488 DPRINTF(("uhci_root_ctrl_close\n"));
3489 }
3490
3491 /* Abort a root interrupt request. */
3492 void
3493 uhci_root_intr_abort(usbd_xfer_handle xfer)
3494 {
3495 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3496
3497 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3498 sc->sc_intr_xfer = NULL;
3499
3500 if (xfer->pipe->intrxfer == xfer) {
3501 DPRINTF(("uhci_root_intr_abort: remove\n"));
3502 xfer->pipe->intrxfer = 0;
3503 }
3504 xfer->status = USBD_CANCELLED;
3505 #ifdef DIAGNOSTIC
3506 UXFER(xfer)->iinfo.isdone = 1;
3507 #endif
3508 usb_transfer_complete(xfer);
3509 }
3510
3511 usbd_status
3512 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3513 {
3514 usbd_status err;
3515
3516 /* Insert last in queue. */
3517 err = usb_insert_transfer(xfer);
3518 if (err)
3519 return (err);
3520
3521 /*
3522 * Pipe isn't running (otherwise err would be USBD_INPROG),
3523 * so start it first.
3524 */
3525 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3526 }
3527
3528 /* Start a transfer on the root interrupt pipe */
3529 usbd_status
3530 uhci_root_intr_start(usbd_xfer_handle xfer)
3531 {
3532 usbd_pipe_handle pipe = xfer->pipe;
3533 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3534
3535 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3536 xfer, xfer->length, xfer->flags));
3537
3538 if (sc->sc_dying)
3539 return (USBD_IOERROR);
3540
3541 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3542 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3543 sc->sc_intr_xfer = xfer;
3544 return (USBD_IN_PROGRESS);
3545 }
3546
3547 /* Close the root interrupt pipe. */
3548 void
3549 uhci_root_intr_close(usbd_pipe_handle pipe)
3550 {
3551 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3552
3553 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3554 sc->sc_intr_xfer = NULL;
3555 DPRINTF(("uhci_root_intr_close\n"));
3556 }
DragonFly vkernel multiprocessor port