Implement struct lwp->lwp_vmspace. Leave p_vmspace intact. This allows
[dragonfly/vkernel-mp.git] / sys / platform / pc32 / i386 / swtch.s
blob11812b89fe0722f7a712b283f00b210da2252c85
1 /*
2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
34 * Copyright (c) 1990 The Regents of the University of California.
35 * All rights reserved.
37 * This code is derived from software contributed to Berkeley by
38 * William Jolitz.
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. All advertising materials mentioning features or use of this software
49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
51 * California, Berkeley and its contributors.
52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * SUCH DAMAGE.
68 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
69 * $DragonFly: src/sys/platform/pc32/i386/swtch.s,v 1.47 2007/06/29 21:54:10 dillon Exp $
72 #include "use_npx.h"
74 #include <sys/rtprio.h>
76 #include <machine/asmacros.h>
77 #include <machine/segments.h>
79 #include <machine/pmap.h>
80 #include <machine_base/apic/apicreg.h>
81 #include <machine/lock.h>
83 #include "assym.s"
85 #if defined(SMP)
86 #define MPLOCKED lock ;
87 #else
88 #define MPLOCKED
89 #endif
91 .data
93 .globl panic
95 #if defined(SWTCH_OPTIM_STATS)
96 .globl swtch_optim_stats, tlb_flush_count
97 swtch_optim_stats: .long 0 /* number of _swtch_optims */
98 tlb_flush_count: .long 0
99 #endif
101 .text
105 * cpu_heavy_switch(next_thread)
107 * Switch from the current thread to a new thread. This entry
108 * is normally called via the thread->td_switch function, and will
109 * only be called when the current thread is a heavy weight process.
111 * Some instructions have been reordered to reduce pipeline stalls.
113 * YYY disable interrupts once giant is removed.
115 ENTRY(cpu_heavy_switch)
117 * Save general regs
119 movl PCPU(curthread),%ecx
120 movl (%esp),%eax /* (reorder optimization) */
121 movl TD_PCB(%ecx),%edx /* EDX = PCB */
122 movl %eax,PCB_EIP(%edx) /* return PC may be modified */
123 movl %ebx,PCB_EBX(%edx)
124 movl %esp,PCB_ESP(%edx)
125 movl %ebp,PCB_EBP(%edx)
126 movl %esi,PCB_ESI(%edx)
127 movl %edi,PCB_EDI(%edx)
129 movl %ecx,%ebx /* EBX = curthread */
130 movl TD_LWP(%ecx),%ecx
131 movl PCPU(cpuid), %eax
132 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
133 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
136 * Push the LWKT switch restore function, which resumes a heavy
137 * weight process. Note that the LWKT switcher is based on
138 * TD_SP, while the heavy weight process switcher is based on
139 * PCB_ESP. TD_SP is usually two ints pushed relative to
140 * PCB_ESP. We push the flags for later restore by cpu_heavy_restore.
142 pushfl
143 pushl $cpu_heavy_restore
144 movl %esp,TD_SP(%ebx)
147 * Save debug regs if necessary
149 movb PCB_FLAGS(%edx),%al
150 andb $PCB_DBREGS,%al
151 jz 1f /* no, skip over */
152 movl %dr7,%eax /* yes, do the save */
153 movl %eax,PCB_DR7(%edx)
154 andl $0x0000fc00, %eax /* disable all watchpoints */
155 movl %eax,%dr7
156 movl %dr6,%eax
157 movl %eax,PCB_DR6(%edx)
158 movl %dr3,%eax
159 movl %eax,PCB_DR3(%edx)
160 movl %dr2,%eax
161 movl %eax,PCB_DR2(%edx)
162 movl %dr1,%eax
163 movl %eax,PCB_DR1(%edx)
164 movl %dr0,%eax
165 movl %eax,PCB_DR0(%edx)
168 #if NNPX > 0
170 * Save the FP state if we have used the FP. Note that calling
171 * npxsave will NULL out PCPU(npxthread).
173 cmpl %ebx,PCPU(npxthread)
174 jne 1f
175 pushl TD_SAVEFPU(%ebx)
176 call npxsave /* do it in a big C function */
177 addl $4,%esp /* EAX, ECX, EDX trashed */
179 #endif /* NNPX > 0 */
182 * Switch to the next thread, which was passed as an argument
183 * to cpu_heavy_switch(). Due to the eflags and switch-restore
184 * function we pushed, the argument is at 12(%esp). Set the current
185 * thread, load the stack pointer, and 'ret' into the switch-restore
186 * function.
188 * The switch restore function expects the new thread to be in %eax
189 * and the old one to be in %ebx.
191 * There is a one-instruction window where curthread is the new
192 * thread but %esp still points to the old thread's stack, but
193 * we are protected by a critical section so it is ok.
195 movl 12(%esp),%eax /* EAX = newtd, EBX = oldtd */
196 movl %eax,PCPU(curthread)
197 movl TD_SP(%eax),%esp
201 * cpu_exit_switch()
203 * The switch function is changed to this when a thread is going away
204 * for good. We have to ensure that the MMU state is not cached, and
205 * we don't bother saving the existing thread state before switching.
207 * At this point we are in a critical section and this cpu owns the
208 * thread's token, which serves as an interlock until the switchout is
209 * complete.
211 ENTRY(cpu_exit_switch)
213 * Get us out of the vmspace
215 movl IdlePTD,%ecx
216 movl %cr3,%eax
217 cmpl %ecx,%eax
218 je 1f
219 movl %ecx,%cr3
221 movl PCPU(curthread),%ebx
224 * If this is a process/lwp, deactivate the pmap after we've
225 * switched it out.
227 movl TD_LWP(%ebx),%ecx
228 testl %ecx,%ecx
229 jz 2f
230 movl PCPU(cpuid), %eax
231 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
232 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
235 * Switch to the next thread. RET into the restore function, which
236 * expects the new thread in EAX and the old in EBX.
238 * There is a one-instruction window where curthread is the new
239 * thread but %esp still points to the old thread's stack, but
240 * we are protected by a critical section so it is ok.
242 movl 4(%esp),%eax
243 movl %eax,PCPU(curthread)
244 movl TD_SP(%eax),%esp
248 * cpu_heavy_restore() (current thread in %eax on entry)
250 * Restore the thread after an LWKT switch. This entry is normally
251 * called via the LWKT switch restore function, which was pulled
252 * off the thread stack and jumped to.
254 * This entry is only called if the thread was previously saved
255 * using cpu_heavy_switch() (the heavy weight process thread switcher),
256 * or when a new process is initially scheduled. The first thing we
257 * do is clear the TDF_RUNNING bit in the old thread and set it in the
258 * new thread.
260 * NOTE: The lwp may be in any state, not necessarily LSRUN, because
261 * a preemption switch may interrupt the process and then return via
262 * cpu_heavy_restore.
264 * YYY theoretically we do not have to restore everything here, a lot
265 * of this junk can wait until we return to usermode. But for now
266 * we restore everything.
268 * YYY the PCB crap is really crap, it makes startup a bitch because
269 * we can't switch away.
271 * YYY note: spl check is done in mi_switch when it splx()'s.
274 ENTRY(cpu_heavy_restore)
275 popfl
276 movl TD_PCB(%eax),%edx /* EDX = PCB */
277 movl TD_LWP(%eax),%ecx
279 #if defined(SWTCH_OPTIM_STATS)
280 incl _swtch_optim_stats
281 #endif
283 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
284 * safely test/reload %cr3 until after we have set the bit in the
285 * pmap (remember, we do not hold the MP lock in the switch code).
287 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
288 movl PCPU(cpuid), %esi
289 MPLOCKED btsl %esi, VM_PMAP+PM_ACTIVE(%ecx)
292 * Restore the MMU address space. If it is the same as the last
293 * thread we don't have to invalidate the tlb (i.e. reload cr3).
294 * YYY which naturally also means that the PM_ACTIVE bit had better
295 * already have been set before we set it above, check? YYY
297 movl %cr3,%esi
298 movl PCB_CR3(%edx),%ecx
299 cmpl %esi,%ecx
300 je 4f
301 #if defined(SWTCH_OPTIM_STATS)
302 decl _swtch_optim_stats
303 incl _tlb_flush_count
304 #endif
305 movl %ecx,%cr3
308 * Clear TDF_RUNNING flag in old thread only after cleaning up
309 * %cr3. The target thread is already protected by being TDF_RUNQ
310 * so setting TDF_RUNNING isn't as big a deal.
312 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
313 orl $TDF_RUNNING,TD_FLAGS(%eax)
316 * Deal with the PCB extension, restore the private tss
318 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
319 movl $1,%ebx /* maybe mark use of a private tss */
320 testl %edi,%edi
321 jnz 2f
324 * Going back to the common_tss. We may need to update TSS_ESP0
325 * which sets the top of the supervisor stack when entering from
326 * usermode. The PCB is at the top of the stack but we need another
327 * 16 bytes to take vm86 into account.
329 leal -16(%edx),%ebx
330 movl %ebx, PCPU(common_tss) + TSS_ESP0
332 cmpl $0,PCPU(private_tss) /* don't have to reload if */
333 je 3f /* already using the common TSS */
335 subl %ebx,%ebx /* unmark use of private tss */
338 * Get the address of the common TSS descriptor for the ltr.
339 * There is no way to get the address of a segment-accessed variable
340 * so we store a self-referential pointer at the base of the per-cpu
341 * data area and add the appropriate offset.
343 movl $gd_common_tssd, %edi
344 addl %fs:0, %edi
347 * Move the correct TSS descriptor into the GDT slot, then reload
348 * ltr.
351 movl %ebx,PCPU(private_tss) /* mark/unmark private tss */
352 movl PCPU(tss_gdt), %ebx /* entry in GDT */
353 movl 0(%edi), %eax
354 movl %eax, 0(%ebx)
355 movl 4(%edi), %eax
356 movl %eax, 4(%ebx)
357 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
358 ltr %si
362 * Restore general registers.
364 movl PCB_EBX(%edx),%ebx
365 movl PCB_ESP(%edx),%esp
366 movl PCB_EBP(%edx),%ebp
367 movl PCB_ESI(%edx),%esi
368 movl PCB_EDI(%edx),%edi
369 movl PCB_EIP(%edx),%eax
370 movl %eax,(%esp)
373 * Restore the user LDT if we have one
375 cmpl $0, PCB_USERLDT(%edx)
376 jnz 1f
377 movl _default_ldt,%eax
378 cmpl PCPU(currentldt),%eax
379 je 2f
380 lldt _default_ldt
381 movl %eax,PCPU(currentldt)
382 jmp 2f
383 1: pushl %edx
384 call set_user_ldt
385 popl %edx
388 * Restore the user TLS if we have one
390 pushl %edx
391 call set_user_TLS
392 popl %edx
395 * Restore the DEBUG register state if necessary.
397 movb PCB_FLAGS(%edx),%al
398 andb $PCB_DBREGS,%al
399 jz 1f /* no, skip over */
400 movl PCB_DR6(%edx),%eax /* yes, do the restore */
401 movl %eax,%dr6
402 movl PCB_DR3(%edx),%eax
403 movl %eax,%dr3
404 movl PCB_DR2(%edx),%eax
405 movl %eax,%dr2
406 movl PCB_DR1(%edx),%eax
407 movl %eax,%dr1
408 movl PCB_DR0(%edx),%eax
409 movl %eax,%dr0
410 movl %dr7,%eax /* load dr7 so as not to disturb */
411 andl $0x0000fc00,%eax /* reserved bits */
412 pushl %ebx
413 movl PCB_DR7(%edx),%ebx
414 andl $~0x0000fc00,%ebx
415 orl %ebx,%eax
416 popl %ebx
417 movl %eax,%dr7
423 * savectx(pcb)
425 * Update pcb, saving current processor state.
427 ENTRY(savectx)
428 /* fetch PCB */
429 movl 4(%esp),%ecx
431 /* caller's return address - child won't execute this routine */
432 movl (%esp),%eax
433 movl %eax,PCB_EIP(%ecx)
435 movl %cr3,%eax
436 movl %eax,PCB_CR3(%ecx)
438 movl %ebx,PCB_EBX(%ecx)
439 movl %esp,PCB_ESP(%ecx)
440 movl %ebp,PCB_EBP(%ecx)
441 movl %esi,PCB_ESI(%ecx)
442 movl %edi,PCB_EDI(%ecx)
444 #if NNPX > 0
446 * If npxthread == NULL, then the npx h/w state is irrelevant and the
447 * state had better already be in the pcb. This is true for forks
448 * but not for dumps (the old book-keeping with FP flags in the pcb
449 * always lost for dumps because the dump pcb has 0 flags).
451 * If npxthread != NULL, then we have to save the npx h/w state to
452 * npxthread's pcb and copy it to the requested pcb, or save to the
453 * requested pcb and reload. Copying is easier because we would
454 * have to handle h/w bugs for reloading. We used to lose the
455 * parent's npx state for forks by forgetting to reload.
457 movl PCPU(npxthread),%eax
458 testl %eax,%eax
459 je 1f
461 pushl %ecx /* target pcb */
462 movl TD_SAVEFPU(%eax),%eax /* originating savefpu area */
463 pushl %eax
465 pushl %eax
466 call npxsave
467 addl $4,%esp
469 popl %eax
470 popl %ecx
472 pushl $PCB_SAVEFPU_SIZE
473 leal PCB_SAVEFPU(%ecx),%ecx
474 pushl %ecx
475 pushl %eax
476 call bcopy
477 addl $12,%esp
478 #endif /* NNPX > 0 */
484 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
486 * Don't bother setting up any regs other then %ebp so backtraces
487 * don't die. This restore function is used to bootstrap into the
488 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
489 * switching.
491 * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
493 * If we are an AP we have to call ap_init() before jumping to
494 * cpu_idle(). ap_init() will synchronize with the BP and finish
495 * setting up various ncpu-dependant globaldata fields. This may
496 * happen on UP as well as SMP if we happen to be simulating multiple
497 * cpus.
499 ENTRY(cpu_idle_restore)
500 /* cli */
501 movl IdlePTD,%ecx
502 movl $0,%ebp
503 pushl $0
504 movl %ecx,%cr3
505 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
506 orl $TDF_RUNNING,TD_FLAGS(%eax)
507 #ifdef SMP
508 cmpl $0,PCPU(cpuid)
509 je 1f
510 call ap_init
512 #endif
514 * ap_init can decide to enable interrupts early, but otherwise, or if
515 * we are UP, do it here.
518 jmp cpu_idle
521 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
523 * Don't bother setting up any regs other then %ebp so backtraces
524 * don't die. This restore function is used to bootstrap into an
525 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
526 * after this.
528 * Since all of our context is on the stack we are reentrant and
529 * we can release our critical section and enable interrupts early.
531 ENTRY(cpu_kthread_restore)
533 movl IdlePTD,%ecx
534 movl TD_PCB(%eax),%edx
535 movl $0,%ebp
536 movl %ecx,%cr3
537 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
538 orl $TDF_RUNNING,TD_FLAGS(%eax)
539 subl $TDPRI_CRIT,TD_PRI(%eax)
540 popl %eax /* kthread exit function */
541 pushl PCB_EBX(%edx) /* argument to ESI function */
542 pushl %eax /* set exit func as return address */
543 movl PCB_ESI(%edx),%eax
544 jmp *%eax
547 * cpu_lwkt_switch()
549 * Standard LWKT switching function. Only non-scratch registers are
550 * saved and we don't bother with the MMU state or anything else.
552 * This function is always called while in a critical section.
554 * There is a one-instruction window where curthread is the new
555 * thread but %esp still points to the old thread's stack, but
556 * we are protected by a critical section so it is ok.
558 * YYY BGL, SPL
560 ENTRY(cpu_lwkt_switch)
561 pushl %ebp /* note: GDB hacked to locate ebp relative to td_sp */
562 pushl %ebx
563 movl PCPU(curthread),%ebx
564 pushl %esi
565 pushl %edi
566 pushfl
567 /* warning: adjust movl into %eax below if you change the pushes */
569 #if NNPX > 0
571 * Save the FP state if we have used the FP. Note that calling
572 * npxsave will NULL out PCPU(npxthread).
574 * We have to deal with the FP state for LWKT threads in case they
575 * happen to get preempted or block while doing an optimized
576 * bzero/bcopy/memcpy.
578 cmpl %ebx,PCPU(npxthread)
579 jne 1f
580 pushl TD_SAVEFPU(%ebx)
581 call npxsave /* do it in a big C function */
582 addl $4,%esp /* EAX, ECX, EDX trashed */
584 #endif /* NNPX > 0 */
586 movl 4+20(%esp),%eax /* switch to this thread */
587 pushl $cpu_lwkt_restore
588 movl %esp,TD_SP(%ebx)
589 movl %eax,PCPU(curthread)
590 movl TD_SP(%eax),%esp
593 * eax contains new thread, ebx contains old thread.
598 * cpu_lwkt_restore() (current thread in %eax on entry)
600 * Standard LWKT restore function. This function is always called
601 * while in a critical section.
603 * Warning: due to preemption the restore function can be used to
604 * 'return' to the original thread. Interrupt disablement must be
605 * protected through the switch so we cannot run splz here.
607 * YYY we theoretically do not need to load IdlePTD into cr3, but if
608 * so we need a way to detect when the PTD we are using is being
609 * deleted due to a process exiting.
611 ENTRY(cpu_lwkt_restore)
612 movl IdlePTD,%ecx /* YYY borrow but beware desched/cpuchg/exit */
613 movl %cr3,%edx
614 cmpl %ecx,%edx
615 je 1f
616 movl %ecx,%cr3
618 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
619 orl $TDF_RUNNING,TD_FLAGS(%eax)
620 popfl
621 popl %edi
622 popl %esi
623 popl %ebx
624 popl %ebp