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[dragonfly/vkernel-mp.git] / sys / dev / disk / nata / ata-pci.c
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1 /*-
2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $
27 * $DragonFly: src/sys/dev/disk/nata/ata-pci.c,v 1.5 2007/06/05 18:30:40 swildner Exp $
30 #include "opt_ata.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/bus_resource.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/nata.h>
38 #include <sys/rman.h>
39 #include <sys/systm.h>
41 #include <bus/pci/pcireg.h>
42 #include <bus/pci/pcivar.h>
44 #include "ata-all.h"
45 #include "ata-pci.h"
46 #include "ata_if.h"
48 /* local vars */
49 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI");
51 /* misc defines */
52 #define IOMASK 0xfffffffc
53 #define ATA_PROBE_OK -10
55 int
56 ata_legacy(device_t dev)
58 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&&
59 ((pci_read_config(dev, PCIR_PROGIF, 1) &
60 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
61 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) ||
62 (!pci_read_config(dev, PCIR_BAR(0), 4) &&
63 !pci_read_config(dev, PCIR_BAR(1), 4) &&
64 !pci_read_config(dev, PCIR_BAR(2), 4) &&
65 !pci_read_config(dev, PCIR_BAR(3), 4)));
69 int
70 ata_pci_probe(device_t dev)
72 if (pci_get_class(dev) != PCIC_STORAGE)
73 return ENXIO;
75 switch (pci_get_vendor(dev)) {
76 case ATA_ACARD_ID:
77 if (!ata_acard_ident(dev))
78 return ATA_PROBE_OK;
79 break;
80 case ATA_ACER_LABS_ID:
81 if (!ata_ali_ident(dev))
82 return ATA_PROBE_OK;
83 break;
84 case ATA_AMD_ID:
85 if (!ata_amd_ident(dev))
86 return ATA_PROBE_OK;
87 break;
88 case ATA_ATI_ID:
89 if (!ata_ati_ident(dev))
90 return ATA_PROBE_OK;
91 break;
92 case ATA_CYRIX_ID:
93 if (!ata_cyrix_ident(dev))
94 return ATA_PROBE_OK;
95 break;
96 case ATA_CYPRESS_ID:
97 if (!ata_cypress_ident(dev))
98 return ATA_PROBE_OK;
99 break;
100 case ATA_HIGHPOINT_ID:
101 if (!ata_highpoint_ident(dev))
102 return ATA_PROBE_OK;
103 break;
104 case ATA_INTEL_ID:
105 if (!ata_intel_ident(dev))
106 return ATA_PROBE_OK;
107 break;
108 case ATA_ITE_ID:
109 if (!ata_ite_ident(dev))
110 return ATA_PROBE_OK;
111 break;
112 case ATA_JMICRON_ID:
113 if (!ata_jmicron_ident(dev))
114 return ATA_PROBE_OK;
115 break;
116 case ATA_MARVELL_ID:
117 if (!ata_marvell_ident(dev))
118 return ATA_PROBE_OK;
119 break;
120 case ATA_NATIONAL_ID:
121 if (!ata_national_ident(dev))
122 return ATA_PROBE_OK;
123 break;
124 case ATA_NETCELL_ID:
125 if (!ata_netcell_ident(dev))
126 return ATA_PROBE_OK;
127 break;
128 case ATA_NVIDIA_ID:
129 if (!ata_nvidia_ident(dev))
130 return ATA_PROBE_OK;
131 break;
132 case ATA_PROMISE_ID:
133 if (!ata_promise_ident(dev))
134 return ATA_PROBE_OK;
135 break;
136 case ATA_SERVERWORKS_ID:
137 if (!ata_serverworks_ident(dev))
138 return ATA_PROBE_OK;
139 break;
140 case ATA_SILICON_IMAGE_ID:
141 if (!ata_sii_ident(dev))
142 return ATA_PROBE_OK;
143 break;
144 case ATA_SIS_ID:
145 if (!ata_sis_ident(dev))
146 return ATA_PROBE_OK;
147 break;
148 case ATA_VIA_ID:
149 if (!ata_via_ident(dev))
150 return ATA_PROBE_OK;
151 break;
152 case ATA_CENATEK_ID:
153 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) {
154 ata_generic_ident(dev);
155 device_set_desc(dev, "Cenatek Rocket Drive controller");
156 return ATA_PROBE_OK;
158 break;
159 case ATA_MICRON_ID:
160 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 ||
161 pci_get_devid(dev) == ATA_MICRON_RZ1001) {
162 ata_generic_ident(dev);
163 device_set_desc(dev,
164 "RZ 100? ATA controller !WARNING! data loss/corruption risk");
165 return ATA_PROBE_OK;
167 break;
170 /* unknown chipset, try generic DMA if it seems possible */
171 if ((pci_get_class(dev) == PCIC_STORAGE) &&
172 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) {
173 if (!ata_generic_ident(dev))
174 return ATA_PROBE_OK;
176 return ENXIO;
180 ata_pci_attach(device_t dev)
182 struct ata_pci_controller *ctlr = device_get_softc(dev);
183 u_int32_t cmd;
184 int unit;
186 /* do chipset specific setups only needed once */
187 if (ata_legacy(dev) || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
188 ctlr->channels = 2;
189 else
190 ctlr->channels = 1;
191 ctlr->allocate = ata_pci_allocate;
192 ctlr->dmainit = ata_pci_dmainit;
193 ctlr->dev = dev;
195 /* if needed try to enable busmastering */
196 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
197 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
198 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
199 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
202 /* if busmastering mode "stuck" use it */
203 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
204 ctlr->r_type1 = SYS_RES_IOPORT;
205 ctlr->r_rid1 = ATA_BMADDR_RID;
206 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
207 RF_ACTIVE);
210 if (ctlr->chipinit(dev))
211 return ENXIO;
213 /* attach all channels on this controller */
214 for (unit = 0; unit < ctlr->channels; unit++) {
215 int freeunit = 2;
216 if ((unit == 0 || unit == 1) && ata_legacy(dev)) {
217 device_add_child(dev, "ata", unit);
218 continue;
220 /* XXX TGEN devclass_find_free_unit() implementation */
221 while (freeunit < devclass_get_maxunit(ata_devclass) &&
222 devclass_get_device(ata_devclass, freeunit) != NULL)
223 freeunit++;
224 device_add_child(dev, "ata", freeunit);
226 bus_generic_attach(dev);
227 return 0;
231 ata_pci_detach(device_t dev)
233 struct ata_pci_controller *ctlr = device_get_softc(dev);
234 device_t *children;
235 int nchildren, i;
237 /* detach & delete all children */
238 if (!device_get_children(dev, &children, &nchildren)) {
239 for (i = 0; i < nchildren; i++)
240 device_delete_child(dev, children[i]);
241 kfree(children, M_TEMP);
244 if (ctlr->r_irq) {
245 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
246 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq);
248 if (ctlr->r_res2)
249 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
250 if (ctlr->r_res1)
251 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
253 return 0;
256 struct resource *
257 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
258 u_long start, u_long end, u_long count, u_int flags)
260 struct ata_pci_controller *controller = device_get_softc(dev);
261 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
262 struct resource *res = NULL;
263 int myrid;
265 if (type == SYS_RES_IOPORT) {
266 switch (*rid) {
267 case ATA_IOADDR_RID:
268 if (ata_legacy(dev)) {
269 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
270 count = ATA_IOSIZE;
271 end = start + count - 1;
273 myrid = PCIR_BAR(0) + (unit << 3);
274 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
275 SYS_RES_IOPORT, &myrid,
276 start, end, count, flags);
277 break;
279 case ATA_CTLADDR_RID:
280 if (ata_legacy(dev)) {
281 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET;
282 count = ATA_CTLIOSIZE;
283 end = start + count - 1;
285 myrid = PCIR_BAR(1) + (unit << 3);
286 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
287 SYS_RES_IOPORT, &myrid,
288 start, end, count, flags);
289 break;
292 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
293 if (ata_legacy(dev)) {
294 int irq = (unit == 0 ? 14 : 15);
296 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
297 SYS_RES_IRQ, rid, irq, irq, 1, flags);
299 else
300 res = controller->r_irq;
302 return res;
306 ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
307 struct resource *r)
309 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
311 if (type == SYS_RES_IOPORT) {
312 switch (rid) {
313 case ATA_IOADDR_RID:
314 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
315 SYS_RES_IOPORT,
316 PCIR_BAR(0) + (unit << 3), r);
317 break;
319 case ATA_CTLADDR_RID:
320 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
321 SYS_RES_IOPORT,
322 PCIR_BAR(1) + (unit << 3), r);
323 break;
324 default:
325 return ENOENT;
328 if (type == SYS_RES_IRQ) {
329 if (rid != ATA_IRQ_RID)
330 return ENOENT;
332 if (ata_legacy(dev)) {
333 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
334 SYS_RES_IRQ, rid, r);
336 else
337 return 0;
339 return EINVAL;
343 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
344 int flags, driver_intr_t *function, void *argument,
345 void **cookiep)
347 if (ata_legacy(dev)) {
348 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
349 flags, function, argument, cookiep, NULL);
351 else {
352 struct ata_pci_controller *controller = device_get_softc(dev);
353 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
355 controller->interrupt[unit].function = function;
356 controller->interrupt[unit].argument = argument;
357 *cookiep = controller;
358 return 0;
363 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
364 void *cookie)
366 if (ata_legacy(dev)) {
367 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
369 else {
370 struct ata_pci_controller *controller = device_get_softc(dev);
371 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
373 controller->interrupt[unit].function = NULL;
374 controller->interrupt[unit].argument = NULL;
375 return 0;
380 ata_pci_allocate(device_t dev)
382 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
383 struct ata_channel *ch = device_get_softc(dev);
384 struct resource *io = NULL, *ctlio = NULL;
385 int i, rid;
387 rid = ATA_IOADDR_RID;
388 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE)))
389 return ENXIO;
391 rid = ATA_CTLADDR_RID;
392 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){
393 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
394 return ENXIO;
397 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
398 ch->r_io[i].res = io;
399 ch->r_io[i].offset = i;
401 ch->r_io[ATA_CONTROL].res = ctlio;
402 ch->r_io[ATA_CONTROL].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
403 ch->r_io[ATA_IDX_ADDR].res = io;
404 ata_default_registers(dev);
405 if (ctlr->r_res1) {
406 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
407 ch->r_io[i].res = ctlr->r_res1;
408 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
412 ata_pci_hw(dev);
413 return 0;
416 void
417 ata_pci_hw(device_t dev)
419 struct ata_channel *ch = device_get_softc(dev);
421 ata_generic_hw(dev);
422 ch->hw.status = ata_pci_status;
426 ata_pci_status(device_t dev)
428 struct ata_channel *ch = device_get_softc(dev);
430 if ((dumping || !ata_legacy(device_get_parent(dev))) &&
431 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) ||
432 (ch->dma->flags & ATA_DMA_ACTIVE))) {
433 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
435 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
436 ATA_BMSTAT_INTERRUPT)
437 return 0;
438 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
439 DELAY(1);
441 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
442 DELAY(100);
443 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
444 return 0;
446 return 1;
449 static int
450 ata_pci_dmastart(device_t dev)
452 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
453 u_int8_t val;
455 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
456 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
457 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus);
458 ch->dma->flags |= ATA_DMA_ACTIVE;
459 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT);
460 if (ch->dma->flags & ATA_DMA_READ)
461 val |= ATA_BMCMD_WRITE_READ;
462 else
463 val &= ~ATA_BMCMD_WRITE_READ;
464 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val);
467 * Issue the start command separately from configuration setup,
468 * in case the hardware latches portions of the configuration.
470 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP);
472 return 0;
475 static int
476 ata_pci_dmastop(device_t dev)
478 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
479 int error;
481 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
482 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
483 ch->dma->flags &= ~ATA_DMA_ACTIVE;
484 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
485 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
486 return error;
489 static void
490 ata_pci_dmareset(device_t dev)
492 struct ata_channel *ch = device_get_softc(dev);
494 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
495 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
496 ch->dma->flags &= ~ATA_DMA_ACTIVE;
497 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
498 ch->dma->unload(dev);
501 void
502 ata_pci_dmainit(device_t dev)
504 struct ata_channel *ch = device_get_softc(dev);
506 ata_dmainit(dev);
507 if (ch->dma) {
508 ch->dma->start = ata_pci_dmastart;
509 ch->dma->stop = ata_pci_dmastop;
510 ch->dma->reset = ata_pci_dmareset;
514 static device_method_t ata_pci_methods[] = {
515 /* device interface */
516 DEVMETHOD(device_probe, ata_pci_probe),
517 DEVMETHOD(device_attach, ata_pci_attach),
518 DEVMETHOD(device_detach, ata_pci_detach),
519 DEVMETHOD(device_shutdown, bus_generic_shutdown),
520 DEVMETHOD(device_suspend, bus_generic_suspend),
521 DEVMETHOD(device_resume, bus_generic_resume),
523 /* bus methods */
524 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
525 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
526 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
527 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
528 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
529 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
531 { 0, 0 }
534 devclass_t atapci_devclass;
536 static driver_t ata_pci_driver = {
537 "atapci",
538 ata_pci_methods,
539 sizeof(struct ata_pci_controller),
542 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, 0, 0);
543 MODULE_VERSION(atapci, 1);
544 MODULE_DEPEND(atapci, ata, 1, 1, 1);
546 static int
547 ata_pcichannel_probe(device_t dev)
549 struct ata_channel *ch = device_get_softc(dev);
550 device_t *children;
551 int count, i;
552 char buffer[32];
554 /* take care of green memory */
555 bzero(ch, sizeof(struct ata_channel));
557 /* find channel number on this controller */
558 device_get_children(device_get_parent(dev), &children, &count);
559 for (i = 0; i < count; i++) {
560 if (children[i] == dev)
561 ch->unit = i;
563 kfree(children, M_TEMP);
565 ksprintf(buffer, "ATA channel %d", ch->unit);
566 device_set_desc_copy(dev, buffer);
568 return ata_probe(dev);
571 static int
572 ata_pcichannel_attach(device_t dev)
574 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
575 struct ata_channel *ch = device_get_softc(dev);
576 int error;
578 if (ctlr->dmainit)
579 ctlr->dmainit(dev);
580 if (ch->dma)
581 ch->dma->alloc(dev);
583 if ((error = ctlr->allocate(dev))) {
584 if (ch->dma)
585 ch->dma->free(dev);
586 return error;
589 return ata_attach(dev);
592 static int
593 ata_pcichannel_detach(device_t dev)
595 struct ata_channel *ch = device_get_softc(dev);
596 int error;
598 if ((error = ata_detach(dev)))
599 return error;
601 if (ch->dma)
602 ch->dma->free(dev);
604 /* XXX SOS free resources for io and ctlio ?? */
606 return 0;
609 static int
610 ata_pcichannel_locking(device_t dev, int mode)
612 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
613 struct ata_channel *ch = device_get_softc(dev);
615 if (ctlr->locking)
616 return ctlr->locking(dev, mode);
617 else
618 return ch->unit;
621 static void
622 ata_pcichannel_reset(device_t dev)
624 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
625 struct ata_channel *ch = device_get_softc(dev);
627 /* if DMA engine present reset it */
628 if (ch->dma) {
629 if (ch->dma->reset)
630 ch->dma->reset(dev);
631 ch->dma->unload(dev);
634 /* reset the controller HW */
635 if (ctlr->reset)
636 ctlr->reset(dev);
637 else
638 ata_generic_reset(dev);
641 static void
642 ata_pcichannel_setmode(device_t parent, device_t dev)
644 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev));
645 struct ata_device *atadev = device_get_softc(dev);
646 int mode = atadev->mode;
648 ctlr->setmode(dev, ATA_PIO_MAX);
649 if (mode >= ATA_DMA)
650 ctlr->setmode(dev, mode);
653 static device_method_t ata_pcichannel_methods[] = {
654 /* device interface */
655 DEVMETHOD(device_probe, ata_pcichannel_probe),
656 DEVMETHOD(device_attach, ata_pcichannel_attach),
657 DEVMETHOD(device_detach, ata_pcichannel_detach),
658 DEVMETHOD(device_shutdown, bus_generic_shutdown),
659 DEVMETHOD(device_suspend, ata_suspend),
660 DEVMETHOD(device_resume, ata_resume),
662 /* ATA methods */
663 DEVMETHOD(ata_setmode, ata_pcichannel_setmode),
664 DEVMETHOD(ata_locking, ata_pcichannel_locking),
665 DEVMETHOD(ata_reset, ata_pcichannel_reset),
667 { 0, 0 }
670 driver_t ata_pcichannel_driver = {
671 "ata",
672 ata_pcichannel_methods,
673 sizeof(struct ata_channel),
676 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0);