sys/bus/usb/ehci_pci.c

   1 /*
   2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to The NetBSD Foundation
   6  * by Lennart Augustsson (augustss@carlstedt.se) at
   7  * Carlstedt Research & Technology.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *        This product includes software developed by the NetBSD
  20  *        Foundation, Inc. and its contributors.
  21  * 4. Neither the name of The NetBSD Foundation nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * $FreeBSD: src/sys/dev/usb/ehci_pci.c,v 1.18.2.1 2006/01/26 01:43:13 iedowse Exp $
  38  * $DragonFly: src/sys/bus/usb/ehci_pci.c,v 1.16 2007/06/28 06:32:31 hasso Exp $
  39  */
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  */
  49
  50 /* The low level controller code for EHCI has been split into
  51  * PCI probes and EHCI specific code. This was done to facilitate the
  52  * sharing of code between *BSD's
  53  */
  54
  55 #include "opt_bus.h"
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/bus.h>
  62 #include <sys/queue.h>
  63 #include <sys/lock.h>
  64 #include <sys/rman.h>
  65
  66 #include <bus/pci/pcivar.h>
  67 #include <bus/pci/pcireg.h>
  68
  69 #include <bus/usb/usb.h>
  70 #include <bus/usb/usbdi.h>
  71 #include <bus/usb/usbdivar.h>
  72 #include <bus/usb/usb_mem.h>
  73
  74 #include <bus/usb/ehcireg.h>
  75 #include <bus/usb/ehcivar.h>
  76
  77 #define PCI_EHCI_VENDORID_ACERLABS      0x10b9
  78 #define PCI_EHCI_VENDORID_AMD           0x1022
  79 #define PCI_EHCI_VENDORID_APPLE         0x106b
  80 #define PCI_EHCI_VENDORID_ATI           0x1002
  81 #define PCI_EHCI_VENDORID_CMDTECH       0x1095
  82 #define PCI_EHCI_VENDORID_INTEL         0x8086
  83 #define PCI_EHCI_VENDORID_NEC           0x1033
  84 #define PCI_EHCI_VENDORID_OPTI          0x1045
  85 #define PCI_EHCI_VENDORID_PHILIPS       0x1131
  86 #define PCI_EHCI_VENDORID_SIS           0x1039
  87 #define PCI_EHCI_VENDORID_NVIDIA        0x12D2
  88 #define PCI_EHCI_VENDORID_NVIDIA2       0x10DE
  89 #define PCI_EHCI_VENDORID_VIA           0x1106
  90
  91 /* AcerLabs/ALi */
  92 #define PCI_EHCI_DEVICEID_M5239         0x523910b9
  93 static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
  94
  95 /* AMD */
  96 #define PCI_EHCI_DEVICEID_8111          0x10227463
  97 static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
  98
  99 /* ATI */
 100 #define PCI_EHCI_DEVICEID_SB200         0x43451002
 101 static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
 102 #define PCI_EHCI_DEVICEID_SB400         0x43731002
 103 static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
 104
 105 /* Intel */
 106 #define PCI_EHCI_DEVICEID_6300          0x25ad8086
 107 static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
 108 #define PCI_EHCI_DEVICEID_ICH4          0x24cd8086
 109 static const char *ehci_device_ich4 = "Intel 82801DB/L/M USB 2.0 controller";
 110 #define PCI_EHCI_DEVICEID_ICH5          0x24dd8086
 111 static const char *ehci_device_ich5 = "Intel 82801EB/R USB 2.0 controller";
 112 #define PCI_EHCI_DEVICEID_ICH6          0x265c8086
 113 static const char *ehci_device_ich6 = "Intel 82801FB USB 2.0 controller";
 114 #define PCI_EHCI_DEVICEID_ICH7          0x27cc8086
 115 static const char *ehci_device_ich7 = "Intel 82801GB/R USB 2.0 controller";
 116
 117 /* NEC */
 118 #define PCI_EHCI_DEVICEID_NEC           0x00e01033
 119 static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
 120
 121 /* NVIDIA */
 122 #define PCI_EHCI_DEVICEID_NF2           0x006810de
 123 static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
 124 #define PCI_EHCI_DEVICEID_NF2_400       0x008810de
 125 static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
 126 #define PCI_EHCI_DEVICEID_NF3           0x00d810de
 127 static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
 128 #define PCI_EHCI_DEVICEID_NF3_250       0x00e810de
 129 static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
 130 #define PCI_EHCI_DEVICEID_NF4           0x005b10de
 131 static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
 132
 133 /* Philips */
 134 #define PCI_EHCI_DEVICEID_ISP156X       0x15621131
 135 static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
 136
 137 /* VIA */
 138 #define PCI_EHCI_DEVICEID_VIA           0x31041106
 139 static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
 140
 141 /* Generic */
 142 static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
 143
 144 #define PCI_EHCI_BASE_REG       0x10
 145
 146 #ifdef USB_DEBUG
 147 #define EHCI_DEBUG USB_DEBUG
 148 #define DPRINTF(x)      do { if (ehcidebug) logprintf x; } while (0)
 149 extern int ehcidebug;
 150 #else
 151 #define DPRINTF(x)
 152 #endif
 153
 154 static int ehci_pci_attach(device_t self);
 155 static int ehci_pci_detach(device_t self);
 156 static int ehci_pci_shutdown(device_t self);
 157 static int ehci_pci_suspend(device_t self);
 158 static int ehci_pci_resume(device_t self);
 159 static void ehci_pci_givecontroller(device_t self);
 160 static void ehci_pci_takecontroller(device_t self);
 161
 162 static int
 163 ehci_pci_suspend(device_t self)
 164 {
 165         ehci_softc_t *sc = device_get_softc(self);
 166         int err;
 167
 168         err = bus_generic_suspend(self);
 169         if (err)
 170                 return (err);
 171         ehci_power(PWR_SUSPEND, sc);
 172
 173         return 0;
 174 }
 175
 176 static int
 177 ehci_pci_resume(device_t self)
 178 {
 179         ehci_softc_t *sc = device_get_softc(self);
 180
 181         ehci_pci_takecontroller(self);
 182         ehci_power(PWR_RESUME, sc);
 183         bus_generic_resume(self);
 184
 185         return 0;
 186 }
 187
 188 static int
 189 ehci_pci_shutdown(device_t self)
 190 {
 191         ehci_softc_t *sc = device_get_softc(self);
 192         int err;
 193
 194         err = bus_generic_shutdown(self);
 195         if (err)
 196                 return (err);
 197         ehci_shutdown(sc);
 198         ehci_pci_givecontroller(self);
 199
 200         return 0;
 201 }
 202
 203 static const char *
 204 ehci_pci_match(device_t self)
 205 {
 206         u_int32_t device_id = pci_get_devid(self);
 207
 208         switch (device_id) {
 209         case PCI_EHCI_DEVICEID_M5239:
 210                 return (ehci_device_m5239);
 211         case PCI_EHCI_DEVICEID_8111:
 212                 return (ehci_device_8111);
 213         case PCI_EHCI_DEVICEID_SB200:
 214                 return (ehci_device_sb200);
 215         case PCI_EHCI_DEVICEID_SB400:
 216                 return (ehci_device_sb400);
 217         case PCI_EHCI_DEVICEID_6300:
 218                 return (ehci_device_6300);
 219         case PCI_EHCI_DEVICEID_ICH4:
 220                 return (ehci_device_ich4);
 221         case PCI_EHCI_DEVICEID_ICH5:
 222                 return (ehci_device_ich5);
 223         case PCI_EHCI_DEVICEID_ICH6:
 224                 return (ehci_device_ich6);
 225         case PCI_EHCI_DEVICEID_ICH7:
 226                 return (ehci_device_ich7);
 227         case PCI_EHCI_DEVICEID_NEC:
 228                 return (ehci_device_nec);
 229         case PCI_EHCI_DEVICEID_NF2:
 230                 return (ehci_device_nf2);
 231         case PCI_EHCI_DEVICEID_NF2_400:
 232                 return (ehci_device_nf2_400);
 233         case PCI_EHCI_DEVICEID_NF3:
 234                 return (ehci_device_nf3);
 235         case PCI_EHCI_DEVICEID_NF3_250:
 236                 return (ehci_device_nf3_250);
 237         case PCI_EHCI_DEVICEID_NF4:
 238                 return (ehci_device_nf4);
 239         case PCI_EHCI_DEVICEID_ISP156X:
 240                 return (ehci_device_isp156x);
 241         case PCI_EHCI_DEVICEID_VIA:
 242                 return (ehci_device_via);
 243         default:
 244                 if (pci_get_class(self) == PCIC_SERIALBUS
 245                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
 246                     && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
 247                         return (ehci_device_generic);
 248                 }
 249         }
 250
 251         return NULL;            /* dunno */
 252 }
 253
 254 static int
 255 ehci_pci_probe(device_t self)
 256 {
 257         const char *desc = ehci_pci_match(self);
 258
 259         if (desc) {
 260                 device_set_desc(self, desc);
 261                 device_set_async_attach(self, TRUE);
 262                 return 0;
 263         } else {
 264                 return ENXIO;
 265         }
 266 }
 267
 268 static int
 269 ehci_pci_attach(device_t self)
 270 {
 271         ehci_softc_t *sc = device_get_softc(self);
 272         device_t parent;
 273         device_t *neighbors;
 274         device_t *nbus;
 275         struct usbd_bus *bsc;
 276         int err;
 277         int rid;
 278         int ncomp;
 279         int count, buscount;
 280         int slot, function;
 281         int res;
 282         int i;
 283
 284         switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
 285         case PCI_USBREV_PRE_1_0:
 286         case PCI_USBREV_1_0:
 287         case PCI_USBREV_1_1:
 288                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 289                 kprintf("pre-2.0 USB rev\n");
 290                 return ENXIO;
 291         case PCI_USBREV_2_0:
 292                 sc->sc_bus.usbrev = USBREV_2_0;
 293                 break;
 294         default:
 295                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 296                 break;
 297         }
 298
 299         pci_enable_busmaster(self);
 300
 301         rid = PCI_CBMEM;
 302         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
 303             RF_ACTIVE);
 304         if (!sc->io_res) {
 305                 device_printf(self, "Could not map memory\n");
 306                 return ENXIO;
 307         }
 308         sc->iot = rman_get_bustag(sc->io_res);
 309         sc->ioh = rman_get_bushandle(sc->io_res);
 310
 311         rid = 0;
 312         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
 313             RF_SHAREABLE | RF_ACTIVE);
 314         if (sc->irq_res == NULL) {
 315                 device_printf(self, "Could not allocate irq\n");
 316                 ehci_pci_detach(self);
 317                 return ENXIO;
 318         }
 319         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
 320         if (!sc->sc_bus.bdev) {
 321                 device_printf(self, "Could not add USB device\n");
 322                 ehci_pci_detach(self);
 323                 return ENOMEM;
 324         }
 325         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
 326
 327         /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
 328         device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
 329         switch (pci_get_vendor(self)) {
 330         case PCI_EHCI_VENDORID_ACERLABS:
 331                 ksprintf(sc->sc_vendor, "AcerLabs");
 332                 break;
 333         case PCI_EHCI_VENDORID_AMD:
 334                 ksprintf(sc->sc_vendor, "AMD");
 335                 break;
 336         case PCI_EHCI_VENDORID_APPLE:
 337                 ksprintf(sc->sc_vendor, "Apple");
 338                 break;
 339         case PCI_EHCI_VENDORID_ATI:
 340                 ksprintf(sc->sc_vendor, "ATI");
 341                 break;
 342         case PCI_EHCI_VENDORID_CMDTECH:
 343                 ksprintf(sc->sc_vendor, "CMDTECH");
 344                 break;
 345         case PCI_EHCI_VENDORID_INTEL:
 346                 ksprintf(sc->sc_vendor, "Intel");
 347                 break;
 348         case PCI_EHCI_VENDORID_NEC:
 349                 ksprintf(sc->sc_vendor, "NEC");
 350                 break;
 351         case PCI_EHCI_VENDORID_OPTI:
 352                 ksprintf(sc->sc_vendor, "OPTi");
 353                 break;
 354         case PCI_EHCI_VENDORID_SIS:
 355                 ksprintf(sc->sc_vendor, "SiS");
 356                 break;
 357         case PCI_EHCI_VENDORID_NVIDIA:
 358         case PCI_EHCI_VENDORID_NVIDIA2:
 359                 ksprintf(sc->sc_vendor, "nVidia");
 360                 break;
 361         case PCI_EHCI_VENDORID_VIA:
 362                 ksprintf(sc->sc_vendor, "VIA");
 363                 break;
 364         default:
 365                 if (bootverbose)
 366                         device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
 367                             pci_get_devid(self));
 368                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
 369         }
 370
 371         err = bus_setup_intr(self, sc->irq_res, 0,
 372             (driver_intr_t *) ehci_intr, sc, &sc->ih, NULL);
 373         if (err) {
 374                 device_printf(self, "Could not setup irq, %d\n", err);
 375                 sc->ih = NULL;
 376                 ehci_pci_detach(self);
 377                 return ENXIO;
 378         }
 379
 380         /* Enable workaround for dropped interrupts as required */
 381         switch (pci_get_vendor(self)) {
 382         case PCI_EHCI_VENDORID_ATI:
 383         case PCI_EHCI_VENDORID_VIA:
 384                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
 385                 if (bootverbose)
 386                         device_printf(self,
 387                             "Dropped interrupts workaround enabled\n");
 388                 break;
 389         default:
 390                 break;
 391         }
 392
 393         /*
 394          * Find companion controllers.  According to the spec they always
 395          * have lower function numbers so they should be enumerated already.
 396          */
 397         parent = device_get_parent(self);
 398         res = device_get_children(parent, &neighbors, &count);
 399         if (res != 0) {
 400                 device_printf(self, "Error finding companion busses\n");
 401                 ehci_pci_detach(self);
 402                 return ENXIO;
 403         }
 404         ncomp = 0;
 405         slot = pci_get_slot(self);
 406         function = pci_get_function(self);
 407         for (i = 0; i < count; i++) {
 408                 if (pci_get_slot(neighbors[i]) == slot && \
 409                         pci_get_function(neighbors[i]) < function) {
 410                         res = device_get_children(neighbors[i],
 411                                 &nbus, &buscount);
 412                         if (res != 0 || buscount != 1)
 413                                 continue;
 414                         bsc = device_get_softc(nbus[0]);
 415                         DPRINTF(("ehci_pci_attach: companion %s\n",
 416                             device_get_nameunit(bsc->bdev)));
 417                         sc->sc_comps[ncomp++] = bsc;
 418                         if (ncomp >= EHCI_COMPANION_MAX)
 419                                 break;
 420                 }
 421         }
 422         sc->sc_ncomp = ncomp;
 423
 424         ehci_pci_takecontroller(self);
 425         err = ehci_init(sc);
 426         if (!err) {
 427                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
 428                 err = device_probe_and_attach(sc->sc_bus.bdev);
 429         }
 430
 431         if (err) {
 432                 device_printf(self, "USB init failed err=%d\n", err);
 433                 ehci_pci_detach(self);
 434                 return EIO;
 435         }
 436         return 0;
 437 }
 438
 439 static int
 440 ehci_pci_detach(device_t self)
 441 {
 442         ehci_softc_t *sc = device_get_softc(self);
 443
 444         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
 445                 ehci_detach(sc, 0);
 446                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
 447         }
 448
 449         /*
 450          * disable interrupts that might have been switched on in ehci_init
 451          */
 452         if (sc->iot && sc->ioh)
 453                 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
 454
 455         if (sc->irq_res && sc->ih) {
 456                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
 457
 458                 if (err)
 459                         /* XXX or should we panic? */
 460                         device_printf(self, "Could not tear down irq, %d\n",
 461                             err);
 462                 sc->ih = NULL;
 463         }
 464         if (sc->sc_bus.bdev) {
 465                 device_delete_child(self, sc->sc_bus.bdev);
 466                 sc->sc_bus.bdev = NULL;
 467         }
 468         if (sc->irq_res) {
 469                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
 470                 sc->irq_res = NULL;
 471         }
 472         if (sc->io_res) {
 473                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
 474                 sc->io_res = NULL;
 475                 sc->iot = 0;
 476                 sc->ioh = 0;
 477         }
 478         return 0;
 479 }
 480
 481 static void
 482 ehci_pci_takecontroller(device_t self)
 483 {
 484         ehci_softc_t *sc = device_get_softc(self);
 485         u_int32_t cparams, eec, legsup;
 486         int eecp, i;
 487
 488         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 489
 490         /* Synchronise with the BIOS if it owns the controller. */
 491         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 492              eecp = EHCI_EECP_NEXT(eec)) {
 493                 eec = pci_read_config(self, eecp, 4);
 494                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 495                         continue;
 496                 legsup = eec;
 497                 pci_write_config(self, eecp, legsup | EHCI_LEGSUP_OSOWNED, 4);
 498                 if (legsup & EHCI_LEGSUP_BIOSOWNED) {
 499                         kprintf("%s: waiting for BIOS to give up control\n",
 500                             device_get_nameunit(sc->sc_bus.bdev));
 501                         for (i = 0; i < 5000; i++) {
 502                                 legsup = pci_read_config(self, eecp, 4);
 503                                 if ((legsup & EHCI_LEGSUP_BIOSOWNED) == 0)
 504                                         break;
 505                                 DELAY(1000);
 506                         }
 507                         if (legsup & EHCI_LEGSUP_BIOSOWNED)
 508                                 kprintf("%s: timed out waiting for BIOS\n",
 509                                     device_get_nameunit(sc->sc_bus.bdev));
 510                 }
 511         }
 512 }
 513
 514 static void
 515 ehci_pci_givecontroller(device_t self)
 516 {
 517         ehci_softc_t *sc = device_get_softc(self);
 518         u_int32_t cparams, eec, legsup;
 519         int eecp;
 520
 521         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 522         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 523              eecp = EHCI_EECP_NEXT(eec)) {
 524                 eec = pci_read_config(self, eecp, 4);
 525                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 526                         continue;
 527                 legsup = eec;
 528                 pci_write_config(self, eecp, legsup & ~EHCI_LEGSUP_OSOWNED, 4);
 529         }
 530 }
 531
 532 static device_method_t ehci_methods[] = {
 533         /* Device interface */
 534         DEVMETHOD(device_probe, ehci_pci_probe),
 535         DEVMETHOD(device_attach, ehci_pci_attach),
 536         DEVMETHOD(device_detach, ehci_pci_detach),
 537         DEVMETHOD(device_suspend, ehci_pci_suspend),
 538         DEVMETHOD(device_resume, ehci_pci_resume),
 539         DEVMETHOD(device_shutdown, ehci_pci_shutdown),
 540
 541         /* Bus interface */
 542         DEVMETHOD(bus_print_child, bus_generic_print_child),
 543
 544         {0, 0}
 545 };
 546
 547 static driver_t ehci_driver = {
 548         "ehci",
 549         ehci_methods,
 550         sizeof(ehci_softc_t),
 551 };
 552
 553 static devclass_t ehci_devclass;
 554
 555 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
 556 DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);