amd64 port: mainly on the pmap headers, identify_cpu and initcpu
[dragonfly/port-amd64.git] / sys / platform / pc64 / amd64 / machintr.c
blob6cbdcdeaa2b27488b92fb12842a992550d5f45ee
1 /*
2 * Copyright (c) 2006 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
34 * $DragonFly: src/sys/platform/pc64/amd64/machintr.c,v 1.2 2007/09/24 03:24:45 yanyh Exp $
37 #include <sys/types.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/machintr.h>
41 #include <sys/errno.h>
42 #include <sys/mman.h>
43 #include <sys/globaldata.h>
44 #include <sys/interrupt.h>
45 #include <stdio.h>
46 #include <signal.h>
47 #include <machine/globaldata.h>
48 #include <machine/md_var.h>
49 #include <sys/thread2.h>
52 * Interrupt Subsystem ABI
55 static void dummy_intrdis(int);
56 static void dummy_intren(int);
57 static int dummy_vectorctl(int, int, int);
58 static int dummy_setvar(int, const void *);
59 static int dummy_getvar(int, void *);
60 static void dummy_finalize(void);
61 static void dummy_intrcleanup(void);
63 struct machintr_abi MachIntrABI = {
64 MACHINTR_GENERIC,
65 .intrdis = dummy_intrdis,
66 .intren = dummy_intren,
67 .vectorctl = dummy_vectorctl,
68 .setvar = dummy_setvar,
69 .getvar = dummy_getvar,
70 .finalize = dummy_finalize,
71 .cleanup = dummy_intrcleanup
74 static void
75 dummy_intrdis(int intr)
79 static void
80 dummy_intren(int intr)
84 static int
85 dummy_vectorctl(int op, int intr, int flags)
87 return (0);
88 /* return (EOPNOTSUPP); */
91 static int
92 dummy_setvar(int varid, const void *buf)
94 return (ENOENT);
97 static int
98 dummy_getvar(int varid, void *buf)
100 return (ENOENT);
103 static void
104 dummy_finalize(void)
108 static void
109 dummy_intrcleanup(void)
114 * Process pending interrupts
116 void
117 splz(void)
122 * Allows an unprotected signal handler or mailbox to signal an interrupt
124 void
125 signalintr(int intr)
129 void
130 cpu_disable_intr(void)
134 void
135 cpu_invlpg(void *addr)
139 void
140 cpu_invltlb(void)