sys/dev/powermng/ichsmb/ichsmb_reg.h

   1
   2 /*
   3  * ichsmb_reg.h
   4  *
   5  * Copyright (c) 2000 Whistle Communications, Inc.
   6  * All rights reserved.
   7  *
   8  * Subject to the following obligations and disclaimer of warranty, use and
   9  * redistribution of this software, in source or object code forms, with or
  10  * without modifications are expressly permitted by Whistle Communications;
  11  * provided, however, that:
  12  * 1. Any and all reproductions of the source or object code must include the
  13  *    copyright notice above and the following disclaimer of warranties; and
  14  * 2. No rights are granted, in any manner or form, to use Whistle
  15  *    Communications, Inc. trademarks, including the mark "WHISTLE
  16  *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
  17  *    such appears in the above copyright notice or in the software.
  18  *
  19  * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
  20  * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
  21  * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
  22  * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
  23  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  24  * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
  25  * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
  26  * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
  27  * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
  28  * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
  29  * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
  30  * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
  31  * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
  32  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  34  * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
  35  * OF SUCH DAMAGE.
  36  *
  37  * Author: Archie Cobbs <archie@freebsd.org>
  38  *
  39  * $FreeBSD: src/sys/dev/ichsmb/ichsmb_reg.h,v 1.1.2.1 2000/10/09 00:52:43 archie Exp $
  40  * $DragonFly: src/sys/dev/powermng/ichsmb/ichsmb_reg.h,v 1.2 2003/06/17 04:28:27 dillon Exp $
  41  */
  42
  43 #ifndef _DEV_ICHSMB_ICHSMB_REG_H_
  44 #define _DEV_ICHSMB_ICHSMB_REG_H_
  45
  46 /*
  47  * Definitions for the SMBus controller logical device which is part of the
  48  * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
  49  */
  50
  51 /*
  52  * PCI configuration registers
  53  */
  54 #define ICH_SMB_BASE                    0x20    /* base address register */
  55 #define ICH_HOSTC                       0x40    /* host config register */
  56 #define   ICH_HOSTC_I2C_EN              0x04    /*   enable i2c mode */
  57 #define   ICH_HOSTC_SMB_SMI_EN          0x02    /*   SMI# instead of irq */
  58 #define   ICH_HOSTC_HST_EN              0x01    /*   enable host cntrlr */
  59
  60 /*
  61  * I/O registers
  62  */
  63 #define ICH_HST_STA                     0x00    /* host status */
  64 #define   ICH_HST_STA_BYTE_DONE_STS     0x80    /*   byte send/rec'd */
  65 #define   ICH_HST_STA_INUSE_STS         0x40    /*   device access mutex */
  66 #define   ICH_HST_STA_SMBALERT_STS      0x20    /*   SMBALERT# signal */
  67 #define   ICH_HST_STA_FAILED            0x10    /*   failed bus transaction */
  68 #define   ICH_HST_STA_BUS_ERR           0x08    /*   transaction collision */
  69 #define   ICH_HST_STA_DEV_ERR           0x04    /*   misc. smb device error */
  70 #define   ICH_HST_STA_INTR              0x02    /*   command completed ok */
  71 #define   ICH_HST_STA_HOST_BUSY         0x01    /*   command is running */
  72 #define ICH_HST_CNT                     0x02    /* host control */
  73 #define   ICH_HST_CNT_START             0x40    /*   start command */
  74 #define   ICH_HST_CNT_LAST_BYTE         0x20    /*   indicate last byte */
  75 #define   ICH_HST_CNT_SMB_CMD_QUICK     0x00    /*   command: quick */
  76 #define   ICH_HST_CNT_SMB_CMD_BYTE      0x04    /*   command: byte */
  77 #define   ICH_HST_CNT_SMB_CMD_BYTE_DATA 0x08    /*   command: byte data */
  78 #define   ICH_HST_CNT_SMB_CMD_WORD_DATA 0x0c    /*   command: word data */
  79 #define   ICH_HST_CNT_SMB_CMD_PROC_CALL 0x10    /*   command: process call */
  80 #define   ICH_HST_CNT_SMB_CMD_BLOCK     0x14    /*   command: block */
  81 #define   ICH_HST_CNT_SMB_CMD_I2C_READ  0x18    /*   command: i2c read */
  82 #define   ICH_HST_CNT_KILL              0x02    /*   kill current transaction */
  83 #define   ICH_HST_CNT_INTREN            0x01    /*   enable interrupt */
  84 #define ICH_HST_CMD                     0x03    /* host command */
  85 #define ICH_XMIT_SLVA                   0x04    /* transmit slave address */
  86 #define   ICH_XMIT_SLVA_READ            0x01    /*   direction: read */
  87 #define   ICH_XMIT_SLVA_WRITE           0x00    /*   direction: write */
  88 #define ICH_D0                          0x05    /* host data 0 */
  89 #define ICH_D1                          0x06    /* host data 1 */
  90 #define ICH_BLOCK_DB                    0x07    /* block data byte */
  91
  92 #endif /* _DEV_ICHSMB_ICHSMB_REG_H_ */
  93