sys/dev/netif/re/if_revar.h

   1 /*
   2  * Copyright (c) 2004
   3  *      Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   4  *
   5  * Copyright (c) 1997, 1998-2003
   6  *      Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. All advertising materials mentioning features or use of this software
  17  *    must display the following acknowledgement:
  18  *      This product includes software developed by Bill Paul.
  19  * 4. Neither the name of the author nor the names of any co-contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  33  * THE POSSIBILITY OF SUCH DAMAGE.
  34  *
  35  * $FreeBSD: src/sys/pci/if_rlreg.h,v 1.42 2004/05/24 19:39:23 jhb Exp $
  36  */
  37
  38 #define RE_RX_DESC_CNT_DEF      256
  39 #define RE_TX_DESC_CNT_DEF      256
  40 #define RE_RX_DESC_CNT_MAX      1024
  41 #define RE_TX_DESC_CNT_MAX      1024
  42
  43 #define RE_RX_LIST_SZ(sc)       ((sc)->re_rx_desc_cnt * sizeof(struct re_desc))
  44 #define RE_TX_LIST_SZ(sc)       ((sc)->re_tx_desc_cnt * sizeof(struct re_desc))
  45 #define RE_RING_ALIGN           256
  46 #define RE_IFQ_MAXLEN           512
  47 #define RE_MAXSEGS              16
  48 #define RE_TXDESC_SPARE         5
  49 #define RE_JBUF_COUNT(sc)       (((sc)->re_rx_desc_cnt * 3) / 2)
  50
  51 #define RE_RXDESC_INC(sc, x)    (x = (x + 1) % (sc)->re_rx_desc_cnt)
  52 #define RE_TXDESC_INC(sc, x)    (x = (x + 1) % (sc)->re_tx_desc_cnt)
  53 #define RE_OWN(x)               (le32toh((x)->re_cmdstat) & RE_RDESC_STAT_OWN)
  54 #define RE_RXBYTES(x)           (le32toh((x)->re_cmdstat) & RE_RDESC_STAT_GFRAGLEN)
  55 #define RE_PKTSZ(x)             ((x)/* >> 3*/)
  56
  57 #define RE_ADDR_LO(y)           ((uint64_t) (y) & 0xFFFFFFFF)
  58 #define RE_ADDR_HI(y)           ((uint64_t) (y) >> 32)
  59
  60 #define RE_MTU_6K               (6 * 1024)
  61 #define RE_MTU_9K               (9 * 1024)
  62
  63 #define RE_ETHER_EXTRA          (ETHER_HDR_LEN + ETHER_CRC_LEN + EVL_ENCAPLEN)
  64 #define RE_FRAMELEN(mtu)        ((mtu) + RE_ETHER_EXTRA)
  65
  66 #define RE_FRAMELEN_6K          RE_FRAMELEN(RE_MTU_6K)
  67 #define RE_FRAMELEN_9K          RE_FRAMELEN(RE_MTU_9K)
  68 #define RE_FRAMELEN_MAX         RE_FRAMELEN_9K
  69
  70 #define RE_RXBUF_ALIGN          8
  71 #define RE_JBUF_SIZE            roundup2(RE_FRAMELEN_MAX, RE_RXBUF_ALIGN)
  72
  73 struct re_softc;
  74 struct re_jbuf {
  75         struct re_softc         *re_sc;
  76         int                     re_inuse;
  77         int                     re_slot;
  78         caddr_t                 re_buf;
  79         bus_addr_t              re_paddr;
  80         SLIST_ENTRY(re_jbuf)    re_link;
  81 };
  82
  83 struct re_list_data {
  84         struct mbuf             **re_tx_mbuf;
  85         struct mbuf             **re_rx_mbuf;
  86         bus_addr_t              *re_rx_paddr;
  87         int                     re_tx_prodidx;
  88         int                     re_rx_prodidx;
  89         int                     re_tx_considx;
  90         int                     re_tx_free;
  91         bus_dmamap_t            *re_tx_dmamap;
  92         bus_dmamap_t            *re_rx_dmamap;
  93         bus_dmamap_t            re_rx_spare;
  94         bus_dma_tag_t           re_rx_mtag;     /* RX mbuf mapping tag */
  95         bus_dma_tag_t           re_tx_mtag;     /* TX mbuf mapping tag */
  96         bus_dma_tag_t           re_stag;        /* stats mapping tag */
  97         bus_dmamap_t            re_smap;        /* stats map */
  98         struct re_stats         *re_stats;
  99         bus_addr_t              re_stats_addr;
 100         bus_dma_tag_t           re_rx_list_tag;
 101         bus_dmamap_t            re_rx_list_map;
 102         struct re_desc          *re_rx_list;
 103         bus_addr_t              re_rx_list_addr;
 104         bus_dma_tag_t           re_tx_list_tag;
 105         bus_dmamap_t            re_tx_list_map;
 106         struct re_desc          *re_tx_list;
 107         bus_addr_t              re_tx_list_addr;
 108
 109         bus_dma_tag_t           re_jpool_tag;
 110         bus_dmamap_t            re_jpool_map;
 111         caddr_t                 re_jpool;
 112         struct re_jbuf          *re_jbuf;
 113         struct lwkt_serialize   re_jbuf_serializer;
 114         SLIST_HEAD(, re_jbuf)   re_jbuf_free;
 115 };
 116
 117 struct re_softc {
 118         struct arpcom           arpcom;         /* interface info */
 119         device_t                dev;
 120         bus_space_handle_t      re_bhandle;     /* bus space handle */
 121         bus_space_tag_t         re_btag;        /* bus space tag */
 122         int                     re_res_rid;
 123         int                     re_res_type;
 124         struct resource         *re_res;
 125         struct resource         *re_irq;
 126         void                    *re_intrhand;
 127         bus_dma_tag_t           re_parent_tag;
 128         bus_dma_tag_t           re_tag;
 129         struct ifpoll_compat    re_npoll;
 130         struct re_list_data     re_ldata;
 131         struct callout          re_timer;
 132         struct mbuf             *re_head;
 133         struct mbuf             *re_tail;
 134         uint32_t                re_caps;        /* see RE_C_ */
 135         int                     re_rx_desc_cnt;
 136         int                     re_tx_desc_cnt;
 137         int                     re_bus_speed;
 138         int                     rxcycles;
 139         int                     re_rxbuf_size;
 140         int                     (*re_newbuf)(struct re_softc *, int, int);
 141         int                     re_irq_type;
 142         int                     re_irq_rid;
 143
 144         uint32_t                re_flags;       /* see RE_F_ */
 145         int                     re_saved_ifflags;
 146
 147         uint16_t                re_intrs;
 148         uint16_t                re_tx_ack;
 149         uint16_t                re_rx_ack;
 150         int                     re_tx_time;
 151         int                     re_rx_time;
 152         int                     re_sim_time;
 153         int                     re_imtype;      /* see RE_IMTYPE_ */
 154
 155         uint32_t                saved_maps[5];  /* pci data */
 156         uint32_t                saved_biosaddr;
 157         uint8_t                 saved_intline;
 158         uint8_t                 saved_cachelnsz;
 159         uint8_t                 saved_lattimer;
 160
 161         /*
 162          * Used by Realtek re(4) backend.
 163          */
 164         int                     re_if_flags;
 165         uint8_t                 re_type;
 166         u_int16_t               re_device_id;
 167         u_int8_t                re_hw_supp_now_is_oob_ver;
 168         int                     max_jumbo_frame_size;
 169         int                     re_rx_mbuf_sz;
 170         u_int8_t                RequireAdcBiasPatch;
 171         u_int16_t               AdcBiasPatchIoffset;
 172         u_int16_t               SwrCnt1msIni;
 173         u_int8_t                RequireAdjustUpsTxLinkPulseTiming;
 174         u_int8_t                re_hw_enable_msi_msix;
 175         u_int8_t                re_coalesce_tx_pkt;
 176         u_int8_t                re_8169_MacVersion;
 177         u_int8_t                re_8169_PhyVersion;
 178         int                     re_tx_cstag;
 179         int                     re_rx_cstag;
 180         struct ifmedia          media;
 181         u_int16_t               cur_page;
 182         u_int8_t                re_unit;
 183 };
 184
 185 #define RE_C_HWIM               0x4     /* hardware interrupt moderation */
 186 #define RE_C_CONTIGRX           0x400   /* need contig buf to RX jumbo frames */
 187
 188 /* Interrupt moderation types */
 189 #define RE_IMTYPE_NONE          0
 190 #define RE_IMTYPE_SIM           1       /* simulated */
 191 #define RE_IMTYPE_HW            2       /* hardware based */
 192
 193 #define RE_F_TIMER_INTR         0x1
 194 #define RE_F_USE_JPOOL          0x2
 195 #define RE_F_DROP_RXFRAG        0x4
 196 #define RE_F_LINKED             0x8
 197 #define RE_F_SUSPENDED          0x10
 198
 199 /*
 200  * register space access macros
 201  */
 202 #define CSR_WRITE_STREAM_4(sc, reg, val)        \
 203         bus_space_write_stream_4(sc->re_btag, sc->re_bhandle, reg, val)
 204 #define CSR_WRITE_4(sc, reg, val)       \
 205         bus_space_write_4(sc->re_btag, sc->re_bhandle, reg, val)
 206 #define CSR_WRITE_2(sc, reg, val)       \
 207         bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val)
 208 #define CSR_WRITE_1(sc, reg, val)       \
 209         bus_space_write_1(sc->re_btag, sc->re_bhandle, reg, val)
 210
 211 #define CSR_READ_4(sc, reg)             \
 212         bus_space_read_4(sc->re_btag, sc->re_bhandle, reg)
 213 #define CSR_READ_2(sc, reg)             \
 214         bus_space_read_2(sc->re_btag, sc->re_bhandle, reg)
 215 #define CSR_READ_1(sc, reg)             \
 216         bus_space_read_1(sc->re_btag, sc->re_bhandle, reg)
 217
 218 #define CSR_SETBIT_1(sc, reg, val)      \
 219         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (val))
 220 #define CSR_CLRBIT_1(sc, reg, val)      \
 221         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(val))