re: Leverage Realtek driver's chip/PHY initialization/reset.
[dragonfly.git] / sys / dev / netif / mii_layer / rgephyreg.h
blob5473854226db162bda7916fba66d22e1ed722499
1 /*-
2 * Copyright (c) 2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
32 * $FreeBSD: src/sys/dev/mii/rgephyreg.h,v 1.2 2005/01/06 01:42:56 imp Exp $
33 * $DragonFly: src/sys/dev/netif/mii_layer/rgephyreg.h,v 1.2 2007/09/17 11:29:36 hasso Exp $
36 #ifndef _DEV_MII_RGEPHYREG_H_
37 #define _DEV_MII_RGEPHYREG_H_
40 * RealTek 8169S/8110S gigE PHY registers
43 #define RGEPHY_MII_BMCR 0x00
44 #define RGEPHY_BMCR_RESET 0x8000
45 #define RGEPHY_BMCR_LOOP 0x4000
46 #define RGEPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
47 #define RGEPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
48 #define RGEPHY_BMCR_PDOWN 0x0800 /* Power down */
49 #define RGEPHY_BMCR_ISO 0x0400 /* Isolate */
50 #define RGEPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
51 #define RGEPHY_BMCR_FDX 0x0100 /* Duplex mode */
52 #define RGEPHY_BMCR_CTEST 0x0080 /* Collision test enable */
53 #define RGEPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */
55 #define RGEPHY_S1000 RGEPHY_BMCR_SPD1 /* 1000mbps */
56 #define RGEPHY_S100 RGEPHY_BMCR_SPD0 /* 100mpbs */
57 #define RGEPHY_S10 0 /* 10mbps */
59 #define RGEPHY_MII_BMSR 0x01
60 #define RGEPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
61 #define RGEPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
62 #define RGEPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
63 #define RGEPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
64 #define RGEPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
65 #define RGEPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
66 #define RGEPHY_BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */
67 #define RGEPHY_BMSR_EXTSTS 0x0100 /* Extended status present */
68 #define RGEPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */
69 #define RGEPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */
70 #define RGEPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */
71 #define RGEPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
72 #define RGEPHY_BMSR_LINK 0x0004 /* Link status */
73 #define RGEPHY_BMSR_JABBER 0x0002 /* Jabber detected */
74 #define RGEPHY_BMSR_EXT 0x0001 /* Extended capability */
76 #define RGEPHY_MII_ANAR 0x04
77 #define RGEPHY_ANAR_NP 0x8000 /* Next page */
78 #define RGEPHY_ANAR_RF 0x2000 /* Remote fault */
79 #define RGEPHY_ANAR_ASP 0x0800 /* Asymmetric Pause */
80 #define RGEPHY_ANAR_PC 0x0400 /* Pause capable */
81 #define RGEPHY_ANAR_T4 0x0200 /* local device supports 100bT4 */
82 #define RGEPHY_ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */
83 #define RGEPHY_ANAR_TX 0x0080 /* local device supports 100bTx */
84 #define RGEPHY_ANAR_10_FD 0x0040 /* local device supports 10bT FD */
85 #define RGEPHY_ANAR_10 0x0020 /* local device supports 10bT */
86 #define RGEPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */
88 #define RGEPHY_MII_ANLPAR 0x05
89 #define RGEPHY_ANLPAR_NP 0x8000 /* Next page */
90 #define RGEPHY_ANLPAR_RF 0x2000 /* Remote fault */
91 #define RGEPHY_ANLPAR_ASP 0x0800 /* Asymmetric Pause */
92 #define RGEPHY_ANLPAR_PC 0x0400 /* Pause capable */
93 #define RGEPHY_ANLPAR_T4 0x0200 /* link partner supports 100bT4 */
94 #define RGEPHY_ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */
95 #define RGEPHY_ANLPAR_TX 0x0080 /* link partner supports 100bTx */
96 #define RGEPHY_ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */
97 #define RGEPHY_ANLPAR_10 0x0020 /* link partner supports 10bT */
98 #define RGEPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */
100 #define RGEPHY_SEL_TYPE 0x0001 /* ethernet */
102 #define RGEPHY_MII_ANER 0x06
103 #define RGEPHY_ANER_PDF 0x0010 /* Parallel detection fault */
104 #define RGEPHY_ANER_LPNP 0x0008 /* Link partner can next page */
105 #define RGEPHY_ANER_NP 0x0004 /* Local PHY can next page */
106 #define RGEPHY_ANER_RX 0x0002 /* Next page received */
107 #define RGEPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */
109 #define RGEPHY_MII_NEXTP 0x07 /* Next page */
111 #define RGEPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */
113 #define RGEPHY_MII_1000CTL 0x09 /* 1000baseT control */
114 #define RGEPHY_1000CTL_TST 0xE000 /* test modes */
115 #define RGEPHY_1000CTL_MSE 0x1000 /* Master/Slave manual enable */
116 #define RGEPHY_1000CTL_MSC 0x0800 /* Master/Slave select */
117 #define RGEPHY_1000CTL_RD 0x0400 /* Repeater/DTE */
118 #define RGEPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */
119 #define RGEPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */
121 #define RGEPHY_TEST_TX_JITTER 0x2000
122 #define RGEPHY_TEST_TX_JITTER_MASTER_MODE 0x4000
123 #define RGEPHY_TEST_TX_JITTER_SLAVE_MODE 0x6000
124 #define RGEPHY_TEST_TX_DISTORTION 0x8000
126 #define RGEPHY_MII_1000STS 0x0A /* 1000baseT status */
127 #define RGEPHY_1000STS_MSF 0x8000 /* Master/slave fault */
128 #define RGEPHY_1000STS_MSR 0x4000 /* Master/slave result */
129 #define RGEPHY_1000STS_LRS 0x2000 /* Local receiver status */
130 #define RGEPHY_1000STS_RRS 0x1000 /* Remote receiver status */
131 #define RGEPHY_1000STS_LPFD 0x0800 /* Link partner can FD */
132 #define RGEPHY_1000STS_LPHD 0x0400 /* Link partner can HD */
133 #define RGEPHY_1000STS_IEC 0x00FF /* Idle error count */
135 #define RGEPHY_MII_EXTSTS 0x0F /* Extended status */
136 #define RGEPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
137 #define RGEPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
138 #define RGEPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
139 #define RGEPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
141 /* RTL8211B */
142 #define RGEPHY_SR 0x11
143 #define RGEPHY_SR_CROSSOVER (1<< 6)
144 #define RGEPHY_SR_LINK (1<<10)
145 #define RGEPHY_SR_FDX (1<<13)
146 #define RGEPHY_SR_SPEED(X) (((X)>>14)&3)
148 #define RGEPHY_EXT_CR 0x14
151 * Gigabit media status (8169 only)
153 #define RE_GMEDIASTAT 0x006C /* 8 bits */
154 #define RE_GMEDIASTAT_FDX 0x01 /* full duplex */
155 #define RE_GMEDIASTAT_LINK 0x02 /* link up */
156 #define RE_GMEDIASTAT_10MBPS 0x04 /* 10mps link */
157 #define RE_GMEDIASTAT_100MBPS 0x08 /* 100mbps link */
158 #define RE_GMEDIASTAT_1000MBPS 0x10 /* gigE link */
159 #define RE_GMEDIASTAT_RXFLOW 0x20 /* RX flow control on */
160 #define RE_GMEDIASTAT_TXFLOW 0x40 /* TX flow control on */
161 #define RE_GMEDIASTAT_TBI 0x80 /* TBI enabled */
163 #endif /* !_DEV_RGEPHY_MIIREG_H_ */