sys/dev/disk/aic/aicvar.h

   1 /*-
   2  * Copyright (c) 1999 Luoqi Chen.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/dev/aic/aicvar.h,v 1.2.2.1 2000/08/08 23:51:23 peter Exp $
  27  * $DragonFly: src/sys/dev/disk/aic/aicvar.h,v 1.4 2008/01/05 07:27:09 pavalos Exp $
  28  */
  29
  30 struct aic_transinfo {
  31         u_int8_t period;
  32         u_int8_t offset;
  33 };
  34
  35 struct aic_tinfo {
  36         u_int16_t lubusy;
  37         u_int8_t flags;
  38         u_int8_t scsirate;
  39         struct aic_transinfo current;
  40         struct aic_transinfo goal;
  41         struct aic_transinfo user;
  42 };
  43
  44 #define TINFO_DISC_ENB          0x01
  45 #define TINFO_TAG_ENB           0x02
  46 #define TINFO_SDTR_NEGO         0x04
  47 #define TINFO_SDTR_SENT         0x08
  48
  49 struct aic_scb {
  50         union ccb       *ccb;
  51         u_int8_t        flags;
  52         u_int8_t        tag;
  53         u_int8_t        target;
  54         u_int8_t        lun;
  55         u_int8_t        status;
  56         u_int8_t        cmd_len;
  57         u_int8_t        *cmd_ptr;
  58         u_int32_t       data_len;
  59         u_int8_t        *data_ptr;
  60 };
  61
  62 #define ccb_scb_ptr     spriv_ptr0
  63 #define ccb_aic_ptr     spriv_ptr1
  64
  65 #define SCB_ACTIVE              0x01
  66 #define SCB_DISCONNECTED        0x02
  67 #define SCB_DEVICE_RESET        0x04
  68 #define SCB_SENSE               0x08
  69
  70 enum { AIC6260, AIC6360, AIC6370, GM82C700 };
  71
  72 struct aic_softc {
  73         int                     unit;
  74         bus_space_tag_t         tag;
  75         bus_space_handle_t      bsh;
  76         bus_dma_tag_t           dmat;
  77
  78         struct cam_sim          *sim;
  79         struct cam_path         *path;
  80         TAILQ_HEAD(,ccb_hdr)    pending_ccbs, nexus_ccbs;
  81         struct aic_scb          *nexus;
  82
  83         u_int32_t               flags;
  84         u_int8_t                initiator;
  85         u_int8_t                state;
  86         u_int8_t                target;
  87         u_int8_t                lun;
  88         u_int8_t                prev_phase;
  89
  90         u_int8_t                msg_outq;
  91         u_int8_t                msg_sent;
  92         int                     msg_len;
  93         char                    msg_buf[8];
  94
  95         struct aic_tinfo        tinfo[8];
  96         struct aic_scb          scbs[256];
  97
  98         int                     min_period;
  99         int                     max_period;
 100         int                     chip_type;
 101 };
 102
 103 #define AIC_DISC_ENABLE         0x01
 104 #define AIC_DMA_ENABLE          0x02
 105 #define AIC_PARITY_ENABLE       0x04
 106 #define AIC_DWIO_ENABLE         0x08
 107 #define AIC_RESOURCE_SHORTAGE   0x10
 108 #define AIC_DROP_MSGIN          0x20
 109 #define AIC_BUSFREE_OK          0x40
 110 #define AIC_FAST_ENABLE         0x80
 111
 112 #define AIC_IDLE                0x00
 113 #define AIC_SELECTING           0x01
 114 #define AIC_RESELECTED          0x02
 115 #define AIC_RECONNECTING        0x03
 116 #define AIC_HASNEXUS            0x04
 117
 118 #define AIC_MSG_IDENTIFY        0x01
 119 #define AIC_MSG_TAG_Q           0x02
 120 #define AIC_MSG_SDTR            0x04
 121 #define AIC_MSG_WDTR            0x08
 122 #define AIC_MSG_MSGBUF          0x80
 123
 124 #define AIC_SYNC_PERIOD         (200 / 4)
 125 #define AIC_FAST_SYNC_PERIOD    (100 / 4)
 126 #define AIC_MIN_SYNC_PERIOD     112
 127 #define AIC_SYNC_OFFSET         8
 128
 129 #define aic_inb(aic, port) \
 130         bus_space_read_1((aic)->tag, (aic)->bsh, (port))
 131
 132 #define aic_outb(aic, port, value) \
 133         bus_space_write_1((aic)->tag, (aic)->bsh, (port), (value))
 134
 135 #define aic_insb(aic, port, addr, count) \
 136         bus_space_read_multi_1((aic)->tag, (aic)->bsh, (port), (addr), (count))
 137
 138 #define aic_outsb(aic, port, addr, count) \
 139         bus_space_write_multi_1((aic)->tag, (aic)->bsh, (port), (addr), (count))
 140
 141 #define aic_insw(aic, port, addr, count) \
 142         bus_space_read_multi_2((aic)->tag, (aic)->bsh, (port), \
 143                 (u_int16_t *)(addr), (count))
 144
 145 #define aic_outsw(aic, port, addr, count) \
 146         bus_space_write_multi_2((aic)->tag, (aic)->bsh, (port), \
 147                 (u_int16_t *)(addr), (count))
 148
 149 #define aic_insl(aic, port, addr, count) \
 150         bus_space_read_multi_4((aic)->tag, (aic)->bsh, (port), \
 151                 (u_int32_t *)(addr), (count))
 152
 153 #define aic_outsl(aic, port, addr, count) \
 154         bus_space_write_multi_4((aic)->tag, (aic)->bsh, (port), \
 155                 (u_int32_t *)(addr), (count))
 156
 157 extern int aic_probe (struct aic_softc *);
 158 extern int aic_attach (struct aic_softc *);
 159 extern int aic_detach (struct aic_softc *);
 160 extern void aic_intr (void *);