sys/platform/pc32/apic/apic_ipl.s

   1 /*
   2  * Copyright (c) 2003,2004 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Matthew Dillon <dillon@backplane.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * Copyright (c) 1997, by Steve Passe,  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. The name of the developer may NOT be used to endorse or promote products
  42  *    derived from this software without specific prior written permission.
  43  *
  44  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  45  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  46  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  47  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  48  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  49  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  50  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  51  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  52  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  53  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  54  * SUCH DAMAGE.
  55  *
  56  * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
  57  * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.s,v 1.17 2006/11/07 18:50:06 dillon Exp $
  58  */
  59
  60 #include "use_npx.h"
  61
  62 #include <machine/asmacros.h>
  63 #include <machine/segments.h>
  64 #include <machine/lock.h>
  65 #include <machine/psl.h>
  66 #include <machine/trap.h>
  67
  68 #include "apicreg.h"
  69 #include "apic_ipl.h"
  70 #include "assym.s"
  71
  72 #ifdef APIC_IO
  73
  74         .data
  75         ALIGN_DATA
  76
  77         /*
  78          * Interrupt mask for APIC interrupts, defaults to all hardware
  79          * interrupts turned off.
  80          */
  81
  82         .p2align 2                              /* MUST be 32bit aligned */
  83
  84         .globl apic_imen
  85 apic_imen:
  86         .long   APIC_HWI_MASK
  87
  88         .text
  89         SUPERALIGN_TEXT
  90
  91         /*
  92          * Functions to enable and disable a hardware interrupt.  The
  93          * IRQ number is passed as an argument.
  94          */
  95 ENTRY(APIC_INTRDIS)
  96         APIC_IMASK_LOCK                 /* enter critical reg */
  97         movl    4(%esp),%eax
  98 1:
  99         btsl    %eax, apic_imen
 100         shll    $4, %eax
 101         movl    CNAME(int_to_apicintpin) + 8(%eax), %edx
 102         movl    CNAME(int_to_apicintpin) + 12(%eax), %ecx
 103         testl   %edx, %edx
 104         jz      2f
 105         movl    %ecx, (%edx)            /* target register index */
 106         orl     $IOART_INTMASK, IOAPIC_WINDOW(%edx)
 107                                         /* set intmask in target apic reg */
 108 2:
 109         APIC_IMASK_UNLOCK               /* exit critical reg */
 110         ret
 111
 112 ENTRY(APIC_INTREN)
 113         APIC_IMASK_LOCK                 /* enter critical reg */
 114         movl    4(%esp), %eax           /* mask into %eax */
 115 1:
 116         btrl    %eax, apic_imen         /* update apic_imen */
 117         shll    $4, %eax
 118         movl    CNAME(int_to_apicintpin) + 8(%eax), %edx
 119         movl    CNAME(int_to_apicintpin) + 12(%eax), %ecx
 120         testl   %edx, %edx
 121         jz      2f
 122         movl    %ecx, (%edx)            /* write the target register index */
 123         andl    $~IOART_INTMASK, IOAPIC_WINDOW(%edx)
 124                                         /* clear mask bit */
 125 2:
 126         APIC_IMASK_UNLOCK               /* exit critical reg */
 127         ret
 128
 129 /******************************************************************************
 130  *
 131  */
 132
 133 /*
 134  * u_int io_apic_write(int apic, int select);
 135  */
 136 ENTRY(io_apic_read)
 137         movl    4(%esp), %ecx           /* APIC # */
 138         movl    ioapic, %eax
 139         movl    (%eax,%ecx,4), %edx     /* APIC base register address */
 140         movl    8(%esp), %eax           /* target register index */
 141         movl    %eax, (%edx)            /* write the target register index */
 142         movl    IOAPIC_WINDOW(%edx), %eax /* read the APIC register data */
 143         ret                             /* %eax = register value */
 144
 145 /*
 146  * void io_apic_write(int apic, int select, int value);
 147  */
 148 ENTRY(io_apic_write)
 149         movl    4(%esp), %ecx           /* APIC # */
 150         movl    ioapic, %eax
 151         movl    (%eax,%ecx,4), %edx     /* APIC base register address */
 152         movl    8(%esp), %eax           /* target register index */
 153         movl    %eax, (%edx)            /* write the target register index */
 154         movl    12(%esp), %eax          /* target register value */
 155         movl    %eax, IOAPIC_WINDOW(%edx) /* write the APIC register data */
 156         ret                             /* %eax = void */
 157
 158 /*
 159  * Send an EOI to the local APIC.
 160  */
 161 ENTRY(apic_eoi)
 162         movl    $0, lapic+0xb0
 163         ret
 164
 165 #endif