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Sync ACPICA with Intel's version 20170831.
[dragonfly.git] / sys / contrib / dev / acpica / source / common / dmtbinfo.c
blob5180b4db074106ded15c19039008721e6817da1f
1 /******************************************************************************
2 *
3 * Module Name: dmtbinfo - Table info for non-AML tables
4 *
5 *****************************************************************************/
6
7 /******************************************************************************
8 *
9 * 1. Copyright Notice
10 *
11 * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
12 * All rights reserved.
13 *
14 * 2. License
15 *
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
20 *
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
27 *
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
36 *
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
39 *
40 * 3. Conditions
41 *
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
53 *
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
65 *
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
71 *
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
74 *
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
79 *
80 * 4. Disclaimer and Export Compliance
81 *
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
88 * PARTICULAR PURPOSE.
89 *
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
97 * LIMITED REMEDY.
98 *
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
113 *
114 *****************************************************************************
115 *
116 * Alternatively, you may choose to be licensed under the terms of the
117 * following license:
118 *
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
121 * are met:
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
133 *
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145 *
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
149 *
150 *****************************************************************************/
151
152 #include "acpi.h"
153 #include "accommon.h"
154 #include "acdisasm.h"
155
156 /* This module used for application-level code only */
157
158 #define _COMPONENT ACPI_CA_DISASSEMBLER
159 ACPI_MODULE_NAME ("dmtbinfo")
160
161 /*
162 * How to add a new table:
163 *
164 * - Add the C table definition to the actbl1.h or actbl2.h header.
165 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
166 * - Define the table in this file (for the disassembler). If any
167 * new data types are required (ACPI_DMT_*), see below.
168 * - Add an external declaration for the new table definition (AcpiDmTableInfo*)
169 * in acdisam.h
170 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData)
171 * If a simple table (with no subtables), no disassembly code is needed.
172 * Otherwise, create the AcpiDmDump* function for to disassemble the table
173 * and add it to the dmtbdump.c file.
174 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h
175 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c
176 * - Create a template for the new table
177 * - Add data table compiler support
178 *
179 * How to add a new data type (ACPI_DMT_*):
180 *
181 * - Add new type at the end of the ACPI_DMT list in acdisasm.h
182 * - Add length and implementation cases in dmtable.c (disassembler)
183 * - Add type and length cases in dtutils.c (DT compiler)
184 */
185
186 /*
187 * Macros used to generate offsets to specific table fields
188 */
189 #define ACPI_FACS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f)
190 #define ACPI_GAS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
191 #define ACPI_HDR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
192 #define ACPI_RSDP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
193 #define ACPI_BERT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f)
194 #define ACPI_BGRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f)
195 #define ACPI_BOOT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
196 #define ACPI_CPEP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
197 #define ACPI_DBG2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f)
198 #define ACPI_DBGP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
199 #define ACPI_DMAR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
200 #define ACPI_DRTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f)
201 #define ACPI_ECDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
202 #define ACPI_EINJ_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
203 #define ACPI_ERST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f)
204 #define ACPI_GTDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f)
205 #define ACPI_HEST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f)
206 #define ACPI_HPET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f)
207 #define ACPI_HMAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HMAT,f)
208 #define ACPI_IORT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IORT,f)
209 #define ACPI_IVRS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
210 #define ACPI_MADT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f)
211 #define ACPI_MCFG_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
212 #define ACPI_MCHI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f)
213 #define ACPI_MPST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f)
214 #define ACPI_MSCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
215 #define ACPI_NFIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_NFIT,f)
216 #define ACPI_PCCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f)
217 #define ACPI_PMTT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f)
218 #define ACPI_RASF_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RASF,f)
219 #define ACPI_S3PT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f)
220 #define ACPI_SBST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f)
221 #define ACPI_SDEI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SDEI,f)
222 #define ACPI_SLIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
223 #define ACPI_SPCR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
224 #define ACPI_SPMI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
225 #define ACPI_SRAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
226 #define ACPI_STAO_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_STAO,f)
227 #define ACPI_TCPA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_HDR,f)
228 #define ACPI_TPM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f)
229 #define ACPI_UEFI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
230 #define ACPI_WAET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f)
231 #define ACPI_WDAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
232 #define ACPI_WDDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f)
233 #define ACPI_WDRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
234 #define ACPI_WPBT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WPBT,f)
235 #define ACPI_WSMT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WSMT,f)
236 #define ACPI_XENV_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_XENV,f)
237
238 /* Subtables */
239
240 #define ACPI_ASF0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f)
241 #define ACPI_ASF1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f)
242 #define ACPI_ASF1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
243 #define ACPI_ASF2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
244 #define ACPI_ASF2a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
245 #define ACPI_ASF3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f)
246 #define ACPI_ASF4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
247 #define ACPI_CPEP0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
248 #define ACPI_CSRT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f)
249 #define ACPI_CSRT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f)
250 #define ACPI_CSRT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f)
251 #define ACPI_DBG20_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f)
252 #define ACPI_DMARS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
253 #define ACPI_DMAR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
254 #define ACPI_DMAR1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
255 #define ACPI_DMAR2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
256 #define ACPI_DMAR3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
257 #define ACPI_DMAR4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f)
258 #define ACPI_DRTM0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST,f)
259 #define ACPI_DRTM1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST,f)
260 #define ACPI_DRTM1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE,f)
261 #define ACPI_DRTM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_DPS_ID,f)
262 #define ACPI_EINJ0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
263 #define ACPI_ERST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
264 #define ACPI_FPDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
265 #define ACPI_FPDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT_POINTER,f)
266 #define ACPI_FPDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_POINTER,f)
267 #define ACPI_GTDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_BLOCK,f)
268 #define ACPI_GTDT0a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_ENTRY,f)
269 #define ACPI_GTDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_WATCHDOG,f)
270 #define ACPI_GTDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_HEADER,f)
271 #define ACPI_HEST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
272 #define ACPI_HEST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
273 #define ACPI_HEST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
274 #define ACPI_HEST6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
275 #define ACPI_HEST7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f)
276 #define ACPI_HEST8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
277 #define ACPI_HEST9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
278 #define ACPI_HEST10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC_V2,f)
279 #define ACPI_HEST11_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f)
280 #define ACPI_HESTN_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
281 #define ACPI_HESTB_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f)
282 #define ACPI_HMAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f)
283 #define ACPI_HMAT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HMAT_LOCALITY,f)
284 #define ACPI_HMAT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HMAT_CACHE,f)
285 #define ACPI_HMATH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HMAT_STRUCTURE,f)
286 #define ACPI_IORT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ITS_GROUP,f)
287 #define ACPI_IORT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT,f)
288 #define ACPI_IORT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ROOT_COMPLEX,f)
289 #define ACPI_IORT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU,f)
290 #define ACPI_IORT3A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_GSI,f)
291 #define ACPI_IORT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_V3,f)
292 #define ACPI_IORTA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_MEMORY_ACCESS,f)
293 #define ACPI_IORTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NODE,f)
294 #define ACPI_IORTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ID_MAPPING,f)
295 #define ACPI_IVRSH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
296 #define ACPI_IVRS0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
297 #define ACPI_IVRS1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
298 #define ACPI_IVRSD_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
299 #define ACPI_IVRS8A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
300 #define ACPI_IVRS8B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
301 #define ACPI_IVRS8C_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
302 #define ACPI_LPITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f)
303 #define ACPI_LPIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f)
304 #define ACPI_MADT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
305 #define ACPI_MADT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
306 #define ACPI_MADT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
307 #define ACPI_MADT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
308 #define ACPI_MADT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
309 #define ACPI_MADT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
310 #define ACPI_MADT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
311 #define ACPI_MADT7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
312 #define ACPI_MADT8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
313 #define ACPI_MADT9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
314 #define ACPI_MADT10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
315 #define ACPI_MADT11_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f)
316 #define ACPI_MADT12_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f)
317 #define ACPI_MADT13_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f)
318 #define ACPI_MADT14_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f)
319 #define ACPI_MADT15_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_TRANSLATOR,f)
320 #define ACPI_MADTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
321 #define ACPI_MCFG0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
322 #define ACPI_MPST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f)
323 #define ACPI_MPST0A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f)
324 #define ACPI_MPST0B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f)
325 #define ACPI_MPST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f)
326 #define ACPI_MPST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f)
327 #define ACPI_MSCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
328 #define ACPI_MTMR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f)
329 #define ACPI_NFITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_HEADER,f)
330 #define ACPI_NFIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f)
331 #define ACPI_NFIT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_MEMORY_MAP,f)
332 #define ACPI_NFIT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_INTERLEAVE,f)
333 #define ACPI_NFIT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SMBIOS,f)
334 #define ACPI_NFIT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_CONTROL_REGION,f)
335 #define ACPI_NFIT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_DATA_REGION,f)
336 #define ACPI_NFIT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_FLUSH_ADDRESS,f)
337 #define ACPI_PCCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f)
338 #define ACPI_PCCT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f)
339 #define ACPI_PCCT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f)
340 #define ACPI_PCCT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f)
341 #define ACPI_PCCT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f)
342 #define ACPI_PMTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f)
343 #define ACPI_PMTT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f)
344 #define ACPI_PMTT1A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f)
345 #define ACPI_PMTT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f)
346 #define ACPI_PMTTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f)
347 #define ACPI_PPTTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
348 #define ACPI_PPTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PPTT_PROCESSOR,f)
349 #define ACPI_PPTT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PPTT_CACHE,f)
350 #define ACPI_PPTT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PPTT_ID,f)
351 #define ACPI_S3PTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f)
352 #define ACPI_S3PT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f)
353 #define ACPI_S3PT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f)
354 #define ACPI_SLIC_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIC,f)
355 #define ACPI_SRATH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
356 #define ACPI_SRAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
357 #define ACPI_SRAT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
358 #define ACPI_SRAT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
359 #define ACPI_SRAT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_GICC_AFFINITY,f)
360 #define ACPI_SRAT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_GIC_ITS_AFFINITY,f)
361 #define ACPI_TCPA_CLIENT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_CLIENT,f)
362 #define ACPI_TCPA_SERVER_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_SERVER,f)
363 #define ACPI_VRTC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f)
364 #define ACPI_WDAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
365
366 /*
367 * Simplify access to flag fields by breaking them up into bytes
368 */
369 #define ACPI_FLAG_OFFSET(d,f,o) (UINT16) (ACPI_OFFSET (d,f) + o)
370
371 /* Flags */
372
373 #define ACPI_BGRT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_BGRT,f,o)
374 #define ACPI_DRTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_DRTM,f,o)
375 #define ACPI_DRTM1a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_DRTM_RESOURCE,f,o)
376 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
377 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
378 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
379 #define ACPI_PPTT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PPTT_PROCESSOR,f,o)
380 #define ACPI_PPTT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PPTT_CACHE,f,o)
381 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
382 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
383 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
384 #define ACPI_SRAT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_GICC_AFFINITY,f,o)
385 #define ACPI_GTDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o)
386 #define ACPI_GTDT0a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o)
387 #define ACPI_GTDT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o)
388 #define ACPI_HMAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HMAT_ADDRESS_RANGE,f,o)
389 #define ACPI_HMAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HMAT_LOCALITY,f,o)
390 #define ACPI_HMAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HMAT_CACHE,f,o)
391 #define ACPI_IORT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU,f,o)
392 #define ACPI_IORT3a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_GSI,f,o)
393 #define ACPI_IORT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_V3,f,o)
394 #define ACPI_IORTA_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_MEMORY_ACCESS,f,o)
395 #define ACPI_IORTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_ID_MAPPING,f,o)
396 #define ACPI_LPITH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o)
397 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
398 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
399 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
400 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
401 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
402 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
403 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
404 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
405 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
406 #define ACPI_MADT11_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o)
407 #define ACPI_MADT13_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o)
408 #define ACPI_MPST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o)
409 #define ACPI_MPST2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o)
410 #define ACPI_NFIT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f,o)
411 #define ACPI_NFIT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_MEMORY_MAP,f,o)
412 #define ACPI_NFIT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_CONTROL_REGION,f,o)
413 #define ACPI_PCCT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o)
414 #define ACPI_PCCT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o)
415 #define ACPI_PCCT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f,o)
416 #define ACPI_PCCT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_MASTER,f,o)
417 #define ACPI_PCCT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_EXT_PCC_SLAVE,f,o)
418 #define ACPI_PMTTH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o)
419 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o)
420 #define ACPI_WSMT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WSMT,f,o)
421 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
422 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
423 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o)
424 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o)
425 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o)
426 #define ACPI_HEST11_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_DEFERRED_CHECK,f,o)
427
428 /*
429 * Required terminator for all tables below
430 */
431 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0}
432 #define ACPI_DMT_NEW_LINE {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0}
433
434
435 /*
436 * ACPI Table Information, used to dump formatted ACPI tables
437 *
438 * Each entry is of the form: <Field Type, Field Offset, Field Name>
439 */
440
441 /*******************************************************************************
442 *
443 * Common ACPI table header
444 *
445 ******************************************************************************/
446
447 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] =
448 {
449 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0},
450 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH},
451 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0},
452 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0},
453 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0},
454 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0},
455 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0},
456 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0},
457 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0},
458 ACPI_DMT_TERMINATOR
459 };
460
461
462 /*******************************************************************************
463 *
464 * GAS - Generic Address Structure
465 *
466 ******************************************************************************/
467
468 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] =
469 {
470 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0},
471 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0},
472 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0},
473 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0},
474 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0},
475 ACPI_DMT_TERMINATOR
476 };
477
478
479 /*******************************************************************************
480 *
481 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
482 *
483 ******************************************************************************/
484
485 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] =
486 {
487 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0},
488 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0},
489 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0},
490 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0},
491 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0},
492 ACPI_DMT_TERMINATOR
493 };
494
495 /* ACPI 2.0+ Extensions */
496
497 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] =
498 {
499 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH},
500 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0},
501 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0},
502 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0},
503 ACPI_DMT_TERMINATOR
504 };
505
506
507 /*******************************************************************************
508 *
509 * FACS - Firmware ACPI Control Structure
510 *
511 ******************************************************************************/
512
513 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] =
514 {
515 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0},
516 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH},
517 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0},
518 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0},
519 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0},
520 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
521 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0},
522 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0},
523 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0},
524 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0},
525 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0},
526 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG},
527 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0},
528 ACPI_DMT_TERMINATOR
529 };
530
531
532 /*******************************************************************************
533 *
534 * FADT - Fixed ACPI Description Table (Signature is FACP)
535 *
536 ******************************************************************************/
537
538 /* ACPI 1.0 FADT (Version 1) */
539
540 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] =
541 {
542 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0},
543 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO},
544 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0},
545 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0},
546 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0},
547 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0},
548 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0},
549 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0},
550 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0},
551 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0},
552 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0},
553 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0},
554 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0},
555 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0},
556 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0},
557 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0},
558 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0},
559 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0},
560 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0},
561 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0},
562 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0},
563 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0},
564 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0},
565 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0},
566 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0},
567 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0},
568 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0},
569 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0},
570 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0},
571 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0},
572 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0},
573 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0},
574 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0},
575 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0},
576 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0},
577 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG},
578
579 /* Boot Architecture Flags byte 0 */
580
581 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0},
582 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0},
583 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0},
584 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0},
585 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0},
586 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "CMOS RTC Not Present (V5)", 0},
587
588 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0},
589 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
590
591 /* Flags byte 0 */
592
593 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0},
594 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0},
595 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0},
596 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0},
597 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0},
598 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0},
599 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0},
600 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0},
601
602 /* Flags byte 1 */
603
604 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0},
605 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0},
606 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0},
607 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0},
608 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0},
609 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0},
610 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0},
611 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0},
612
613 /* Flags byte 2 */
614
615 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0},
616 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0},
617 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0},
618 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0},
619 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,2), "Hardware Reduced (V5)", 0},
620 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,2), "Low Power S0 Idle (V5)", 0},
621 ACPI_DMT_TERMINATOR
622 };
623
624 /* ACPI 1.0 MS Extensions (FADT version 2) */
625
626 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] =
627 {
628 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
629 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
630 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "Reserved", 0},
631 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "Reserved", 0},
632 ACPI_DMT_TERMINATOR
633 };
634
635 /* ACPI 2.0+ Extensions (FADT version 3, 4, and 5) */
636
637 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] =
638 {
639 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
640 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
641 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "ARM Flags (decoded below)", DT_FLAG},
642 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "PSCI Compliant", 0},
643 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "Must use HVC for PSCI", 0},
644 ACPI_DMT_NEW_LINE,
645 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "FADT Minor Revision", 0},
646 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0},
647 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0},
648 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0},
649 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0},
650 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0},
651 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0},
652 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0},
653 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0},
654 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0},
655 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0},
656 ACPI_DMT_TERMINATOR
657 };
658
659 /* ACPI 5.0 Extensions (FADT version 5) */
660
661 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[] =
662 {
663 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepControl), "Sleep Control Register", 0},
664 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepStatus), "Sleep Status Register", 0},
665 ACPI_DMT_TERMINATOR
666 };
667
668 /* ACPI 6.0 Extensions (FADT version 6) */
669
670 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt6[] =
671 {
672 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (HypervisorId), "Hypervisor ID", 0},
673 ACPI_DMT_TERMINATOR
674 };
675
676
677 /*
678 * Remaining tables are not consumed directly by the ACPICA subsystem
679 */
680
681 /*******************************************************************************
682 *
683 * ASF - Alert Standard Format table (Signature "ASF!")
684 *
685 ******************************************************************************/
686
687 /* Common Subtable header (one per Subtable) */
688
689 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] =
690 {
691 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0},
692 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0},
693 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH},
694 ACPI_DMT_TERMINATOR
695 };
696
697 /* 0: ASF Information */
698
699 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] =
700 {
701 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0},
702 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0},
703 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0},
704 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0},
705 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0},
706 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0},
707 ACPI_DMT_TERMINATOR
708 };
709
710 /* 1: ASF Alerts */
711
712 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] =
713 {
714 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0},
715 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0},
716 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0},
717 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0},
718 ACPI_DMT_TERMINATOR
719 };
720
721 /* 1a: ASF Alert data */
722
723 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] =
724 {
725 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0},
726 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0},
727 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0},
728 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0},
729 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0},
730 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0},
731 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0},
732 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0},
733 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0},
734 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0},
735 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0},
736 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0},
737 ACPI_DMT_TERMINATOR
738 };
739
740 /* 2: ASF Remote Control */
741
742 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] =
743 {
744 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0},
745 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0},
746 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0},
747 ACPI_DMT_TERMINATOR
748 };
749
750 /* 2a: ASF Control data */
751
752 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] =
753 {
754 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0},
755 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0},
756 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0},
757 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0},
758 ACPI_DMT_TERMINATOR
759 };
760
761 /* 3: ASF RMCP Boot Options */
762
763 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] =
764 {
765 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0},
766 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0},
767 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0},
768 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0},
769 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0},
770 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0},
771 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0},
772 ACPI_DMT_TERMINATOR
773 };
774
775 /* 4: ASF Address */
776
777 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] =
778 {
779 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0},
780 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT},
781 ACPI_DMT_TERMINATOR
782 };
783
784
785 /*******************************************************************************
786 *
787 * BERT - Boot Error Record table
788 *
789 ******************************************************************************/
790
791 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] =
792 {
793 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0},
794 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0},
795 ACPI_DMT_TERMINATOR
796 };
797
798
799 /*******************************************************************************
800 *
801 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
802 *
803 ******************************************************************************/
804
805 ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] =
806 {
807 {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0},
808 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status (decoded below)", DT_FLAG},
809 {ACPI_DMT_FLAG0, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Displayed", 0},
810 {ACPI_DMT_FLAGS1, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Orientation Offset", 0},
811
812 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0},
813 {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0},
814 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0},
815 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0},
816 ACPI_DMT_TERMINATOR
817 };
818
819
820 /*******************************************************************************
821 *
822 * BOOT - Simple Boot Flag Table
823 *
824 ******************************************************************************/
825
826 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] =
827 {
828 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0},
829 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0},
830 ACPI_DMT_TERMINATOR
831 };
832
833
834 /*******************************************************************************
835 *
836 * CPEP - Corrected Platform Error Polling table
837 *
838 ******************************************************************************/
839
840 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] =
841 {
842 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0},
843 ACPI_DMT_TERMINATOR
844 };
845
846 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] =
847 {
848 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0},
849 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH},
850 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0},
851 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0},
852 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0},
853 ACPI_DMT_TERMINATOR
854 };
855
856
857 /*******************************************************************************
858 *
859 * CSRT - Core System Resource Table
860 *
861 ******************************************************************************/
862
863 /* Main table consists only of the standard ACPI table header */
864
865 /* Resource Group subtable */
866
867 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] =
868 {
869 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", DT_LENGTH},
870 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0},
871 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0},
872 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0},
873 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0},
874 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0},
875 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0},
876 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0},
877 ACPI_DMT_TERMINATOR
878 };
879
880 /* Shared Info subtable */
881
882 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] =
883 {
884 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0},
885 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0},
886 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0},
887 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0},
888 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0},
889 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0},
890 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0},
891 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0},
892 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0},
893 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0},
894 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0},
895 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0},
896 ACPI_DMT_TERMINATOR
897 };
898
899
900 /* Resource Descriptor subtable */
901
902 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] =
903 {
904 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", DT_LENGTH},
905 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0},
906 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0},
907 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0},
908 ACPI_DMT_TERMINATOR
909 };
910
911 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[] =
912 {
913 {ACPI_DMT_RAW_BUFFER, 0, "ResourceInfo", DT_OPTIONAL},
914 ACPI_DMT_TERMINATOR
915 };
916
917
918 /*******************************************************************************
919 *
920 * DBG2 - Debug Port Table 2
921 *
922 ******************************************************************************/
923
924 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] =
925 {
926 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0},
927 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0},
928 ACPI_DMT_TERMINATOR
929 };
930
931 /* Debug Device Information Subtable */
932
933 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] =
934 {
935 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0},
936 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH},
937 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0},
938 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0},
939 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0},
940 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL},
941 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL},
942 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0},
943 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0},
944 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0},
945 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0},
946 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0},
947 ACPI_DMT_TERMINATOR
948 };
949
950 /* Variable-length data for the subtable */
951
952 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] =
953 {
954 {ACPI_DMT_GAS, 0, "Base Address Register", 0},
955 ACPI_DMT_TERMINATOR
956 };
957
958 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] =
959 {
960 {ACPI_DMT_UINT32, 0, "Address Size", 0},
961 ACPI_DMT_TERMINATOR
962 };
963
964 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] =
965 {
966 {ACPI_DMT_STRING, 0, "Namepath", 0},
967 ACPI_DMT_TERMINATOR
968 };
969
970 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] =
971 {
972 {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", DT_OPTIONAL},
973 ACPI_DMT_TERMINATOR
974 };
975
976
977 /*******************************************************************************
978 *
979 * DBGP - Debug Port
980 *
981 ******************************************************************************/
982
983 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] =
984 {
985 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0},
986 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0},
987 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0},
988 ACPI_DMT_TERMINATOR
989 };
990
991
992 /*******************************************************************************
993 *
994 * DMAR - DMA Remapping table
995 *
996 ******************************************************************************/
997
998 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] =
999 {
1000 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0},
1001 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0},
1002 {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0},
1003 ACPI_DMT_TERMINATOR
1004 };
1005
1006 /* Common Subtable header (one per Subtable) */
1007
1008 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] =
1009 {
1010 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0},
1011 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH},
1012 ACPI_DMT_TERMINATOR
1013 };
1014
1015 /* Common device scope entry */
1016
1017 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
1018 {
1019 {ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0},
1020 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH},
1021 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0},
1022 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0},
1023 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0},
1024 ACPI_DMT_TERMINATOR
1025 };
1026
1027 /* DMAR Subtables */
1028
1029 /* 0: Hardware Unit Definition */
1030
1031 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] =
1032 {
1033 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0},
1034 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0},
1035 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0},
1036 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0},
1037 ACPI_DMT_TERMINATOR
1038 };
1039
1040 /* 1: Reserved Memory Definition */
1041
1042 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] =
1043 {
1044 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0},
1045 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0},
1046 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0},
1047 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0},
1048 ACPI_DMT_TERMINATOR
1049 };
1050
1051 /* 2: Root Port ATS Capability Definition */
1052
1053 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] =
1054 {
1055 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0},
1056 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0},
1057 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0},
1058 ACPI_DMT_TERMINATOR
1059 };
1060
1061 /* 3: Remapping Hardware Static Affinity Structure */
1062
1063 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] =
1064 {
1065 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0},
1066 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0},
1067 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0},
1068 ACPI_DMT_TERMINATOR
1069 };
1070
1071 /* 4: ACPI Namespace Device Declaration Structure */
1072
1073 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] =
1074 {
1075 {ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0},
1076 {ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0},
1077 {ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0},
1078 ACPI_DMT_TERMINATOR
1079 };
1080
1081
1082 /*******************************************************************************
1083 *
1084 * DRTM - Dynamic Root of Trust for Measurement table
1085 *
1086 ******************************************************************************/
1087
1088 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] =
1089 {
1090 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryBaseAddress), "Entry Base Address", 0},
1091 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryLength), "Entry Length", 0},
1092 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (EntryAddress32), "Entry 32", 0},
1093 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryAddress64), "Entry 64", 0},
1094 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ExitAddress), "Exit Address", 0},
1095 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (LogAreaAddress), "Log Area Start", 0},
1096 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (LogAreaLength), "Log Area Length", 0},
1097 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ArchDependentAddress), "Arch Dependent Address", 0},
1098 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (Flags), "Flags (decoded below)", 0},
1099 {ACPI_DMT_FLAG0, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Namespace in TCB", 0},
1100 {ACPI_DMT_FLAG1, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on S3 Resume", 0},
1101 {ACPI_DMT_FLAG2, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on DLME_Exit", 0},
1102 {ACPI_DMT_FLAG3, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "PCR_Authorities Changed", 0},
1103 ACPI_DMT_TERMINATOR
1104 };
1105
1106 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[] =
1107 {
1108 {ACPI_DMT_UINT32, ACPI_DRTM0_OFFSET (ValidatedTableCount), "Validated Table Count", DT_COUNT},
1109 ACPI_DMT_TERMINATOR
1110 };
1111
1112 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[] =
1113 {
1114 {ACPI_DMT_UINT64, 0, "Table Address", DT_OPTIONAL},
1115 ACPI_DMT_TERMINATOR
1116 };
1117
1118 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[] =
1119 {
1120 {ACPI_DMT_UINT32, ACPI_DRTM1_OFFSET (ResourceCount), "Resource Count", DT_COUNT},
1121 ACPI_DMT_TERMINATOR
1122 };
1123
1124 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[] =
1125 {
1126 {ACPI_DMT_UINT56, ACPI_DRTM1a_OFFSET (Size[0]), "Size", DT_OPTIONAL},
1127 {ACPI_DMT_UINT8, ACPI_DRTM1a_OFFSET (Type), "Type", 0},
1128 {ACPI_DMT_FLAG0, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Resource Type", 0},
1129 {ACPI_DMT_FLAG7, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Protections", 0},
1130 {ACPI_DMT_UINT64, ACPI_DRTM1a_OFFSET (Address), "Address", 0},
1131 ACPI_DMT_TERMINATOR
1132 };
1133
1134 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[] =
1135 {
1136 {ACPI_DMT_UINT32, ACPI_DRTM2_OFFSET (DpsIdLength), "DLME Platform Id Length", DT_COUNT},
1137 {ACPI_DMT_BUF16, ACPI_DRTM2_OFFSET (DpsId), "DLME Platform Id", DT_COUNT},
1138 ACPI_DMT_TERMINATOR
1139 };
1140
1141
1142 /*******************************************************************************
1143 *
1144 * ECDT - Embedded Controller Boot Resources Table
1145 *
1146 ******************************************************************************/
1147
1148 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] =
1149 {
1150 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0},
1151 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0},
1152 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0},
1153 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0},
1154 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0},
1155 ACPI_DMT_TERMINATOR
1156 };
1157
1158
1159 /*******************************************************************************
1160 *
1161 * EINJ - Error Injection table
1162 *
1163 ******************************************************************************/
1164
1165 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] =
1166 {
1167 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0},
1168 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0},
1169 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0},
1170 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0},
1171 ACPI_DMT_TERMINATOR
1172 };
1173
1174 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] =
1175 {
1176 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0},
1177 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0},
1178 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1179 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
1180
1181 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0},
1182 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0},
1183 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0},
1184 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0},
1185 ACPI_DMT_TERMINATOR
1186 };
1187
1188
1189 /*******************************************************************************
1190 *
1191 * ERST - Error Record Serialization table
1192 *
1193 ******************************************************************************/
1194
1195 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] =
1196 {
1197 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0},
1198 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0},
1199 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0},
1200 ACPI_DMT_TERMINATOR
1201 };
1202
1203 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] =
1204 {
1205 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0},
1206 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0},
1207 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1208 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
1209
1210 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0},
1211 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0},
1212 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0},
1213 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0},
1214 ACPI_DMT_TERMINATOR
1215 };
1216
1217
1218 /*******************************************************************************
1219 *
1220 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1221 *
1222 ******************************************************************************/
1223
1224 /* Main table consists of only the standard ACPI header - subtables follow */
1225
1226 /* FPDT subtable header */
1227
1228 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] =
1229 {
1230 {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0},
1231 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH},
1232 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0},
1233 ACPI_DMT_TERMINATOR
1234 };
1235
1236 /* 0: Firmware Basic Boot Performance Record */
1237
1238 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] =
1239 {
1240 {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0},
1241 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "FPDT Boot Record Address", 0},
1242 ACPI_DMT_TERMINATOR
1243 };
1244
1245 /* 1: S3 Performance Table Pointer Record */
1246
1247 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] =
1248 {
1249 {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0},
1250 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Record Address", 0},
1251 ACPI_DMT_TERMINATOR
1252 };
1253
1254 #if 0
1255 /* Boot Performance Record, not supported at this time. */
1256 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0},
1257 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0},
1258 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0},
1259 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0},
1260 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0},
1261 #endif
1262
1263 /*******************************************************************************
1264 *
1265 * GTDT - Generic Timer Description Table
1266 *
1267 ******************************************************************************/
1268
1269 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] =
1270 {
1271 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterBlockAddresss), "Counter Block Address", 0},
1272 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Reserved), "Reserved", 0},
1273 ACPI_DMT_NEW_LINE,
1274 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Interrupt), "Secure EL1 Interrupt", 0},
1275 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Flags), "EL1 Flags (decoded below)", DT_FLAG},
1276 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Trigger Mode", 0},
1277 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Polarity", 0},
1278 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Always On", 0},
1279 ACPI_DMT_NEW_LINE,
1280 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Interrupt), "Non-Secure EL1 Interrupt", 0},
1281 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Flags), "NEL1 Flags (decoded below)", DT_FLAG},
1282 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Trigger Mode", 0},
1283 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Polarity", 0},
1284 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Always On", 0},
1285 ACPI_DMT_NEW_LINE,
1286 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0},
1287 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG},
1288 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0},
1289 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0},
1290 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Always On", 0},
1291 ACPI_DMT_NEW_LINE,
1292 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Interrupt), "Non-Secure EL2 Interrupt", 0},
1293 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Flags), "NEL2 Flags (decoded below)", DT_FLAG},
1294 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Trigger Mode", 0},
1295 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Polarity", 0},
1296 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Always On", 0},
1297 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterReadBlockAddress), "Counter Read Block Address", 0},
1298 ACPI_DMT_NEW_LINE,
1299 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerCount), "Platform Timer Count", 0},
1300 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerOffset), "Platform Timer Offset", 0},
1301 ACPI_DMT_TERMINATOR
1302 };
1303
1304 /* GTDT Subtable header (one per Subtable) */
1305
1306 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtHdr[] =
1307 {
1308 {ACPI_DMT_GTDT, ACPI_GTDTH_OFFSET (Type), "Subtable Type", 0},
1309 {ACPI_DMT_UINT16, ACPI_GTDTH_OFFSET (Length), "Length", DT_LENGTH},
1310 ACPI_DMT_TERMINATOR
1311 };
1312
1313 /* GTDT Subtables */
1314
1315 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0[] =
1316 {
1317 {ACPI_DMT_UINT8, ACPI_GTDT0_OFFSET (Reserved), "Reserved", 0},
1318 {ACPI_DMT_UINT64, ACPI_GTDT0_OFFSET (BlockAddress), "Block Address", 0},
1319 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerCount), "Timer Count", 0},
1320 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerOffset), "Timer Offset", 0},
1321 ACPI_DMT_TERMINATOR
1322 };
1323
1324 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0a[] =
1325 {
1326 {ACPI_DMT_UINT8 , ACPI_GTDT0a_OFFSET (FrameNumber), "Frame Number", 0},
1327 {ACPI_DMT_UINT24, ACPI_GTDT0a_OFFSET (Reserved[0]), "Reserved", 0},
1328 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (BaseAddress), "Base Address", 0},
1329 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (El0BaseAddress), "EL0 Base Address", 0},
1330 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerInterrupt), "Timer Interrupt", 0},
1331 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerFlags), "Timer Flags (decoded below)", 0},
1332 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0},
1333 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Polarity", 0},
1334 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0},
1335 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerFlags), "Virtual Timer Flags (decoded below)", 0},
1336 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Trigger Mode", 0},
1337 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Polarity", 0},
1338 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (CommonFlags), "Common Flags (decoded below)", 0},
1339 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Secure", 0},
1340 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Always On", 0},
1341 ACPI_DMT_TERMINATOR
1342 };
1343
1344 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt1[] =
1345 {
1346 {ACPI_DMT_UINT8, ACPI_GTDT1_OFFSET (Reserved), "Reserved", 0},
1347 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (RefreshFrameAddress), "Refresh Frame Address", 0},
1348 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (ControlFrameAddress), "Control Frame Address", 0},
1349 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerInterrupt), "Timer Interrupt", 0},
1350 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerFlags), "Timer Flags (decoded below)", DT_FLAG},
1351 {ACPI_DMT_FLAG0, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0},
1352 {ACPI_DMT_FLAG1, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Polarity", 0},
1353 {ACPI_DMT_FLAG2, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Security", 0},
1354 ACPI_DMT_TERMINATOR
1355 };
1356
1357
1358 /*******************************************************************************
1359 *
1360 * HEST - Hardware Error Source table
1361 *
1362 ******************************************************************************/
1363
1364 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] =
1365 {
1366 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0},
1367 ACPI_DMT_TERMINATOR
1368 };
1369
1370 /* Common HEST structures for subtables */
1371
1372 #define ACPI_DM_HEST_HEADER \
1373 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \
1374 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0}
1375
1376 #define ACPI_DM_HEST_AER \
1377 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \
1378 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \
1379 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \
1380 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Global", 0}, \
1381 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \
1382 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \
1383 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \
1384 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \
1385 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \
1386 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \
1387 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \
1388 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \
1389 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \
1390 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \
1391 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \
1392 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0}
1393
1394
1395 /* HEST Subtables */
1396
1397 /* 0: IA32 Machine Check Exception */
1398
1399 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] =
1400 {
1401 ACPI_DM_HEST_HEADER,
1402 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0},
1403 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1404 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0},
1405 {ACPI_DMT_FLAG2, ACPI_HEST0_FLAG_OFFSET (Flags,0), "GHES Assist", 0},
1406
1407 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0},
1408 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1409 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1410 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0},
1411 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0},
1412 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
1413 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0},
1414 ACPI_DMT_TERMINATOR
1415 };
1416
1417 /* 1: IA32 Corrected Machine Check */
1418
1419 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] =
1420 {
1421 ACPI_DM_HEST_HEADER,
1422 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0},
1423 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1424 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0},
1425 {ACPI_DMT_FLAG2, ACPI_HEST1_FLAG_OFFSET (Flags,0), "GHES Assist", 0},
1426
1427 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0},
1428 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1429 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1430 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0},
1431 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
1432 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0},
1433 ACPI_DMT_TERMINATOR
1434 };
1435
1436 /* 2: IA32 Non-Maskable Interrupt */
1437
1438 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] =
1439 {
1440 ACPI_DM_HEST_HEADER,
1441 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0},
1442 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1443 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1444 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
1445 ACPI_DMT_TERMINATOR
1446 };
1447
1448 /* 6: PCI Express Root Port AER */
1449
1450 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] =
1451 {
1452 ACPI_DM_HEST_HEADER,
1453 ACPI_DM_HEST_AER,
1454 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0},
1455 ACPI_DMT_TERMINATOR
1456 };
1457
1458 /* 7: PCI Express AER (AER Endpoint) */
1459
1460 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] =
1461 {
1462 ACPI_DM_HEST_HEADER,
1463 ACPI_DM_HEST_AER,
1464 ACPI_DMT_TERMINATOR
1465 };
1466
1467 /* 8: PCI Express/PCI-X Bridge AER */
1468
1469 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] =
1470 {
1471 ACPI_DM_HEST_HEADER,
1472 ACPI_DM_HEST_AER,
1473 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0},
1474 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0},
1475 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0},
1476 ACPI_DMT_TERMINATOR
1477 };
1478
1479 /* 9: Generic Hardware Error Source */
1480
1481 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] =
1482 {
1483 ACPI_DM_HEST_HEADER,
1484 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0},
1485 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0},
1486 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0},
1487 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1488 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1489 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
1490 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0},
1491 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0},
1492 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0},
1493 ACPI_DMT_TERMINATOR
1494 };
1495
1496 /* 10: Generic Hardware Error Source - Version 2 */
1497
1498 ACPI_DMTABLE_INFO AcpiDmTableInfoHest10[] =
1499 {
1500 ACPI_DM_HEST_HEADER,
1501 {ACPI_DMT_UINT16, ACPI_HEST10_OFFSET (RelatedSourceId), "Related Source Id", 0},
1502 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Reserved), "Reserved", 0},
1503 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Enabled), "Enabled", 0},
1504 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1505 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1506 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
1507 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ErrorStatusAddress), "Error Status Address", 0},
1508 {ACPI_DMT_HESTNTFY, ACPI_HEST10_OFFSET (Notify), "Notify", 0},
1509 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (ErrorBlockLength), "Error Status Block Length", 0},
1510 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ReadAckRegister), "Read Ack Register", 0},
1511 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckPreserve), "Read Ack Preserve", 0},
1512 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckWrite), "Read Ack Write", 0},
1513 ACPI_DMT_TERMINATOR
1514 };
1515
1516 /* 11: IA32 Deferred Machine Check */
1517
1518 ACPI_DMTABLE_INFO AcpiDmTableInfoHest11[] =
1519 {
1520 ACPI_DM_HEST_HEADER,
1521 {ACPI_DMT_UINT16, ACPI_HEST11_OFFSET (Reserved1), "Reserved1", 0},
1522 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1523 {ACPI_DMT_FLAG0, ACPI_HEST11_FLAG_OFFSET (Flags,0), "Firmware First", 0},
1524 {ACPI_DMT_FLAG2, ACPI_HEST11_FLAG_OFFSET (Flags,0), "GHES Assist", 0},
1525
1526 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Enabled), "Enabled", 0},
1527 {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
1528 {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
1529 {ACPI_DMT_HESTNTFY, ACPI_HEST11_OFFSET (Notify), "Notify", 0},
1530 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
1531 {ACPI_DMT_UINT24, ACPI_HEST11_OFFSET (Reserved2[0]), "Reserved2", 0},
1532 ACPI_DMT_TERMINATOR
1533 };
1534
1535 /* Notification Structure */
1536
1537 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] =
1538 {
1539 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0},
1540 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH},
1541 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0},
1542 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0},
1543 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0},
1544 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0},
1545 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0},
1546 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0},
1547 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0},
1548 ACPI_DMT_TERMINATOR
1549 };
1550
1551
1552 /*
1553 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and
1554 * ACPI_HEST_IA_CORRECTED structures.
1555 */
1556 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] =
1557 {
1558 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0},
1559 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0},
1560 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0},
1561 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0},
1562 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0},
1563 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0},
1564 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0},
1565 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0},
1566 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0},
1567 ACPI_DMT_TERMINATOR
1568 };
1569
1570
1571 /*******************************************************************************
1572 *
1573 * HPET - High Precision Event Timer table
1574 *
1575 ******************************************************************************/
1576
1577 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] =
1578 {
1579 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0},
1580 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0},
1581 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0},
1582 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0},
1583 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1584 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0},
1585 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0},
1586 ACPI_DMT_TERMINATOR
1587 };
1588
1589
1590 /*******************************************************************************
1591 *
1592 * HMAT - Heterogeneous Memory Attributes Table
1593 *
1594 ******************************************************************************/
1595
1596 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat[] =
1597 {
1598 {ACPI_DMT_UINT32, ACPI_HMAT_OFFSET (Reserved), "Reserved", 0},
1599 ACPI_DMT_TERMINATOR
1600 };
1601
1602 /* Common HMAT structure header (one per Subtable) */
1603
1604 ACPI_DMTABLE_INFO AcpiDmTableInfoHmatHdr[] =
1605 {
1606 {ACPI_DMT_HMAT, ACPI_HMATH_OFFSET (Type), "Structure Type", 0},
1607 {ACPI_DMT_UINT16, ACPI_HMATH_OFFSET (Reserved), "Reserved", 0},
1608 {ACPI_DMT_UINT32, ACPI_HMATH_OFFSET (Length), "Length", 0},
1609 ACPI_DMT_TERMINATOR
1610 };
1611
1612 /* HMAT subtables */
1613
1614 /* 0x00: Memory Subsystem Address Range */
1615
1616 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat0[] =
1617 {
1618 {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Flags), "Flags (decoded below)", 0},
1619 {ACPI_DMT_FLAG0, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Processor Proximity Domain Valid", 0},
1620 {ACPI_DMT_FLAG1, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Memory Proximity Domain Valid", 0},
1621 {ACPI_DMT_FLAG2, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Reservation Hint", 0},
1622 {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Reserved1), "Reserved1", 0},
1623 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (ProcessorPD), "Processor Proximity Domain", 0},
1624 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (MemoryPD), "Memory Proximity Domain", 0},
1625 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (Reserved2), "Reserved2", 0},
1626 {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (PhysicalAddressBase), "Physical Address Range Base", 0},
1627 {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (PhysicalAddressLength), "Physical Address Range Size", 0},
1628 ACPI_DMT_TERMINATOR
1629 };
1630
1631 /* 0x01: System Locality Latency and Bandwidth Information */
1632
1633 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1[] =
1634 {
1635 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (Flags), "Flags (decoded below)", 0},
1636 {ACPI_DMT_FLAGS4_0, ACPI_HMAT1_FLAG_OFFSET (Flags,0), "Memory Hierarchy", 0},
1637 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (DataType), "Data Type", 0},
1638 {ACPI_DMT_UINT16, ACPI_HMAT1_OFFSET (Reserved1), "Reserved1", 0},
1639 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfInitiatorPDs), "Initiator Proximity Domains #", 0},
1640 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfTargetPDs), "Target Proximity Domains #", 0},
1641 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (Reserved2), "Reserved2", 0},
1642 {ACPI_DMT_UINT64, ACPI_HMAT1_OFFSET (EntryBaseUnit), "Entry Base Unit", 0},
1643 ACPI_DMT_TERMINATOR
1644 };
1645
1646 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1a[] =
1647 {
1648 {ACPI_DMT_UINT32, 0, "Initiator Proximity Domain List", DT_OPTIONAL},
1649 ACPI_DMT_TERMINATOR
1650 };
1651
1652 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1b[] =
1653 {
1654 {ACPI_DMT_UINT32, 0, "Target Proximity Domain List", DT_OPTIONAL},
1655 ACPI_DMT_TERMINATOR
1656 };
1657
1658 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1c[] =
1659 {
1660 {ACPI_DMT_UINT16, 0, "Entry", DT_OPTIONAL},
1661 ACPI_DMT_TERMINATOR
1662 };
1663
1664 /* 0x02: Memory Side Cache Information */
1665
1666 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2[] =
1667 {
1668 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (MemoryPD), "Memory Proximity Domain", 0},
1669 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (Reserved1), "Reserved1", 0},
1670 {ACPI_DMT_UINT64, ACPI_HMAT2_OFFSET (CacheSize), "Memory Side Cache Size", 0},
1671 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (CacheAttributes), "Cache Attributes (decoded below)", 0},
1672 {ACPI_DMT_FLAGS4_0, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Total Cache Levels", 0},
1673 {ACPI_DMT_FLAGS4_4, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Level", 0},
1674 {ACPI_DMT_FLAGS4_8, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Associativity", 0},
1675 {ACPI_DMT_FLAGS4_12, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Write Policy", 0},
1676 {ACPI_DMT_FLAGS16_16, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Line Size", 0},
1677 {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (Reserved2), "Reserved2", 0},
1678 {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (NumberOfSMBIOSHandles), "SMBIOS Handle #", 0},
1679 ACPI_DMT_TERMINATOR
1680 };
1681
1682 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2a[] =
1683 {
1684 {ACPI_DMT_UINT16, 0, "SMBIOS Handle", DT_OPTIONAL},
1685 ACPI_DMT_TERMINATOR
1686 };
1687
1688
1689 /*******************************************************************************
1690 *
1691 * IORT - IO Remapping Table
1692 *
1693 ******************************************************************************/
1694
1695 ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] =
1696 {
1697 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0},
1698 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0},
1699 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0},
1700 ACPI_DMT_TERMINATOR
1701 };
1702
1703 /* Optional padding field */
1704
1705 ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] =
1706 {
1707 {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL},
1708 ACPI_DMT_TERMINATOR
1709 };
1710
1711 /* Common Subtable header (one per Subtable) */
1712
1713 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] =
1714 {
1715 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0},
1716 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH},
1717 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0},
1718 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Reserved), "Reserved", 0},
1719 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0},
1720 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0},
1721 ACPI_DMT_TERMINATOR
1722 };
1723
1724 ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] =
1725 {
1726 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL},
1727 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0},
1728 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0},
1729 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0},
1730 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0},
1731 {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0},
1732 ACPI_DMT_TERMINATOR
1733 };
1734
1735 ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] =
1736 {
1737 {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0},
1738 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0},
1739 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0},
1740 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0},
1741 {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0},
1742 {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0},
1743 {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0},
1744 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0},
1745 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0},
1746 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0},
1747 ACPI_DMT_TERMINATOR
1748 };
1749
1750 /* IORT subtables */
1751
1752 /* 0x00: ITS Group */
1753
1754 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] =
1755 {
1756 {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0},
1757 ACPI_DMT_TERMINATOR
1758 };
1759
1760 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] =
1761 {
1762 {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL},
1763 ACPI_DMT_TERMINATOR
1764 };
1765
1766 /* 0x01: Named Component */
1767
1768 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] =
1769 {
1770 {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0},
1771 {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0},
1772 {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0},
1773 {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0},
1774 ACPI_DMT_TERMINATOR
1775 };
1776
1777 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] =
1778 {
1779 {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL},
1780 ACPI_DMT_TERMINATOR
1781 };
1782
1783 /* 0x02: PCI Root Complex */
1784
1785 ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] =
1786 {
1787 {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0},
1788 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0},
1789 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0},
1790 ACPI_DMT_TERMINATOR
1791 };
1792
1793 /* 0x03: SMMUv1/2 */
1794
1795 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] =
1796 {
1797 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0},
1798 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0},
1799 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0},
1800 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0},
1801 {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0},
1802 {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0},
1803 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0},
1804 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0},
1805 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0},
1806 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0},
1807 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0},
1808 ACPI_DMT_TERMINATOR
1809 };
1810
1811 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] =
1812 {
1813 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrpt), "NSgIrpt", 0},
1814 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrptFlags), "NSgIrpt Flags (decoded below)", 0},
1815 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgIrptFlags, 0), "Edge Triggered", 0},
1816 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrpt), "NSgCfgIrpt", 0},
1817 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrptFlags), "NSgCfgIrpt Flags (decoded below)", 0},
1818 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgCfgIrptFlags, 0), "Edge Triggered", 0},
1819 ACPI_DMT_TERMINATOR
1820 };
1821
1822 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] =
1823 {
1824 {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL},
1825 ACPI_DMT_TERMINATOR
1826 };
1827
1828 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] =
1829 {
1830 {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL},
1831 ACPI_DMT_TERMINATOR
1832 };
1833
1834 /* 0x04: SMMUv3 */
1835
1836 ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] =
1837 {
1838 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0},
1839 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0},
1840 {ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0},
1841 {ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0},
1842 {ACPI_DMT_FLAG3, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "Proximity Domain Valid", 0},
1843 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0},
1844 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0},
1845 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0},
1846 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0},
1847 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0},
1848 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0},
1849 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0},
1850 {ACPI_DMT_UINT8, ACPI_IORT4_OFFSET (Pxm), "Proximity Domain", 0},
1851 {ACPI_DMT_UINT8, ACPI_IORT4_OFFSET (Reserved1), "Reserved", 0},
1852 {ACPI_DMT_UINT16, ACPI_IORT4_OFFSET (Reserved2), "Reserved", 0},
1853 ACPI_DMT_TERMINATOR
1854 };
1855
1856 /*******************************************************************************
1857 *
1858 * IVRS - I/O Virtualization Reporting Structure
1859 *
1860 ******************************************************************************/
1861
1862 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] =
1863 {
1864 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0},
1865 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0},
1866 ACPI_DMT_TERMINATOR
1867 };
1868
1869 /* Common Subtable header (one per Subtable) */
1870
1871 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] =
1872 {
1873 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},
1874 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0},
1875 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH},
1876 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0},
1877 ACPI_DMT_TERMINATOR
1878 };
1879
1880 /* IVRS subtables */
1881
1882 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */
1883
1884 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] =
1885 {
1886 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0},
1887 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0},
1888 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0},
1889 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0},
1890 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0},
1891 ACPI_DMT_TERMINATOR
1892 };
1893
1894 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */
1895
1896 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] =
1897 {
1898 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0},
1899 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0},
1900 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0},
1901 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0},
1902 ACPI_DMT_TERMINATOR
1903 };
1904
1905 /* Device entry header for IVHD block */
1906
1907 #define ACPI_DMT_IVRS_DE_HEADER \
1908 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \
1909 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \
1910 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0}
1911
1912 /* 4-byte device entry */
1913
1914 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] =
1915 {
1916 ACPI_DMT_IVRS_DE_HEADER,
1917 {ACPI_DMT_EXIT, 0, NULL, 0},
1918 };
1919
1920 /* 8-byte device entry */
1921
1922 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] =
1923 {
1924 ACPI_DMT_IVRS_DE_HEADER,
1925 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0},
1926 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0},
1927 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0},
1928 ACPI_DMT_TERMINATOR
1929 };
1930
1931 /* 8-byte device entry */
1932
1933 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] =
1934 {
1935 ACPI_DMT_IVRS_DE_HEADER,
1936 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0},
1937 ACPI_DMT_TERMINATOR
1938 };
1939
1940 /* 8-byte device entry */
1941
1942 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] =
1943 {
1944 ACPI_DMT_IVRS_DE_HEADER,
1945 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0},
1946 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0},
1947 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0},
1948 ACPI_DMT_TERMINATOR
1949 };
1950
1951
1952 /*******************************************************************************
1953 *
1954 * LPIT - Low Power Idle Table
1955 *
1956 ******************************************************************************/
1957
1958 /* Main table consists only of the standard ACPI table header */
1959
1960 /* Common Subtable header (one per Subtable) */
1961
1962 ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] =
1963 {
1964 {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0},
1965 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH},
1966 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0},
1967 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0},
1968 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1969 {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0},
1970 {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0},
1971 ACPI_DMT_TERMINATOR
1972 };
1973
1974 /* LPIT Subtables */
1975
1976 /* 0: Native C-state */
1977
1978 ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] =
1979 {
1980 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0},
1981 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0},
1982 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0},
1983 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0},
1984 {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0},
1985 ACPI_DMT_TERMINATOR
1986 };
1987
1988
1989 /*******************************************************************************
1990 *
1991 * MADT - Multiple APIC Description Table and subtables
1992 *
1993 ******************************************************************************/
1994
1995 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] =
1996 {
1997 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0},
1998 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1999 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0},
2000 ACPI_DMT_TERMINATOR
2001 };
2002
2003 /* Common Subtable header (one per Subtable) */
2004
2005 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] =
2006 {
2007 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0},
2008 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH},
2009 ACPI_DMT_TERMINATOR
2010 };
2011
2012 /* MADT Subtables */
2013
2014 /* 0: processor APIC */
2015
2016 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] =
2017 {
2018 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0},
2019 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0},
2020 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
2021 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
2022 ACPI_DMT_TERMINATOR
2023 };
2024
2025 /* 1: IO APIC */
2026
2027 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] =
2028 {
2029 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0},
2030 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0},
2031 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0},
2032 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0},
2033 ACPI_DMT_TERMINATOR
2034 };
2035
2036 /* 2: Interrupt Override */
2037
2038 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] =
2039 {
2040 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0},
2041 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0},
2042 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0},
2043 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
2044 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
2045 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
2046 ACPI_DMT_TERMINATOR
2047 };
2048
2049 /* 3: NMI Sources */
2050
2051 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] =
2052 {
2053 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
2054 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
2055 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
2056 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0},
2057 ACPI_DMT_TERMINATOR
2058 };
2059
2060 /* 4: Local APIC NMI */
2061
2062 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] =
2063 {
2064 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0},
2065 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
2066 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
2067 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
2068 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0},
2069 ACPI_DMT_TERMINATOR
2070 };
2071
2072 /* 5: Address Override */
2073
2074 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] =
2075 {
2076 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0},
2077 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0},
2078 ACPI_DMT_TERMINATOR
2079 };
2080
2081 /* 6: I/O Sapic */
2082
2083 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] =
2084 {
2085 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0},
2086 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0},
2087 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0},
2088 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0},
2089 ACPI_DMT_TERMINATOR
2090 };
2091
2092 /* 7: Local Sapic */
2093
2094 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] =
2095 {
2096 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0},
2097 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0},
2098 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0},
2099 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0},
2100 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
2101 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
2102 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0},
2103 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0},
2104 ACPI_DMT_TERMINATOR
2105 };
2106
2107 /* 8: Platform Interrupt Source */
2108
2109 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] =
2110 {
2111 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
2112 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
2113 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
2114 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0},
2115 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0},
2116 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0},
2117 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0},
2118 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0},
2119 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2120 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0},
2121 ACPI_DMT_TERMINATOR
2122 };
2123
2124 /* 9: Processor Local X2_APIC (ACPI 4.0) */
2125
2126 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] =
2127 {
2128 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0},
2129 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0},
2130 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
2131 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
2132 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0},
2133 ACPI_DMT_TERMINATOR
2134 };
2135
2136 /* 10: Local X2_APIC NMI (ACPI 4.0) */
2137
2138 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] =
2139 {
2140 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
2141 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
2142 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
2143 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0},
2144 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0},
2145 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0},
2146 ACPI_DMT_TERMINATOR
2147 };
2148
2149 /* 11: Generic Interrupt Controller (ACPI 5.0) */
2150
2151 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] =
2152 {
2153 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0},
2154 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0},
2155 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0},
2156 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2157 {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0},
2158 {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0},
2159 {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0},
2160 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0},
2161 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0},
2162 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0},
2163 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0},
2164 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0},
2165 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0},
2166 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0},
2167 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0},
2168 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0},
2169 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0},
2170 {ACPI_DMT_UINT24, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0},
2171 ACPI_DMT_TERMINATOR
2172 };
2173
2174 /* 12: Generic Interrupt Distributor (ACPI 5.0) */
2175
2176 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] =
2177 {
2178 {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0},
2179 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0},
2180 {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0},
2181 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0},
2182 {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0},
2183 {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0},
2184 ACPI_DMT_TERMINATOR
2185 };
2186
2187 /* 13: Generic MSI Frame (ACPI 5.1) */
2188
2189 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] =
2190 {
2191 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0},
2192 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0},
2193 {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0},
2194 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2195 {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0},
2196 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0},
2197 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0},
2198 ACPI_DMT_TERMINATOR
2199 };
2200
2201 /* 14: Generic Redistributor (ACPI 5.1) */
2202
2203 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] =
2204 {
2205 {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0},
2206 {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0},
2207 {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0},
2208 ACPI_DMT_TERMINATOR
2209 };
2210
2211 /* 15: Generic Translator (ACPI 6.0) */
2212
2213 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] =
2214 {
2215 {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0},
2216 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0},
2217 {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0},
2218 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0},
2219 ACPI_DMT_TERMINATOR
2220 };
2221
2222 /*******************************************************************************
2223 *
2224 * MCFG - PCI Memory Mapped Configuration table and Subtable
2225 *
2226 ******************************************************************************/
2227
2228 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] =
2229 {
2230 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0},
2231 ACPI_DMT_TERMINATOR
2232 };
2233
2234 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] =
2235 {
2236 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0},
2237 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0},
2238 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0},
2239 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0},
2240 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0},
2241 ACPI_DMT_TERMINATOR
2242 };
2243
2244
2245 /*******************************************************************************
2246 *
2247 * MCHI - Management Controller Host Interface table
2248 *
2249 ******************************************************************************/
2250
2251 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] =
2252 {
2253 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0},
2254 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0},
2255 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0},
2256 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0},
2257 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0},
2258 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0},
2259 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0},
2260 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0},
2261 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0},
2262 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0},
2263 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0},
2264 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0},
2265 ACPI_DMT_TERMINATOR
2266 };
2267
2268
2269 /*******************************************************************************
2270 *
2271 * MPST - Memory Power State Table
2272 *
2273 ******************************************************************************/
2274
2275 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] =
2276 {
2277 {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0},
2278 {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0},
2279 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0},
2280 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0},
2281 ACPI_DMT_TERMINATOR
2282 };
2283
2284 /* MPST subtables */
2285
2286 /* 0: Memory Power Node Structure */
2287
2288 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] =
2289 {
2290 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2291 {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0},
2292 {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0},
2293 {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0},
2294
2295 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0},
2296 {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0},
2297 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0},
2298 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0},
2299 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0},
2300 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0},
2301 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0},
2302 ACPI_DMT_TERMINATOR
2303 };
2304
2305 /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */
2306
2307 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] =
2308 {
2309 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0},
2310 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0},
2311 ACPI_DMT_TERMINATOR
2312 };
2313
2314 /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */
2315
2316 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] =
2317 {
2318 {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0},
2319 ACPI_DMT_TERMINATOR
2320 };
2321
2322 /* 01: Power Characteristics Count (follows all Power Node(s) above) */
2323
2324 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] =
2325 {
2326 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0},
2327 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0},
2328 ACPI_DMT_TERMINATOR
2329 };
2330
2331 /* 02: Memory Power State Characteristics Structure */
2332
2333 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] =
2334 {
2335 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0},
2336 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2337 {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0},
2338 {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0},
2339 {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0},
2340
2341 {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0},
2342 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0},
2343 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0},
2344 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0},
2345 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0},
2346 ACPI_DMT_TERMINATOR
2347 };
2348
2349
2350 /*******************************************************************************
2351 *
2352 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
2353 *
2354 ******************************************************************************/
2355
2356 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] =
2357 {
2358 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0},
2359 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0},
2360 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0},
2361 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0},
2362 ACPI_DMT_TERMINATOR
2363 };
2364
2365 /* Subtable - Maximum Proximity Domain Information. Version 1 */
2366
2367 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] =
2368 {
2369 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0},
2370 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH},
2371 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0},
2372 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0},
2373 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0},
2374 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0},
2375 ACPI_DMT_TERMINATOR
2376 };
2377
2378
2379 /*******************************************************************************
2380 *
2381 * MTMR - MID Timer Table
2382 *
2383 ******************************************************************************/
2384
2385 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[] =
2386 {
2387 ACPI_DMT_TERMINATOR
2388 };
2389
2390 /* MTMR Subtables - MTMR Entry */
2391
2392 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] =
2393 {
2394 {ACPI_DMT_GAS, ACPI_MTMR0_OFFSET (PhysicalAddress), "PhysicalAddress", 0},
2395 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Frequency), "Frequency", 0},
2396 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Irq), "IRQ", 0},
2397 ACPI_DMT_TERMINATOR
2398 };
2399
2400
2401 /*******************************************************************************
2402 *
2403 * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0)
2404 *
2405 ******************************************************************************/
2406
2407 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] =
2408 {
2409 {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0},
2410 ACPI_DMT_TERMINATOR
2411 };
2412
2413 /* Common Subtable header */
2414
2415 ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] =
2416 {
2417 {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0},
2418 {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH},
2419 ACPI_DMT_TERMINATOR
2420 };
2421
2422 /* 0: System Physical Address Range Structure */
2423
2424 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] =
2425 {
2426 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0},
2427 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2428 {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0},
2429 {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0},
2430 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0},
2431 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0},
2432 {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Address Range GUID", 0},
2433 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0},
2434 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0},
2435 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0},
2436 ACPI_DMT_TERMINATOR
2437 };
2438
2439 /* 1: Memory Device to System Address Range Map Structure */
2440
2441 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] =
2442 {
2443 {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0},
2444 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0},
2445 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0},
2446 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0},
2447 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0},
2448 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0},
2449 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0},
2450 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0},
2451 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0},
2452 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0},
2453 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG},
2454 {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0},
2455 {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0},
2456 {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0},
2457 {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0},
2458 {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0},
2459 {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0},
2460 {ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0},
2461 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0},
2462 ACPI_DMT_TERMINATOR
2463 };
2464
2465 /* 2: Interleave Structure */
2466
2467 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] =
2468 {
2469 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0},
2470 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0},
2471 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0},
2472 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0},
2473 ACPI_DMT_TERMINATOR
2474 };
2475
2476 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] =
2477 {
2478 {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL},
2479 ACPI_DMT_TERMINATOR
2480 };
2481
2482 /* 3: SMBIOS Management Information Structure */
2483
2484 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] =
2485 {
2486 {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0},
2487 ACPI_DMT_TERMINATOR
2488 };
2489
2490 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] =
2491 {
2492 {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL},
2493 ACPI_DMT_TERMINATOR
2494 };
2495
2496 /* 4: NVDIMM Control Region Structure */
2497
2498 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] =
2499 {
2500 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0},
2501 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0},
2502 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0},
2503 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0},
2504 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0},
2505 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0},
2506 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0},
2507 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0},
2508 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0},
2509 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0},
2510 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0},
2511 {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0},
2512 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0},
2513 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0},
2514 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0},
2515 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0},
2516 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0},
2517 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0},
2518 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0},
2519 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG},
2520 {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0},
2521 {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0},
2522 ACPI_DMT_TERMINATOR
2523 };
2524
2525 /* 5: NVDIMM Block Data Window Region Structure */
2526
2527 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] =
2528 {
2529 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0},
2530 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0},
2531 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0},
2532 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0},
2533 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0},
2534 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0},
2535 ACPI_DMT_TERMINATOR
2536 };
2537
2538 /* 6: Flush Hint Address Structure */
2539
2540 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] =
2541 {
2542 {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0},
2543 {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0},
2544 {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0},
2545 ACPI_DMT_TERMINATOR
2546 };
2547
2548 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] =
2549 {
2550 {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL},
2551 ACPI_DMT_TERMINATOR
2552 };
2553
2554
2555 /*******************************************************************************
2556 *
2557 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2558 *
2559 ******************************************************************************/
2560
2561 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] =
2562 {
2563 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2564 {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Platform", 0},
2565 {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0},
2566 ACPI_DMT_TERMINATOR
2567 };
2568
2569 /* PCCT subtables */
2570
2571 ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] =
2572 {
2573 {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0},
2574 {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH},
2575 ACPI_DMT_TERMINATOR
2576 };
2577
2578 /* 0: Generic Communications Subspace */
2579
2580 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] =
2581 {
2582 {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0},
2583 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0},
2584 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0},
2585 {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0},
2586 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0},
2587 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0},
2588 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0},
2589 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},
2590 {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},
2591 ACPI_DMT_TERMINATOR
2592 };
2593
2594 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2595
2596 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] =
2597 {
2598 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},
2599 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},
2600 {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0},
2601 {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0},
2602 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0},
2603 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0},
2604 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0},
2605 {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0},
2606 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0},
2607 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0},
2608 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0},
2609 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},
2610 {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},
2611 ACPI_DMT_TERMINATOR
2612 };
2613
2614 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2615
2616 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] =
2617 {
2618 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},
2619 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},
2620 {ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0},
2621 {ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0},
2622 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0},
2623 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0},
2624 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0},
2625 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0},
2626 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0},
2627 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0},
2628 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0},
2629 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},
2630 {ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},
2631 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},
2632 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},
2633 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0},
2634 ACPI_DMT_TERMINATOR
2635 };
2636
2637 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2638
2639 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct3[] =
2640 {
2641 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},
2642 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},
2643 {ACPI_DMT_FLAG0, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Polarity", 0},
2644 {ACPI_DMT_FLAG1, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Mode", 0},
2645 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Reserved1), "Reserved", 0},
2646 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (BaseAddress), "Base Address", 0},
2647 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Length), "Address Length", 0},
2648 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (DoorbellRegister), "Doorbell Register", 0},
2649 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (PreserveMask), "Preserve Mask", 0},
2650 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (WriteMask), "Write Mask", 0},
2651 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Command Latency", 0},
2652 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},
2653 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},
2654 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},
2655 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},
2656 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckSetMask), "ACK Set Mask", 0},
2657 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (Reserved2), "Reserved", 0},
2658 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdCompleteRegister), "Command Complete Register", 0},
2659 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0},
2660 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdUpdateRegister), "Command Update Register", 0},
2661 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0},
2662 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0},
2663 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (ErrorStatusRegister), "Error Status Register", 0},
2664 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (ErrorStatusMask), "Error Status Mask", 0},
2665 ACPI_DMT_TERMINATOR
2666 };
2667
2668 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2669
2670 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct4[] =
2671 {
2672 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},
2673 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},
2674 {ACPI_DMT_FLAG0, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Polarity", 0},
2675 {ACPI_DMT_FLAG1, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Mode", 0},
2676 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Reserved1), "Reserved", 0},
2677 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (BaseAddress), "Base Address", 0},
2678 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Length), "Address Length", 0},
2679 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (DoorbellRegister), "Doorbell Register", 0},
2680 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (PreserveMask), "Preserve Mask", 0},
2681 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (WriteMask), "Write Mask", 0},
2682 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Latency), "Command Latency", 0},
2683 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},
2684 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},
2685 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},
2686 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},
2687 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckSetMask), "ACK Set Mask", 0},
2688 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (Reserved2), "Reserved", 0},
2689 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdCompleteRegister), "Command Complete Register", 0},
2690 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0},
2691 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdUpdateRegister), "Command Update Register", 0},
2692 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0},
2693 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0},
2694 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (ErrorStatusRegister), "Error Status Register", 0},
2695 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (ErrorStatusMask), "Error Status Mask", 0},
2696 ACPI_DMT_TERMINATOR
2697 };
2698
2699 /*******************************************************************************
2700 *
2701 * PMTT - Platform Memory Topology Table
2702 *
2703 ******************************************************************************/
2704
2705 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] =
2706 {
2707 {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (Reserved), "Reserved", 0},
2708 ACPI_DMT_TERMINATOR
2709 };
2710
2711 /* Common Subtable header (one per Subtable) */
2712
2713 ACPI_DMTABLE_INFO AcpiDmTableInfoPmttHdr[] =
2714 {
2715 {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0},
2716 {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0},
2717 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH},
2718 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
2719 {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0},
2720 {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0},
2721 {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0},
2722 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0},
2723 ACPI_DMT_TERMINATOR
2724 };
2725
2726 /* PMTT Subtables */
2727
2728 /* 0: Socket */
2729
2730 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] =
2731 {
2732 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0},
2733 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0},
2734 ACPI_DMT_TERMINATOR
2735 };
2736
2737 /* 1: Memory Controller */
2738
2739 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] =
2740 {
2741 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0},
2742 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0},
2743 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadBandwidth), "Read Bandwidth", 0},
2744 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteBandwidth), "Write Bandwidth", 0},
2745 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (AccessWidth), "Access Width", 0},
2746 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Alignment), "Alignment", 0},
2747 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0},
2748 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (DomainCount), "Domain Count", 0},
2749 ACPI_DMT_TERMINATOR
2750 };
2751
2752 /* 1a: Proximity Domain */
2753
2754 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1a[] =
2755 {
2756 {ACPI_DMT_UINT32, ACPI_PMTT1A_OFFSET (ProximityDomain), "Proximity Domain", 0},
2757 ACPI_DMT_TERMINATOR
2758 };
2759
2760 /* 2: Physical Component */
2761
2762 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] =
2763 {
2764 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (ComponentId), "Component ID", 0},
2765 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (Reserved), "Reserved", 0},
2766 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (MemorySize), "Memory Size", 0},
2767 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0},
2768 ACPI_DMT_TERMINATOR
2769 };
2770
2771 /*******************************************************************************
2772 *
2773 * SDEI - Software Delegated Execption Interface Descriptor Table
2774 *
2775 ******************************************************************************/
2776
2777 ACPI_DMTABLE_INFO AcpiDmTableInfoSdei[] =
2778 {
2779 ACPI_DMT_TERMINATOR
2780 };
2781
2782 /*******************************************************************************
2783 *
2784 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2785 *
2786 ******************************************************************************/
2787
2788 /* Main table consists of only the standard ACPI header - subtables follow */
2789
2790 /* Common Subtable header (one per Subtable) */
2791
2792 ACPI_DMTABLE_INFO AcpiDmTableInfoPpttHdr[] =
2793 {
2794 {ACPI_DMT_PPTT, ACPI_PPTTH_OFFSET (Type), "Subtable Type", 0},
2795 {ACPI_DMT_UINT8, ACPI_PPTTH_OFFSET (Length), "Length", 0},
2796 ACPI_DMT_TERMINATOR
2797 };
2798
2799 /* 0: Processor hierarchy node */
2800
2801 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0[] =
2802 {
2803 {ACPI_DMT_UINT16, ACPI_PPTT0_OFFSET (Reserved), "Reserved", 0},
2804 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Flags), "Flags", 0},
2805 {ACPI_DMT_FLAG0, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Physical package", 0},
2806 {ACPI_DMT_FLAG1, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "ACPI Processor ID valid", 0},
2807 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Parent), "Parent", 0},
2808 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (AcpiProcessorId), "ACPI Processor ID", 0},
2809 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (NumberOfPrivResources), "Private Resource Number", 0},
2810 ACPI_DMT_TERMINATOR
2811 };
2812
2813 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0a[] =
2814 {
2815 {ACPI_DMT_UINT32, 0, "Private Resource", DT_OPTIONAL},
2816 ACPI_DMT_TERMINATOR
2817 };
2818
2819 /* 1: Cache type */
2820
2821 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1[] =
2822 {
2823 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (Reserved), "Reserved", 0},
2824 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Flags), "Flags", 0},
2825 {ACPI_DMT_FLAG0, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Size valid", 0},
2826 {ACPI_DMT_FLAG1, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0},
2827 {ACPI_DMT_FLAG2, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Associativity valid", 0},
2828 {ACPI_DMT_FLAG3, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0},
2829 {ACPI_DMT_FLAG4, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache Type valid", 0},
2830 {ACPI_DMT_FLAG5, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Write Policy valid", 0},
2831 {ACPI_DMT_FLAG6, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Line Size valid", 0},
2832 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NextLevelOfCache), "Next Level of Cache", 0},
2833 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Size), "Size", 0},
2834 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NumberOfSets), "Number of Sets", 0},
2835 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Associativity), "Associativity", 0},
2836 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Attributes), "Attributes", 0},
2837 {ACPI_DMT_FLAGS0, ACPI_PPTT1_OFFSET (Attributes), "Allocation Type", 0},
2838 {ACPI_DMT_FLAGS2, ACPI_PPTT1_OFFSET (Attributes), "Cache Type", 0},
2839 {ACPI_DMT_FLAG4, ACPI_PPTT1_OFFSET (Attributes), "Write Policy", 0},
2840 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (LineSize), "Line Size", 0},
2841 ACPI_DMT_TERMINATOR
2842 };
2843
2844 /* 2: ID */
2845
2846 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt2[] =
2847 {
2848 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (Reserved), "Reserved", 0},
2849 {ACPI_DMT_UINT32, ACPI_PPTT2_OFFSET (VendorId), "VENDOR_ID", 0},
2850 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level1Id), "LEVEL_1_ID", 0},
2851 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level2Id), "LEVEL_2_ID", 0},
2852 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MajorRev), "MAJOR_REV", 0},
2853 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MinorRev), "MINOR_REV", 0},
2854 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (SpinRev), "SPIN_REV", 0},
2855 ACPI_DMT_TERMINATOR
2856 };
2857
2858 /*******************************************************************************
2859 *
2860 * RASF - RAS Feature table
2861 *
2862 ******************************************************************************/
2863
2864 ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] =
2865 {
2866 {ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0},
2867 ACPI_DMT_TERMINATOR
2868 };
2869
2870 /*******************************************************************************
2871 *
2872 * S3PT - S3 Performance Table
2873 *
2874 ******************************************************************************/
2875
2876 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] =
2877 {
2878 {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0},
2879 {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH},
2880 ACPI_DMT_TERMINATOR
2881 };
2882
2883 /* S3PT subtable header */
2884
2885 ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] =
2886 {
2887 {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0},
2888 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH},
2889 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0},
2890 ACPI_DMT_TERMINATOR
2891 };
2892
2893 /* 0: Basic S3 Resume Performance Record */
2894
2895 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] =
2896 {
2897 {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0},
2898 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0},
2899 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0},
2900 ACPI_DMT_TERMINATOR
2901 };
2902
2903 /* 1: Basic S3 Suspend Performance Record */
2904
2905 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] =
2906 {
2907 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0},
2908 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0},
2909 ACPI_DMT_TERMINATOR
2910 };
2911
2912
2913 /*******************************************************************************
2914 *
2915 * SBST - Smart Battery Specification Table
2916 *
2917 ******************************************************************************/
2918
2919 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] =
2920 {
2921 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0},
2922 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0},
2923 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0},
2924 ACPI_DMT_TERMINATOR
2925 };
2926
2927
2928 /*******************************************************************************
2929 *
2930 * SLIC - Software Licensing Description Table. This table contains the standard
2931 * ACPI header followed by proprietary data structures
2932 *
2933 ******************************************************************************/
2934
2935 /* Single subtable, a proprietary format, so treat it as a buffer */
2936
2937 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] =
2938 {
2939 {ACPI_DMT_RAW_BUFFER, 0, "Software Licensing Structure", 0},
2940 ACPI_DMT_TERMINATOR
2941 };
2942
2943
2944 /*******************************************************************************
2945 *
2946 * SLIT - System Locality Information Table
2947 *
2948 ******************************************************************************/
2949
2950 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] =
2951 {
2952 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0},
2953 ACPI_DMT_TERMINATOR
2954 };
2955
2956
2957 /*******************************************************************************
2958 *
2959 * SPCR - Serial Port Console Redirection table
2960 *
2961 ******************************************************************************/
2962
2963 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] =
2964 {
2965 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0},
2966 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0},
2967 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0},
2968 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0},
2969 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0},
2970 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0},
2971 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0},
2972 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0},
2973 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0},
2974 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0},
2975 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0},
2976 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
2977 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0},
2978 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0},
2979 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0},
2980 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0},
2981 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0},
2982 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0},
2983 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0},
2984 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
2985 ACPI_DMT_TERMINATOR
2986 };
2987
2988
2989 /*******************************************************************************
2990 *
2991 * SPMI - Server Platform Management Interface table
2992 *
2993 ******************************************************************************/
2994
2995 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] =
2996 {
2997 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0},
2998 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", DT_NON_ZERO}, /* Value must be 1 */
2999 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0},
3000 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0},
3001 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0},
3002 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0},
3003 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0},
3004 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0},
3005 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0},
3006 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0},
3007 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0},
3008 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0},
3009 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0},
3010 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0},
3011 ACPI_DMT_TERMINATOR
3012 };
3013
3014
3015 /*******************************************************************************
3016 *
3017 * SRAT - System Resource Affinity Table and Subtables
3018 *
3019 ******************************************************************************/
3020
3021 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] =
3022 {
3023 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0},
3024 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0},
3025 ACPI_DMT_TERMINATOR
3026 };
3027
3028 /* Common Subtable header (one per Subtable) */
3029
3030 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] =
3031 {
3032 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0},
3033 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH},
3034 ACPI_DMT_TERMINATOR
3035 };
3036
3037 /* SRAT Subtables */
3038
3039 /* 0: Processor Local APIC/SAPIC Affinity */
3040
3041 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] =
3042 {
3043 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0},
3044 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0},
3045 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3046 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0},
3047 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0},
3048 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0},
3049 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0},
3050 ACPI_DMT_TERMINATOR
3051 };
3052
3053 /* 1: Memory Affinity */
3054
3055 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] =
3056 {
3057 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0},
3058 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0},
3059 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0},
3060 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0},
3061 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0},
3062 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3063 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0},
3064 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0},
3065 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0},
3066 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0},
3067 ACPI_DMT_TERMINATOR
3068 };
3069
3070 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */
3071
3072 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] =
3073 {
3074 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0},
3075 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0},
3076 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0},
3077 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3078 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0},
3079 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0},
3080 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0},
3081 ACPI_DMT_TERMINATOR
3082 };
3083
3084 /* 3: GICC Affinity (ACPI 5.1) */
3085
3086 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat3[] =
3087 {
3088 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ProximityDomain), "Proximity Domain", 0},
3089 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (AcpiProcessorUid), "Acpi Processor UID", 0},
3090 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3091 {ACPI_DMT_FLAG0, ACPI_SRAT3_FLAG_OFFSET (Flags,0), "Enabled", 0},
3092 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ClockDomain), "Clock Domain", 0},
3093 ACPI_DMT_TERMINATOR
3094 };
3095
3096 /* 4: GCC ITS Affinity (ACPI 6.2) */
3097
3098 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat4[] =
3099 {
3100 {ACPI_DMT_UINT32, ACPI_SRAT4_OFFSET (ProximityDomain), "Proximity Domain", 0},
3101 {ACPI_DMT_UINT16, ACPI_SRAT4_OFFSET (Reserved), "Reserved", 0},
3102 {ACPI_DMT_UINT32, ACPI_SRAT4_OFFSET (ItsId), "ITS ID", 0},
3103 ACPI_DMT_TERMINATOR
3104 };
3105
3106
3107 /*******************************************************************************
3108 *
3109 * STAO - Status Override Table (_STA override) - ACPI 6.0
3110 *
3111 ******************************************************************************/
3112
3113 ACPI_DMTABLE_INFO AcpiDmTableInfoStao[] =
3114 {
3115 {ACPI_DMT_UINT8, ACPI_STAO_OFFSET (IgnoreUart), "Ignore UART", 0},
3116 ACPI_DMT_TERMINATOR
3117 };
3118
3119 ACPI_DMTABLE_INFO AcpiDmTableInfoStaoStr[] =
3120 {
3121 {ACPI_DMT_STRING, 0, "Namepath", 0},
3122 ACPI_DMT_TERMINATOR
3123 };
3124
3125
3126 /*******************************************************************************
3127 *
3128 * TCPA - Trusted Computing Platform Alliance table (Client)
3129 *
3130 * NOTE: There are two versions of the table with the same signature --
3131 * the client version and the server version. The common PlatformClass
3132 * field is used to differentiate the two types of tables.
3133 *
3134 ******************************************************************************/
3135
3136 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaHdr[] =
3137 {
3138 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (PlatformClass), "Platform Class", 0},
3139 ACPI_DMT_TERMINATOR
3140 };
3141
3142 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaClient[] =
3143 {
3144 {ACPI_DMT_UINT32, ACPI_TCPA_CLIENT_OFFSET (MinimumLogLength), "Min Event Log Length", 0},
3145 {ACPI_DMT_UINT64, ACPI_TCPA_CLIENT_OFFSET (LogAddress), "Event Log Address", 0},
3146 ACPI_DMT_TERMINATOR
3147 };
3148
3149 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaServer[] =
3150 {
3151 {ACPI_DMT_UINT16, ACPI_TCPA_SERVER_OFFSET (Reserved), "Reserved", 0},
3152 {ACPI_DMT_UINT64, ACPI_TCPA_SERVER_OFFSET (MinimumLogLength), "Min Event Log Length", 0},
3153 {ACPI_DMT_UINT64, ACPI_TCPA_SERVER_OFFSET (LogAddress), "Event Log Address", 0},
3154 {ACPI_DMT_UINT16, ACPI_TCPA_SERVER_OFFSET (SpecRevision), "Specification Revision", 0},
3155 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Device Flags (decoded below)", DT_FLAG},
3156 {ACPI_DMT_FLAG0, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Pci Device", 0},
3157 {ACPI_DMT_FLAG1, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Bus is Pnp", 0},
3158 {ACPI_DMT_FLAG2, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Address Valid", 0},
3159 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Interrupt Flags (decoded below)", DT_FLAG},
3160 {ACPI_DMT_FLAG0, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Mode", 0},
3161 {ACPI_DMT_FLAG1, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Polarity", 0},
3162 {ACPI_DMT_FLAG2, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "GPE SCI Triggered", 0},
3163 {ACPI_DMT_FLAG3, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Global System Interrupt", 0},
3164 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (GpeNumber), "Gpe Number", 0},
3165 {ACPI_DMT_UINT24, ACPI_TCPA_SERVER_OFFSET (Reserved2[0]), "Reserved", 0},
3166 {ACPI_DMT_UINT32, ACPI_TCPA_SERVER_OFFSET (GlobalInterrupt), "Global Interrupt", 0},
3167 {ACPI_DMT_GAS, ACPI_TCPA_SERVER_OFFSET (Address), "Address", 0},
3168 {ACPI_DMT_UINT32, ACPI_TCPA_SERVER_OFFSET (Reserved3), "Reserved", 0},
3169 {ACPI_DMT_GAS, ACPI_TCPA_SERVER_OFFSET (ConfigAddress), "Configuration Address", 0},
3170 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Group), "Pci Group", 0},
3171 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Bus), "Pci Bus", 0},
3172 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Device), "Pci Device", 0},
3173 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Function), "Pci Function", 0},
3174 ACPI_DMT_TERMINATOR
3175 };
3176
3177
3178 /*******************************************************************************
3179 *
3180 * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table
3181 *
3182 ******************************************************************************/
3183
3184 ACPI_DMTABLE_INFO AcpiDmTableInfoTpm2[] =
3185 {
3186 {ACPI_DMT_UINT16, ACPI_TPM2_OFFSET (PlatformClass), "Platform Class", 0},
3187 {ACPI_DMT_UINT16, ACPI_TPM2_OFFSET (Reserved), "Reserved", 0},
3188 {ACPI_DMT_UINT64, ACPI_TPM2_OFFSET (ControlAddress), "Control Address", 0},
3189 {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (StartMethod), "Start Method", 0},
3190 ACPI_DMT_TERMINATOR
3191 };
3192
3193
3194 /*******************************************************************************
3195 *
3196 * UEFI - UEFI Boot optimization Table
3197 *
3198 ******************************************************************************/
3199
3200 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] =
3201 {
3202 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0},
3203 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0},
3204 ACPI_DMT_TERMINATOR
3205 };
3206
3207
3208 /*******************************************************************************
3209 *
3210 * VRTC - Virtual Real Time Clock Table
3211 *
3212 ******************************************************************************/
3213
3214 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc[] =
3215 {
3216 ACPI_DMT_TERMINATOR
3217 };
3218
3219 /* VRTC Subtables - VRTC Entry */
3220
3221 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc0[] =
3222 {
3223 {ACPI_DMT_GAS, ACPI_VRTC0_OFFSET (PhysicalAddress), "PhysicalAddress", 0},
3224 {ACPI_DMT_UINT32, ACPI_VRTC0_OFFSET (Irq), "IRQ", 0},
3225 ACPI_DMT_TERMINATOR
3226 };
3227
3228
3229 /*******************************************************************************
3230 *
3231 * WAET - Windows ACPI Emulated devices Table
3232 *
3233 ******************************************************************************/
3234
3235 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] =
3236 {
3237 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3238 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0},
3239 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0},
3240 ACPI_DMT_TERMINATOR
3241 };
3242
3243
3244 /*******************************************************************************
3245 *
3246 * WDAT - Watchdog Action Table
3247 *
3248 ******************************************************************************/
3249
3250 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] =
3251 {
3252 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH},
3253 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0},
3254 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0},
3255 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0},
3256 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0},
3257 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0},
3258 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0},
3259 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0},
3260 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0},
3261 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
3262 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0},
3263 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0},
3264 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0},
3265 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0},
3266 ACPI_DMT_TERMINATOR
3267 };
3268
3269 /* WDAT Subtables - Watchdog Instruction Entries */
3270
3271 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] =
3272 {
3273 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0},
3274 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0},
3275 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0},
3276 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0},
3277 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0},
3278 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0},
3279 ACPI_DMT_TERMINATOR
3280 };
3281
3282
3283 /*******************************************************************************
3284 *
3285 * WDDT - Watchdog Description Table
3286 *
3287 ******************************************************************************/
3288
3289 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] =
3290 {
3291 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0},
3292 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0},
3293 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
3294 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0},
3295 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0},
3296 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0},
3297 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0},
3298 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0},
3299
3300 /* Status Flags byte 0 */
3301
3302 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0},
3303 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0},
3304 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0},
3305
3306 /* Status Flags byte 1 */
3307
3308 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0},
3309 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0},
3310 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0},
3311 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0},
3312
3313 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0},
3314
3315 /* Capability Flags byte 0 */
3316
3317 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0},
3318 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0},
3319 ACPI_DMT_TERMINATOR
3320 };
3321
3322
3323 /*******************************************************************************
3324 *
3325 * WDRT - Watchdog Resource Table
3326 *
3327 ******************************************************************************/
3328
3329 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] =
3330 {
3331 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0},
3332 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0},
3333 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0},
3334 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
3335 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0},
3336 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0},
3337 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0},
3338 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0},
3339 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0},
3340 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0},
3341 ACPI_DMT_TERMINATOR
3342 };
3343
3344
3345 /*******************************************************************************
3346 *
3347 * WPBT - Windows Platform Environment Table (ACPI 6.0)
3348 * Version 1
3349 *
3350 * Conforms to "Windows Platform Binary Table (WPBT)" 29 November 2011
3351 *
3352 ******************************************************************************/
3353
3354 ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt[] =
3355 {
3356 {ACPI_DMT_UINT32, ACPI_WPBT_OFFSET (HandoffSize), "Handoff Size", 0},
3357 {ACPI_DMT_UINT64, ACPI_WPBT_OFFSET (HandoffAddress), "Handoff Address", 0},
3358 {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Layout), "Layout", 0},
3359 {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Type), "Type", 0},
3360 {ACPI_DMT_UINT16, ACPI_WPBT_OFFSET (ArgumentsLength), "Arguments Length", 0},
3361 ACPI_DMT_TERMINATOR
3362 };
3363
3364 ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt0[] =
3365 {
3366 {ACPI_DMT_UNICODE, sizeof (ACPI_TABLE_WPBT), "Command-line Arguments", 0},
3367 ACPI_DMT_TERMINATOR
3368 };
3369
3370
3371 /*******************************************************************************
3372 *
3373 * WSMT - Windows SMM Security Migrations Table
3374 *
3375 ******************************************************************************/
3376
3377 ACPI_DMTABLE_INFO AcpiDmTableInfoWsmt[] =
3378 {
3379 {ACPI_DMT_UINT32, ACPI_WSMT_OFFSET (ProtectionFlags), "Protection Flags", 0},
3380 {ACPI_DMT_FLAG0, ACPI_WSMT_FLAG_OFFSET (ProtectionFlags,0), "FIXED_COMM_BUFFERS", 0},
3381 {ACPI_DMT_FLAG1, ACPI_WSMT_FLAG_OFFSET (ProtectionFlags,0), "COMM_BUFFER_NESTED_PTR_PROTECTION", 0},
3382 {ACPI_DMT_FLAG2, ACPI_WSMT_FLAG_OFFSET (ProtectionFlags,0), "SYSTEM_RESOURCE_PROTECTION", 0},
3383 ACPI_DMT_TERMINATOR
3384 };
3385
3386
3387 /*******************************************************************************
3388 *
3389 * XENV - Xen Environment table (ACPI 6.0)
3390 *
3391 ******************************************************************************/
3392
3393 ACPI_DMTABLE_INFO AcpiDmTableInfoXenv[] =
3394 {
3395 {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableAddress), "Grant Table Address", 0},
3396 {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableSize), "Grant Table Size", 0},
3397 {ACPI_DMT_UINT32, ACPI_XENV_OFFSET (EventInterrupt), "Event Interrupt", 0},
3398 {ACPI_DMT_UINT8, ACPI_XENV_OFFSET (EventFlags), "Event Flags", 0},
3399 ACPI_DMT_TERMINATOR
3400 };
3401
3402
3403 /*! [Begin] no source code translation */
3404
3405 /*
3406 * Generic types (used in UEFI and custom tables)
3407 *
3408 * Examples:
3409 *
3410 * Buffer : cc 04 ff bb
3411 * UINT8 : 11
3412 * UINT16 : 1122
3413 * UINT24 : 112233
3414 * UINT32 : 11223344
3415 * UINT56 : 11223344556677
3416 * UINT64 : 1122334455667788
3417 *
3418 * String : "This is string"
3419 * Unicode : "This string encoded to Unicode"
3420 *
3421 * GUID : 11223344-5566-7788-99aa-bbccddeeff00
3422 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)"
3423 */
3424
3425 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName) \
3426 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR}
3427
3428 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] =
3429 {
3430 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"),
3431 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"),
3432 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"),
3433 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"),
3434 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT40, "UINT40"),
3435 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT48, "UINT48"),
3436 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"),
3437 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"),
3438 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"),
3439 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"),
3440 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"),
3441 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"),
3442 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"),
3443 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"),
3444 {ACPI_DMT_TERMINATOR}
3445 };
3446 /*! [End] no source code translation !*/
DragonFly BSD