2 * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/alc/if_alcvar.h,v 1.1 2009/06/10 02:07:58 yongari Exp $
34 #define ALC_TX_RING_CNT 256
35 #define ALC_TX_RING_ALIGN sizeof(struct tx_desc)
36 #define ALC_RX_RING_CNT 256
37 #define ALC_RX_RING_ALIGN sizeof(struct rx_desc)
38 #define ALC_RX_BUF_ALIGN 4
39 #define ALC_RR_RING_CNT ALC_RX_RING_CNT
40 #define ALC_RR_RING_ALIGN sizeof(struct rx_rdesc)
41 #define ALC_CMB_ALIGN 8
42 #define ALC_SMB_ALIGN 8
44 #define ALC_TSO_MAXSEGSIZE 4096
45 #define ALC_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
46 #define ALC_MAXTXSEGS 32
48 #define ALC_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
49 #define ALC_ADDR_HI(x) ((uint64_t) (x) >> 32)
51 #define ALC_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
53 /* Water mark to kick reclaiming Tx buffers. */
54 #define ALC_TX_DESC_HIWAT ((ALC_TX_RING_CNT * 6) / 10)
56 #define ALC_MSI_MESSAGES 1
57 #define ALC_MSIX_MESSAGES 1
59 #define ALC_TX_RING_SZ \
60 (sizeof(struct tx_desc) * ALC_TX_RING_CNT)
61 #define ALC_RX_RING_SZ \
62 (sizeof(struct rx_desc) * ALC_RX_RING_CNT)
63 #define ALC_RR_RING_SZ \
64 (sizeof(struct rx_rdesc) * ALC_RR_RING_CNT)
65 #define ALC_CMB_SZ (sizeof(struct cmb))
66 #define ALC_SMB_SZ (sizeof(struct smb))
68 #define ALC_PROC_MIN 16
69 #define ALC_PROC_MAX (ALC_RX_RING_CNT - 1)
70 #define ALC_PROC_DEFAULT (ALC_RX_RING_CNT / 4)
72 #define ALC_JUMBO_FRAMELEN (9 * 1024)
73 #define ALC_JUMBO_MTU \
74 (ALC_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - ETHER_CRC_LEN)
75 #define ALC_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN)
78 * The number of bits reserved for MSS in AR8121/AR8132 controllers
79 * are 13 bits. This limits the maximum interface MTU size in TSO
80 * case(8191 + sizeof(struct ip) + sizeof(struct tcphdr)) as upper
81 * stack should not generate TCP segments with MSS greater than the
82 * limit. Also Atheros says that maximum MTU for TSO is 6KB.
84 #define ALC_TSO_MTU (6 * 1024)
98 bus_dmamap_t rx_dmamap
;
99 struct rx_desc
*rx_desc
;
104 bus_dmamap_t tx_dmamap
;
107 struct alc_ring_data
{
108 struct tx_desc
*alc_tx_ring
;
109 bus_addr_t alc_tx_ring_paddr
;
110 struct rx_desc
*alc_rx_ring
;
111 bus_addr_t alc_rx_ring_paddr
;
112 struct rx_rdesc
*alc_rr_ring
;
113 bus_addr_t alc_rr_ring_paddr
;
115 bus_addr_t alc_cmb_paddr
;
117 bus_addr_t alc_smb_paddr
;
120 struct alc_chain_data
{
121 bus_dma_tag_t alc_parent_tag
;
122 bus_dma_tag_t alc_buffer_tag
;
123 bus_dma_tag_t alc_tx_tag
;
124 struct alc_txdesc alc_txdesc
[ALC_TX_RING_CNT
];
125 bus_dma_tag_t alc_rx_tag
;
126 struct alc_rxdesc alc_rxdesc
[ALC_RX_RING_CNT
];
127 bus_dma_tag_t alc_tx_ring_tag
;
128 bus_dmamap_t alc_tx_ring_map
;
129 bus_dma_tag_t alc_rx_ring_tag
;
130 bus_dmamap_t alc_rx_ring_map
;
131 bus_dma_tag_t alc_rr_ring_tag
;
132 bus_dmamap_t alc_rr_ring_map
;
133 bus_dmamap_t alc_rx_sparemap
;
134 bus_dma_tag_t alc_cmb_tag
;
135 bus_dmamap_t alc_cmb_map
;
136 bus_dma_tag_t alc_smb_tag
;
137 bus_dmamap_t alc_smb_map
;
146 struct mbuf
*alc_rxhead
;
147 struct mbuf
*alc_rxtail
;
148 struct mbuf
*alc_rxprev_tail
;
151 struct alc_hw_stats
{
154 uint32_t rx_bcast_frames
;
155 uint32_t rx_mcast_frames
;
156 uint32_t rx_pause_frames
;
157 uint32_t rx_control_frames
;
162 uint32_t rx_fragments
;
164 uint32_t rx_pkts_65_127
;
165 uint32_t rx_pkts_128_255
;
166 uint32_t rx_pkts_256_511
;
167 uint32_t rx_pkts_512_1023
;
168 uint32_t rx_pkts_1024_1518
;
169 uint32_t rx_pkts_1519_max
;
170 uint32_t rx_pkts_truncated
;
171 uint32_t rx_fifo_oflows
;
172 uint32_t rx_rrs_errs
;
173 uint32_t rx_alignerrs
;
174 uint64_t rx_bcast_bytes
;
175 uint64_t rx_mcast_bytes
;
176 uint32_t rx_pkts_filtered
;
179 uint32_t tx_bcast_frames
;
180 uint32_t tx_mcast_frames
;
181 uint32_t tx_pause_frames
;
182 uint32_t tx_excess_defer
;
183 uint32_t tx_control_frames
;
184 uint32_t tx_deferred
;
187 uint32_t tx_pkts_65_127
;
188 uint32_t tx_pkts_128_255
;
189 uint32_t tx_pkts_256_511
;
190 uint32_t tx_pkts_512_1023
;
191 uint32_t tx_pkts_1024_1518
;
192 uint32_t tx_pkts_1519_max
;
193 uint32_t tx_single_colls
;
194 uint32_t tx_multi_colls
;
195 uint32_t tx_late_colls
;
196 uint32_t tx_excess_colls
;
198 uint32_t tx_underrun
;
199 uint32_t tx_desc_underrun
;
201 uint32_t tx_pkts_truncated
;
202 uint64_t tx_bcast_bytes
;
203 uint64_t tx_mcast_bytes
;
207 * Software state per device.
210 struct arpcom arpcom
;
211 struct ifnet
*alc_ifp
; /* points to arpcom.ac_if */
214 struct resource
*alc_res
[1];
215 struct resource_spec
*alc_res_spec
;
216 struct resource
*alc_irq
[ALC_MSI_MESSAGES
];
217 struct resource_spec
*alc_irq_spec
;
218 void *alc_intrhand
[ALC_MSI_MESSAGES
];
222 uint8_t alc_eaddr
[ETHER_ADDR_LEN
];
223 uint32_t alc_dma_rd_burst
;
224 uint32_t alc_dma_wr_burst
;
227 #define ALC_FLAG_PCIE 0x0001
228 #define ALC_FLAG_PCIX 0x0002
229 #define ALC_FLAG_MSI 0x0004
230 #define ALC_FLAG_MSIX 0x0008
231 #define ALC_FLAG_FASTETHER 0x0020
232 #define ALC_FLAG_JUMBO 0x0040
233 #define ALC_FLAG_ASPM_MON 0x0080
234 #define ALC_FLAG_CMB_BUG 0x0100
235 #define ALC_FLAG_SMB_BUG 0x0200
236 #define ALC_FLAG_DETACH 0x4000
237 #define ALC_FLAG_LINK 0x8000
239 struct callout alc_tick_ch
;
240 struct alc_hw_stats alc_stats
;
241 struct alc_chain_data alc_cdata
;
242 struct alc_ring_data alc_rdata
;
244 int alc_watchdog_timer
;
245 int alc_process_limit
;
246 volatile int alc_morework
;
251 struct sysctl_ctx_list alc_sysctl_ctx
;
253 struct task alc_int_task
;
254 struct task alc_tx_task
;
255 struct taskqueue
*alc_tq
;
256 struct lock alc_lock
;
259 /* Register access macros. */
260 #define CSR_WRITE_4(_sc, reg, val) \
261 bus_write_4((_sc)->alc_res[0], (reg), (val))
262 #define CSR_WRITE_2(_sc, reg, val) \
263 bus_write_2((_sc)->alc_res[0], (reg), (val))
264 #define CSR_WRITE_1(_sc, reg, val) \
265 bus_write_1((_sc)->alc_res[0], (reg), (val))
266 #define CSR_READ_2(_sc, reg) \
267 bus_read_2((_sc)->alc_res[0], (reg))
268 #define CSR_READ_4(_sc, reg) \
269 bus_read_4((_sc)->alc_res[0], (reg))
271 #define ALC_RXCHAIN_RESET(_sc) \
273 (_sc)->alc_cdata.alc_rxhead = NULL; \
274 (_sc)->alc_cdata.alc_rxtail = NULL; \
275 (_sc)->alc_cdata.alc_rxprev_tail = NULL; \
276 (_sc)->alc_cdata.alc_rxlen = 0; \
279 #define ALC_LOCK(_sc) lockmgr(&(_sc)->alc_lock, LK_EXCLUSIVE)
280 #define ALC_UNLOCK(_sc) lockmgr(&(_sc)->alc_lock, LK_RELEASE)
281 #define ALC_LOCK_ASSERT(_sc) KKASSERT(lockstatus(&(_sc)->alc_lock, curthread) != 0)
283 #define ALC_TX_TIMEOUT 5
284 #define ALC_RESET_TIMEOUT 100
285 #define ALC_TIMEOUT 1000
286 #define ALC_PHY_TIMEOUT 1000
288 #endif /* _IF_ALCVAR_H */