dhcpcd: update README.DRAGONFLY
[dragonfly.git] / sys / platform / pc64 / include / pmap.h
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1 /*
2 * Copyright (c) 1991 Regents of the University of California.
3 * Copyright (c) 2003 Peter Wemm.
4 * Copyright (c) 2008 The DragonFly Project.
5 * All rights reserved.
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department and William Jolitz of UUNET Technologies Inc.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
35 * Derived from hp300 version by Mike Hibler, this version by William
36 * Jolitz uses a recursive map [a pde points to the page directory] to
37 * map the page tables using the pagetables themselves. This is done to
38 * reduce the impact on kernel virtual memory for lots of sparse address
39 * space, and to reduce the cost of memory to each process.
41 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
42 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
43 * $FreeBSD: src/sys/i386/include/pmap.h,v 1.65.2.3 2001/10/03 07:15:37 peter Exp $
46 #ifndef _MACHINE_PMAP_H_
47 #define _MACHINE_PMAP_H_
49 #include <cpu/pmap.h>
52 * Pte related macros. This is complicated by having to deal with
53 * the sign extension of the 48th bit.
55 #define KVADDR(l4, l3, l2, l1) ( \
56 ((unsigned long)-1 << 47) | \
57 ((unsigned long)(l4) << PML4SHIFT) | \
58 ((unsigned long)(l3) << PDPSHIFT) | \
59 ((unsigned long)(l2) << PDRSHIFT) | \
60 ((unsigned long)(l1) << PAGE_SHIFT))
62 #define UVADDR(l4, l3, l2, l1) ( \
63 ((unsigned long)(l4) << PML4SHIFT) | \
64 ((unsigned long)(l3) << PDPSHIFT) | \
65 ((unsigned long)(l2) << PDRSHIFT) | \
66 ((unsigned long)(l1) << PAGE_SHIFT))
69 * NKPML4E is the number of PML4E slots used for KVM. Each slot represents
70 * 512GB of KVM. A number between 1 and 128 may be specified. To support
71 * the maximum machine configuration of 64TB we recommend around
72 * 16 slots (8TB of KVM).
74 * NOTE: We no longer hardwire NKPT, it is calculated in create_pagetables()
76 #define NKPML4E 16
77 /* NKPDPE defined in vmparam.h */
80 * NUPDPs 512 (256 user) number of PDPs in user page table
81 * NUPDs 512 * 512 number of PDs in user page table
82 * NUPTs 512 * 512 * 512 number of PTs in user page table
83 * NUPTEs 512 * 512 * 512 * 512 number of PTEs in user page table
85 * NUPDP_USER number of PDPs reserved for userland
86 * NUPTE_USER number of PTEs reserved for userland (big number)
88 #define NUPDP_USER (NPML4EPG/2)
89 #define NUPDP_TOTAL (NPML4EPG)
90 #define NUPD_TOTAL (NPDPEPG * NUPDP_TOTAL)
91 #define NUPT_TOTAL (NPDEPG * NUPD_TOTAL)
92 #define NUPTE_TOTAL ((vm_pindex_t)NPTEPG * NUPT_TOTAL)
93 #define NUPTE_USER ((vm_pindex_t)NPTEPG * NPDEPG * NPDPEPG * NUPDP_USER)
96 * Number of 512G DMAP PML4 slots. There are 512 slots of which 256 are
97 * used by the kernel. Of those 256 we allow up to 128 to be used by the
98 * DMAP (for 64TB of RAM), leaving 128 for the kernel and other incidentals.
100 #define NDMPML4E 128
103 * The *PML4I values control the layout of virtual memory. Each PML4
104 * entry represents 512G.
106 #define PML4PML4I (NPML4EPG/2) /* Index of recursive PML4 mapping */
108 #define KPML4I (NPML4EPG-NKPML4E) /* Start of KVM */
109 #define DMPML4I (KPML4I-NDMPML4E) /* Next N*512GB down for DMAP */
112 * Make sure the kernel map and DMAP don't overflow the 256 PDP entries
113 * we have available. Minus one for the PML4PML4I.
115 #if NKPML4E + NDMPML4E >= 255
116 #error "NKPML4E or NDMPML4E is too large"
117 #endif
120 * The location of KERNBASE in the last PD of the kernel's KVM (KPML4I)
121 * space. Each PD represents 1GB. The kernel must be placed here
122 * for the compile/link options to work properly so absolute 32-bit
123 * addressing can be used to access stuff.
125 #define KPDPI (NPDPEPG-2) /* kernbase at -2GB */
128 * per-CPU data assume ~64K x SMP_MAXCPU, say up to 256 cpus
129 * in the future or 16MB of space. Each PD represents 2MB so
130 * use NPDEPG-8 to place the per-CPU data.
132 #define MPPML4I (KPML4I + NKPML4E - 1)
133 #define MPPDPI KPDPI
134 #define MPPTDI (NPDEPG-8)
137 * XXX doesn't really belong here I guess...
139 #define ISA_HOLE_START 0xa0000
140 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
142 #ifndef LOCORE
144 #ifndef _SYS_TYPES_H_
145 #include <sys/types.h>
146 #endif
147 #ifndef _SYS_CPUMASK_H_
148 #include <sys/cpumask.h>
149 #endif
150 #ifndef _SYS_QUEUE_H_
151 #include <sys/queue.h>
152 #endif
153 #ifndef _SYS_TREE_H_
154 #include <sys/tree.h>
155 #endif
156 #ifndef _SYS_SPINLOCK_H_
157 #include <sys/spinlock.h>
158 #endif
159 #ifndef _SYS_THREAD_H_
160 #include <sys/thread.h>
161 #endif
162 #ifndef _MACHINE_TYPES_H_
163 #include <machine/types.h>
164 #endif
165 #ifndef _MACHINE_PARAM_H_
166 #include <machine/param.h>
167 #endif
170 * Address of current and alternate address space page table maps
171 * and directories.
173 #ifdef _KERNEL
174 #define addr_PTmap (KVADDR(PML4PML4I, 0, 0, 0))
175 #define addr_PDmap (KVADDR(PML4PML4I, PML4PML4I, 0, 0))
176 #define addr_PDPmap (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, 0))
177 #define addr_PML4map (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I))
178 #define addr_PML4pml4e (addr_PML4map + (PML4PML4I * sizeof(pml4_entry_t)))
179 #define PTmap ((pt_entry_t *)(addr_PTmap))
180 #define PDmap ((pd_entry_t *)(addr_PDmap))
181 #define PDPmap ((pd_entry_t *)(addr_PDPmap))
182 #define PML4map ((pd_entry_t *)(addr_PML4map))
183 #define PML4pml4e ((pd_entry_t *)(addr_PML4pml4e))
185 extern uint64_t KPDPphys; /* phys addr of kernel level 3 */
186 extern uint64_t KPML4phys; /* physical address of kernel level 4 */
187 #endif
190 * Pmap stuff
192 struct pmap;
193 struct pv_entry;
194 struct vm_page;
195 struct vm_object;
196 struct vmspace;
199 * vm_page structure extension for pmap. Track the number of pmap mappings
200 * for a managed page. Unmanaged pages do not use this field.
202 struct md_page {
203 long interlock_count;
204 long writeable_count_unused;
207 #define MD_PAGE_FREEABLE(m) \
208 (((m)->flags & (PG_MAPPED | PG_WRITEABLE)) == 0)
211 * vm_object's representing large mappings can contain embedded pmaps
212 * to organize sharing at higher page table levels for PROT_READ and
213 * PROT_READ|PROT_WRITE maps.
215 struct md_object {
216 void *dummy_unused;
220 * Each machine dependent implementation is expected to
221 * keep certain statistics. They may do this anyway they
222 * so choose, but are expected to return the statistics
223 * in the following structure.
225 * NOTE: We try to match the size of the pc32 pmap with the vkernel pmap
226 * so the same utilities (like 'ps') can be used on both.
228 struct pmap_statistics {
229 long resident_count; /* # of pages mapped (total) */
230 long wired_count; /* # of pages wired */
232 typedef struct pmap_statistics *pmap_statistics_t;
234 struct pv_entry_rb_tree;
235 RB_PROTOTYPE2(pv_entry_rb_tree, pv_entry, pv_entry,
236 pv_entry_compare, vm_pindex_t);
238 /* Types of pmap */
239 #define REGULAR_PMAP 0 /* Regular x86 */
240 #define EPT_PMAP 1 /* Intel EPT */
241 #define NPT_PMAP 2 /* AMD NPT/RVI */
243 /* Bits indexes in pmap_bits */
244 enum {
245 TYPE_IDX = 0, /* Pmap type */
246 PG_V_IDX, /* Valid */
247 PG_RW_IDX, /* Read/Write */
248 PG_U_IDX, /* User/Supervisor */
249 PG_A_IDX, /* Accessed */
250 PG_M_IDX, /* Modified/Dirty */
251 PG_PS_IDX, /* Page size */
252 PG_G_IDX, /* Global */
253 PG_W_IDX, /* Wired */
254 PG_MANAGED_IDX, /* Managed */
255 PG_N_IDX, /* Non-cacheable */
256 PG_NX_IDX, /* Non-execute */
257 PG_BITS_SIZE,
260 #define PROTECTION_CODES_SIZE 8
261 #define PAT_INDEX_SIZE 8
263 #define PM_PLACEMARKS 64 /* 16 @ 4 zones */
264 #define PM_NOPLACEMARK ((vm_pindex_t)-1)
265 #define PM_PLACEMARK_WAKEUP ((vm_pindex_t)0x8000000000000000LLU)
267 struct pmap {
268 pml4_entry_t *pm_pml4; /* KVA of level 4 page table */
269 pml4_entry_t *pm_pml4_iso; /* (isolated version) */
270 struct pv_entry *pm_pmlpv; /* PV entry for pml4 */
271 struct pv_entry *pm_pmlpv_iso; /* (isolated version) */
272 TAILQ_ENTRY(pmap) pm_pmnode; /* list of pmaps */
273 RB_HEAD(pv_entry_rb_tree, pv_entry) pm_pvroot;
274 int pm_count; /* reference count */
275 cpulock_t pm_active_lock; /* interlock */
276 cpumask_t pm_active; /* active on cpus */
277 int pm_flags;
278 uint32_t pm_softhold;
279 struct pmap_statistics pm_stats; /* pmap statistics */
280 struct spinlock pm_spin;
281 struct pv_entry *pm_pvhint_pt; /* pv_entry lookup hint */
282 struct pv_entry *pm_pvhint_unused;
283 vm_pindex_t pm_placemarks[PM_PLACEMARKS];
284 uint64_t pm_invgen; /* pmap generation id */
285 uint64_t pmap_bits[PG_BITS_SIZE];
286 uint64_t protection_codes[PROTECTION_CODES_SIZE];
287 pt_entry_t pmap_cache_bits_pte[PAT_INDEX_SIZE];
288 pt_entry_t pmap_cache_bits_pde[PAT_INDEX_SIZE];
289 pt_entry_t pmap_cache_mask_pte;
290 pt_entry_t pmap_cache_mask_pde;
291 int (*copyinstr)(const void *, void *, size_t, size_t *);
292 int (*copyin)(const void *, void *, size_t);
293 int (*copyout)(const void *, void *, size_t);
294 int (*fubyte)(const uint8_t *); /* returns int for -1 err */
295 int (*subyte)(uint8_t *, uint8_t);
296 int32_t (*fuword32)(const uint32_t *);
297 int64_t (*fuword64)(const uint64_t *);
298 int (*suword64)(uint64_t *, uint64_t);
299 int (*suword32)(uint32_t *, int);
300 uint32_t (*swapu32)(volatile uint32_t *, uint32_t v);
301 uint64_t (*swapu64)(volatile uint64_t *, uint64_t v);
302 uint32_t (*fuwordadd32)(volatile uint32_t *, uint32_t v);
303 uint64_t (*fuwordadd64)(volatile uint64_t *, uint64_t v);
306 #define PMAP_FLAG_SIMPLE 0x00000001
307 #define PMAP_EMULATE_AD_BITS 0x00000002 /* emulate A/D bits for EPT */
308 #define PMAP_HVM 0x00000004 /* hardware virtual machine */
309 #define PMAP_SEGSHARED 0x00000008 /* segment shared opt */
310 #define PMAP_MULTI 0x00000010 /* multi-threaded use */
312 #define pmap_resident_count(pmap) \
313 ((pmap)->pm_stats.resident_count)
314 #define pmap_resident_tlnw_count(pmap) \
315 ((pmap)->pm_stats.resident_count - (pmap)->pm_stats.wired_count)
317 typedef struct pmap *pmap_t;
319 #ifdef _KERNEL
320 extern struct pmap *kernel_pmap;
321 #endif
324 * The pv_entry structure is used to track higher levels of the page table.
325 * The leaf PTE is no longer tracked with this structure.
327 typedef struct pv_entry {
328 pmap_t pv_pmap; /* pmap where mapping lies */
329 vm_pindex_t pv_pindex; /* PTE, PT, PD, PDP, or PML4 */
330 RB_ENTRY(pv_entry) pv_entry;
331 struct vm_page *pv_m; /* page being mapped */
332 u_int pv_hold; /* interlock action */
333 u_int pv_flags;
334 #ifdef PMAP_DEBUG
335 const char *pv_func;
336 int pv_line;
337 const char *pv_func_lastfree;
338 int pv_line_lastfree;
339 #endif
340 } *pv_entry_t;
342 #define PV_HOLD_LOCKED 0x80000000U
343 #define PV_HOLD_WAITING 0x40000000U
344 #define PV_HOLD_UNUSED2000 0x20000000U
345 #define PV_HOLD_MASK 0x1FFFFFFFU
347 #define PV_FLAG_UNUSED01 0x00000001U
348 #define PV_FLAG_UNUSED02 0x00000002U
350 #ifdef _KERNEL
352 extern caddr_t CADDR1;
353 extern pt_entry_t *CMAP1;
354 extern vm_paddr_t avail_end;
355 extern vm_paddr_t avail_start;
356 extern vm_offset_t clean_eva;
357 extern vm_offset_t clean_sva;
358 extern char *ptvmmap; /* poor name! */
360 #ifndef __VM_PAGE_T_DEFINED__
361 #define __VM_PAGE_T_DEFINED__
362 typedef struct vm_page *vm_page_t;
363 #endif
364 #ifndef __VM_MEMATTR_T_DEFINED__
365 #define __VM_MEMATTR_T_DEFINED__
366 typedef char vm_memattr_t;
367 #endif
369 void pmap_release(struct pmap *pmap);
370 void pmap_interlock_wait (struct vmspace *);
371 void pmap_bootstrap (vm_paddr_t *);
372 void *pmap_mapbios(vm_paddr_t, vm_size_t);
373 void *pmap_mapdev (vm_paddr_t, vm_size_t);
374 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
375 void *pmap_mapdev_uncacheable(vm_paddr_t, vm_size_t);
376 void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
377 void pmap_unmapdev (vm_offset_t, vm_size_t);
378 struct vm_page *pmap_use_pt (pmap_t, vm_offset_t);
379 void pmap_set_opt (void);
380 void pmap_init_pat(void);
381 void pmap_invalidate_cache_pages(vm_page_t *pages, int count);
382 void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
384 static __inline int
385 pmap_emulate_ad_bits(pmap_t pmap) {
386 return pmap->pm_flags & PMAP_EMULATE_AD_BITS;
389 #endif /* _KERNEL */
391 #endif /* !LOCORE */
393 #endif /* !_MACHINE_PMAP_H_ */