Sync ACPICA with Intel's version 20180508 (from previously 20170831).
[dragonfly.git] / sys / contrib / dev / acpica / source / components / resources / rsirq.c
blobcde1a0e65264eb5c036cef8972cfc0ec66ddc2f1
1 /*******************************************************************************
3 * Module Name: rsirq - IRQ resource descriptors
5 ******************************************************************************/
7 /******************************************************************************
9 * 1. Copyright Notice
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
12 * All rights reserved.
14 * 2. License
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
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35 * is granted directly or by implication, estoppel or otherwise;
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
40 * 3. Conditions
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
80 * 4. Disclaimer and Export Compliance
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
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92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
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97 * LIMITED REMEDY.
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
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108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
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114 *****************************************************************************
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117 * following license:
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120 * modification, are permitted provided that the following conditions
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148 * Software Foundation.
150 *****************************************************************************/
152 #include "acpi.h"
153 #include "accommon.h"
154 #include "acresrc.h"
156 #define _COMPONENT ACPI_RESOURCES
157 ACPI_MODULE_NAME ("rsirq")
160 /*******************************************************************************
162 * AcpiRsGetIrq
164 ******************************************************************************/
166 ACPI_RSCONVERT_INFO AcpiRsGetIrq[9] =
168 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_IRQ,
169 ACPI_RS_SIZE (ACPI_RESOURCE_IRQ),
170 ACPI_RSC_TABLE_SIZE (AcpiRsGetIrq)},
172 /* Get the IRQ mask (bytes 1:2) */
174 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
175 AML_OFFSET (Irq.IrqMask),
176 ACPI_RS_OFFSET (Data.Irq.InterruptCount)},
178 /* Set default flags (others are zero) */
180 {ACPI_RSC_SET8, ACPI_RS_OFFSET (Data.Irq.Triggering),
181 ACPI_EDGE_SENSITIVE,
184 /* Get the descriptor length (2 or 3 for IRQ descriptor) */
186 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Irq.DescriptorLength),
187 AML_OFFSET (Irq.DescriptorType),
190 /* All done if no flag byte present in descriptor */
192 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
194 /* Get flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
196 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Triggering),
197 AML_OFFSET (Irq.Flags),
200 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Polarity),
201 AML_OFFSET (Irq.Flags),
204 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Sharable),
205 AML_OFFSET (Irq.Flags),
208 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.WakeCapable),
209 AML_OFFSET (Irq.Flags),
214 /*******************************************************************************
216 * AcpiRsSetIrq
218 ******************************************************************************/
220 ACPI_RSCONVERT_INFO AcpiRsSetIrq[14] =
222 /* Start with a default descriptor of length 3 */
224 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_IRQ,
225 sizeof (AML_RESOURCE_IRQ),
226 ACPI_RSC_TABLE_SIZE (AcpiRsSetIrq)},
228 /* Convert interrupt list to 16-bit IRQ bitmask */
230 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
231 AML_OFFSET (Irq.IrqMask),
232 ACPI_RS_OFFSET (Data.Irq.InterruptCount)},
234 /* Set flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
236 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Triggering),
237 AML_OFFSET (Irq.Flags),
240 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Polarity),
241 AML_OFFSET (Irq.Flags),
244 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Sharable),
245 AML_OFFSET (Irq.Flags),
248 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.WakeCapable),
249 AML_OFFSET (Irq.Flags),
253 * All done if the output descriptor length is required to be 3
254 * (i.e., optimization to 2 bytes cannot be attempted)
256 {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
257 ACPI_RS_OFFSET(Data.Irq.DescriptorLength),
260 /* Set length to 2 bytes (no flags byte) */
262 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ_NOFLAGS)},
265 * All done if the output descriptor length is required to be 2.
267 * TBD: Perhaps we should check for error if input flags are not
268 * compatible with a 2-byte descriptor.
270 {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
271 ACPI_RS_OFFSET(Data.Irq.DescriptorLength),
274 /* Reset length to 3 bytes (descriptor with flags byte) */
276 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ)},
279 * Check if the flags byte is necessary. Not needed if the flags are:
280 * ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH, ACPI_EXCLUSIVE
282 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
283 ACPI_RS_OFFSET (Data.Irq.Triggering),
284 ACPI_EDGE_SENSITIVE},
286 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
287 ACPI_RS_OFFSET (Data.Irq.Polarity),
288 ACPI_ACTIVE_HIGH},
290 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
291 ACPI_RS_OFFSET (Data.Irq.Sharable),
292 ACPI_EXCLUSIVE},
294 /* We can optimize to a 2-byte IrqNoFlags() descriptor */
296 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ_NOFLAGS)}
300 /*******************************************************************************
302 * AcpiRsConvertExtIrq
304 ******************************************************************************/
306 ACPI_RSCONVERT_INFO AcpiRsConvertExtIrq[10] =
308 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_EXTENDED_IRQ,
309 ACPI_RS_SIZE (ACPI_RESOURCE_EXTENDED_IRQ),
310 ACPI_RSC_TABLE_SIZE (AcpiRsConvertExtIrq)},
312 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_EXTENDED_IRQ,
313 sizeof (AML_RESOURCE_EXTENDED_IRQ),
317 * Flags: Producer/Consumer[0], Triggering[1], Polarity[2],
318 * Sharing[3], Wake[4]
320 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.ProducerConsumer),
321 AML_OFFSET (ExtendedIrq.Flags),
324 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Triggering),
325 AML_OFFSET (ExtendedIrq.Flags),
328 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Polarity),
329 AML_OFFSET (ExtendedIrq.Flags),
332 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Sharable),
333 AML_OFFSET (ExtendedIrq.Flags),
336 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.WakeCapable),
337 AML_OFFSET (ExtendedIrq.Flags),
340 /* IRQ Table length (Byte4) */
342 {ACPI_RSC_COUNT, ACPI_RS_OFFSET (Data.ExtendedIrq.InterruptCount),
343 AML_OFFSET (ExtendedIrq.InterruptCount),
344 sizeof (UINT32)},
346 /* Copy every IRQ in the table, each is 32 bits */
348 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]),
349 AML_OFFSET (ExtendedIrq.Interrupts[0]),
352 /* Optional ResourceSource (Index and String) */
354 {ACPI_RSC_SOURCEX, ACPI_RS_OFFSET (Data.ExtendedIrq.ResourceSource),
355 ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]),
356 sizeof (AML_RESOURCE_EXTENDED_IRQ)}
360 /*******************************************************************************
362 * AcpiRsConvertDma
364 ******************************************************************************/
366 ACPI_RSCONVERT_INFO AcpiRsConvertDma[6] =
368 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_DMA,
369 ACPI_RS_SIZE (ACPI_RESOURCE_DMA),
370 ACPI_RSC_TABLE_SIZE (AcpiRsConvertDma)},
372 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_DMA,
373 sizeof (AML_RESOURCE_DMA),
376 /* Flags: transfer preference, bus mastering, channel speed */
378 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Dma.Transfer),
379 AML_OFFSET (Dma.Flags),
382 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Dma.BusMaster),
383 AML_OFFSET (Dma.Flags),
386 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Dma.Type),
387 AML_OFFSET (Dma.Flags),
390 /* DMA channel mask bits */
392 {ACPI_RSC_BITMASK, ACPI_RS_OFFSET (Data.Dma.Channels[0]),
393 AML_OFFSET (Dma.DmaChannelMask),
394 ACPI_RS_OFFSET (Data.Dma.ChannelCount)}
398 /*******************************************************************************
400 * AcpiRsConvertFixedDma
402 ******************************************************************************/
404 ACPI_RSCONVERT_INFO AcpiRsConvertFixedDma[4] =
406 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_FIXED_DMA,
407 ACPI_RS_SIZE (ACPI_RESOURCE_FIXED_DMA),
408 ACPI_RSC_TABLE_SIZE (AcpiRsConvertFixedDma)},
410 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_FIXED_DMA,
411 sizeof (AML_RESOURCE_FIXED_DMA),
415 * These fields are contiguous in both the source and destination:
416 * RequestLines
417 * Channels
419 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.FixedDma.RequestLines),
420 AML_OFFSET (FixedDma.RequestLines),
423 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.FixedDma.Width),
424 AML_OFFSET (FixedDma.Width),