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* Fix some cases where NULL was used but 0 was meant (and vice versa).
[dragonfly.git] / sys / dev / serial / sio / sio.c
blob0ae6325fba56ce6d838578b5312e343d79d3dc05
1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.43 2008/06/05 18:06:32 swildner Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
37 */
38
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
41 #include "opt_ddb.h"
42 #include "opt_sio.h"
43 #include "use_pci.h"
44 #ifdef __i386__
45 #include "use_puc.h"
46 #endif
47 #include "use_sio.h"
48
49 /*
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
54 *
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
57 */
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
62 #include <sys/tty.h>
63 #include <sys/proc.h>
64 #include <sys/module.h>
65 #include <sys/conf.h>
66 #include <sys/dkstat.h>
67 #include <sys/fcntl.h>
68 #include <sys/interrupt.h>
69 #include <sys/kernel.h>
70 #include <sys/syslog.h>
71 #include <sys/sysctl.h>
72 #include <sys/bus.h>
73 #include <sys/rman.h>
74 #include <sys/timepps.h>
75 #include <sys/thread2.h>
76
77 #include <machine/limits.h>
78
79 #include <bus/isa/isareg.h>
80 #include <bus/isa/isavar.h>
81 #if NPCI > 0
82 #include <bus/pci/pcireg.h>
83 #include <bus/pci/pcivar.h>
84 #endif
85 #if NPUC > 0
86 #include <dev/misc/puc/pucvar.h>
87 #endif
88 #include <machine/lock.h>
89
90 #include <machine/clock.h>
91 #ifndef SMP
92 #include <machine/lock.h>
93 #endif
94
95 #include "sioreg.h"
96 #include "sio_private.h"
97
98 #ifdef COM_ESP
99 #include "../ic_layer/esp.h"
100 #endif
101
102 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
103
104 #define CALLOUT_MASK 0x80
105 #define CONTROL_MASK 0x60
106 #define CONTROL_INIT_STATE 0x20
107 #define CONTROL_LOCK_STATE 0x40
108 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
109 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
110 | ((mynor) & 0x1f))
111 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
112 | ((unit) & 0x1f))
113
114 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
115
116 #define sio_getreg(com, off) \
117 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
118 #define sio_setreg(com, off, value) \
119 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
120
121 /*
122 * com state bits.
123 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
124 * than the other bits so that they can be tested as a group without masking
125 * off the low bits.
126 *
127 * The following com and tty flags correspond closely:
128 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
129 * comstop())
130 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
131 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
132 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
133 * TS_FLUSH is not used.
134 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
135 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
136 */
137 #define CS_BUSY 0x80 /* output in progress */
138 #define CS_TTGO 0x40 /* output not stopped by XOFF */
139 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
140 #define CS_CHECKMSR 1 /* check of MSR scheduled */
141 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
142 #define CS_DTR_OFF 0x10 /* DTR held off */
143 #define CS_ODONE 4 /* output completed */
144 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
145 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
146
147 static char const * const error_desc[] = {
148 #define CE_OVERRUN 0
149 "silo overflow",
150 #define CE_INTERRUPT_BUF_OVERFLOW 1
151 "interrupt-level buffer overflow",
152 #define CE_TTY_BUF_OVERFLOW 2
153 "tty-level buffer overflow",
154 };
155
156 #ifdef COM_ESP
157 static int espattach (struct com_s *com, Port_t esp_port);
158 #endif
159 static int sio_isa_attach (device_t dev);
160
161 static timeout_t siobusycheck;
162 static u_int siodivisor (u_long rclk, speed_t speed);
163 static timeout_t siodtrwakeup;
164 static void comhardclose (struct com_s *com);
165 static void sioinput (struct com_s *com);
166 static void siointr1 (struct com_s *com);
167 static void siointr (void *arg);
168 static int commctl (struct com_s *com, int bits, int how);
169 static int comparam (struct tty *tp, struct termios *t);
170 static inthand2_t siopoll;
171 static int sio_isa_probe (device_t dev);
172 static void siosettimeout (void);
173 static int siosetwater (struct com_s *com, speed_t speed);
174 static void comstart (struct tty *tp);
175 static void comstop (struct tty *tp, int rw);
176 static timeout_t comwakeup;
177 static void disc_optim (struct tty *tp, struct termios *t,
178 struct com_s *com);
179
180 #if NPCI > 0
181 static int sio_pci_attach (device_t dev);
182 static void sio_pci_kludge_unit (device_t dev);
183 static int sio_pci_probe (device_t dev);
184 #endif /* NPCI > 0 */
185
186 #if NPUC > 0
187 static int sio_puc_attach (device_t dev);
188 static int sio_puc_probe (device_t dev);
189 #endif /* NPUC > 0 */
190
191 static char driver_name[] = "sio";
192
193 /* table and macro for fast conversion from a unit number to its com struct */
194 devclass_t sio_devclass;
195 #define com_addr(unit) ((struct com_s *) \
196 devclass_get_softc(sio_devclass, unit))
197
198 static device_method_t sio_isa_methods[] = {
199 /* Device interface */
200 DEVMETHOD(device_probe, sio_isa_probe),
201 DEVMETHOD(device_attach, sio_isa_attach),
202
203 { 0, 0 }
204 };
205
206 static driver_t sio_isa_driver = {
207 driver_name,
208 sio_isa_methods,
209 sizeof(struct com_s),
210 };
211
212 #if NPCI > 0
213 static device_method_t sio_pci_methods[] = {
214 /* Device interface */
215 DEVMETHOD(device_probe, sio_pci_probe),
216 DEVMETHOD(device_attach, sio_pci_attach),
217
218 { 0, 0 }
219 };
220
221 static driver_t sio_pci_driver = {
222 driver_name,
223 sio_pci_methods,
224 sizeof(struct com_s),
225 };
226 #endif /* NPCI > 0 */
227
228 #if NPUC > 0
229 static device_method_t sio_puc_methods[] = {
230 /* Device interface */
231 DEVMETHOD(device_probe, sio_puc_probe),
232 DEVMETHOD(device_attach, sio_puc_attach),
233
234 { 0, 0 }
235 };
236
237 static driver_t sio_puc_driver = {
238 driver_name,
239 sio_puc_methods,
240 sizeof(struct com_s),
241 };
242 #endif /* NPUC > 0 */
243
244 static d_open_t sioopen;
245 static d_close_t sioclose;
246 static d_read_t sioread;
247 static d_write_t siowrite;
248 static d_ioctl_t sioioctl;
249
250 #define CDEV_MAJOR 28
251 static struct dev_ops sio_ops = {
252 { driver_name, CDEV_MAJOR, D_TTY | D_KQFILTER },
253 .d_open = sioopen,
254 .d_close = sioclose,
255 .d_read = sioread,
256 .d_write = siowrite,
257 .d_ioctl = sioioctl,
258 .d_poll = ttypoll,
259 .d_kqfilter = ttykqfilter
260 };
261
262 int comconsole = -1;
263 static volatile speed_t comdefaultrate = CONSPEED;
264 static u_long comdefaultrclk = DEFAULT_RCLK;
265 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
266 static u_int com_events; /* input chars + weighted output completions */
267 static Port_t siocniobase;
268 static int siocnunit;
269 static Port_t siogdbiobase;
270 static int siogdbunit = -1;
271 static bool_t sio_registered;
272 static int sio_timeout;
273 static int sio_timeouts_until_log;
274 static struct callout sio_timeout_handle;
275 static int sio_numunits;
276
277 #ifdef COM_ESP
278 /* XXX configure this properly. */
279 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
280 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
281 #endif
282
283 /*
284 * handle sysctl read/write requests for console speed
285 *
286 * In addition to setting comdefaultrate for I/O through /dev/console,
287 * also set the initial and lock values for the /dev/ttyXX device
288 * if there is one associated with the console. Finally, if the /dev/tty
289 * device has already been open, change the speed on the open running port
290 * itself.
291 */
292
293 static int
294 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
295 {
296 int error;
297 speed_t newspeed;
298 struct com_s *com;
299 struct tty *tp;
300
301 newspeed = comdefaultrate;
302
303 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
304 if (error || !req->newptr)
305 return (error);
306
307 comdefaultrate = newspeed;
308
309 if (comconsole < 0) /* serial console not selected? */
310 return (0);
311
312 com = com_addr(comconsole);
313 if (com == NULL)
314 return (ENXIO);
315
316 /*
317 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
318 * (note, the lock rates really are boolean -- if non-zero, disallow
319 * speed changes)
320 */
321 com->it_in.c_ispeed = com->it_in.c_ospeed =
322 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
323 com->it_out.c_ispeed = com->it_out.c_ospeed =
324 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
325
326 /*
327 * if we're open, change the running rate too
328 */
329 tp = com->tp;
330 if (tp && (tp->t_state & TS_ISOPEN)) {
331 tp->t_termios.c_ispeed =
332 tp->t_termios.c_ospeed = comdefaultrate;
333 crit_enter();
334 error = comparam(tp, &tp->t_termios);
335 crit_exit();
336 }
337 return error;
338 }
339
340 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
341 0, 0, sysctl_machdep_comdefaultrate, "I", "");
342
343 #if NPCI > 0
344 struct pci_ids {
345 u_int32_t type;
346 const char *desc;
347 int rid;
348 };
349
350 static struct pci_ids pci_ids[] = {
351 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
352 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
353 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
354 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
355 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
356 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
357 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
358 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
359 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
360 { 0x00000000, NULL, 0 }
361 };
362
363 static int
364 sio_pci_attach(device_t dev)
365 {
366 u_int32_t type;
367 struct pci_ids *id;
368
369 type = pci_get_devid(dev);
370 id = pci_ids;
371 while (id->type && id->type != type)
372 id++;
373 if (id->desc == NULL)
374 return (ENXIO);
375 sio_pci_kludge_unit(dev);
376 return (sioattach(dev, id->rid, 0UL));
377 }
378
379 /*
380 * Don't cut and paste this to other drivers. It is a horrible kludge
381 * which will fail to work and also be unnecessary in future versions.
382 */
383 static void
384 sio_pci_kludge_unit(device_t dev)
385 {
386 devclass_t dc;
387 int err;
388 int start;
389 int unit;
390
391 unit = 0;
392 start = 0;
393 while (resource_int_value("sio", unit, "port", &start) == 0 &&
394 start > 0)
395 unit++;
396 if (device_get_unit(dev) < unit) {
397 dc = device_get_devclass(dev);
398 while (devclass_get_device(dc, unit))
399 unit++;
400 device_printf(dev, "moving to sio%d\n", unit);
401 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */
402 if (err)
403 device_printf(dev, "error moving device %d\n", err);
404 }
405 }
406
407 static int
408 sio_pci_probe(device_t dev)
409 {
410 u_int32_t type;
411 struct pci_ids *id;
412
413 type = pci_get_devid(dev);
414 id = pci_ids;
415 while (id->type && id->type != type)
416 id++;
417 if (id->desc == NULL)
418 return (ENXIO);
419 device_set_desc(dev, id->desc);
420 return (sioprobe(dev, id->rid, 0UL));
421 }
422 #endif /* NPCI > 0 */
423
424 #if NPUC > 0
425 static int
426 sio_puc_attach(device_t dev)
427 {
428 u_int rclk;
429
430 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
431 &rclk) != 0)
432 rclk = DEFAULT_RCLK;
433 return (sioattach(dev, 0, rclk));
434 }
435
436 static int
437 sio_puc_probe(device_t dev)
438 {
439 u_int rclk;
440
441 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
442 &rclk) != 0)
443 rclk = DEFAULT_RCLK;
444 return (sioprobe(dev, 0, rclk));
445 }
446 #endif /* NPUC */
447
448 static struct isa_pnp_id sio_ids[] = {
449 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
450 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
451 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
452 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
453 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
454 /* Devices that do not have a compatid */
455 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
456 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
457 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */
458 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */
459 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
460 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */
461 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
462 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */
463 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */
464 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */
465 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */
466 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */
467 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */
468 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */
469 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */
470 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */
471 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */
472 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
473 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
474 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */
475 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
476 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */
477 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
478 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */
479 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */
480 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */
481 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
482 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
483 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
484 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
485 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
486 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */
487 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */
488 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */
489 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */
490 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */
491 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
492 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */
493 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */
494 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */
495 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */
496 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
497 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */
498 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */
499 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */
500 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */
501 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */
502 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */
503 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */
504 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */
505 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */
506 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */
507 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */
508 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */
509 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */
510 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */
511 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
512 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */
513 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */
514 {0x11007256, NULL}, /* USR0011 - USR ? */
515 {0x01017256, NULL}, /* USR0101 - USR ? */
516 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
517 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
518 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
519 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */
520 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */
521 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */
522 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */
523 {0x90307256, NULL}, /* USR3090 - USR ? */
524 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */
525 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */
526 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
527 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
528 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */
529 {0}
530 };
531
532
533
534 static int
535 sio_isa_probe(device_t dev)
536 {
537 /* Check isapnp ids */
538 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
539 return (ENXIO);
540 return (sioprobe(dev, 0, 0UL));
541 }
542
543 int
544 sioprobe(device_t dev, int xrid, u_long rclk)
545 {
546 #if 0
547 static bool_t already_init;
548 device_t xdev;
549 #endif
550 struct com_s *com;
551 u_int divisor;
552 bool_t failures[10];
553 int fn;
554 device_t idev;
555 Port_t iobase;
556 intrmask_t irqmap[4];
557 intrmask_t irqs;
558 u_char mcr_image;
559 int result;
560 u_long xirq;
561 u_int flags = device_get_flags(dev);
562 int rid;
563 struct resource *port;
564
565 rid = xrid;
566 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
567 0, ~0, IO_COMSIZE, RF_ACTIVE);
568 if (!port)
569 return (ENXIO);
570
571 com = device_get_softc(dev);
572 com->bst = rman_get_bustag(port);
573 com->bsh = rman_get_bushandle(port);
574 if (rclk == 0)
575 rclk = DEFAULT_RCLK;
576 com->rclk = rclk;
577
578 #if 0
579 /*
580 * XXX this is broken - when we are first called, there are no
581 * previously configured IO ports. We could hard code
582 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
583 * This code has been doing nothing since the conversion since
584 * "count" is zero the first time around.
585 */
586 if (!already_init) {
587 /*
588 * Turn off MCR_IENABLE for all likely serial ports. An unused
589 * port with its MCR_IENABLE gate open will inhibit interrupts
590 * from any used port that shares the interrupt vector.
591 * XXX the gate enable is elsewhere for some multiports.
592 */
593 device_t *devs;
594 int count, i, xioport;
595
596 devclass_get_devices(sio_devclass, &devs, &count);
597 for (i = 0; i < count; i++) {
598 xdev = devs[i];
599 if (device_is_enabled(xdev) &&
600 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
601 NULL) == 0)
602 outb(xioport + com_mcr, 0);
603 }
604 kfree(devs, M_TEMP);
605 already_init = TRUE;
606 }
607 #endif
608
609 if (COM_LLCONSOLE(flags)) {
610 kprintf("sio%d: reserved for low-level i/o\n",
611 device_get_unit(dev));
612 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
613 return (ENXIO);
614 }
615
616 /*
617 * If the device is on a multiport card and has an AST/4
618 * compatible interrupt control register, initialize this
619 * register and prepare to leave MCR_IENABLE clear in the mcr.
620 * Otherwise, prepare to set MCR_IENABLE in the mcr.
621 * Point idev to the device struct giving the correct id_irq.
622 * This is the struct for the master device if there is one.
623 */
624 idev = dev;
625 mcr_image = MCR_IENABLE;
626 #ifdef COM_MULTIPORT
627 if (COM_ISMULTIPORT(flags)) {
628 Port_t xiobase;
629 u_long io;
630
631 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
632 if (idev == NULL) {
633 kprintf("sio%d: master device %d not configured\n",
634 device_get_unit(dev), COM_MPMASTER(flags));
635 idev = dev;
636 }
637 if (!COM_NOTAST4(flags)) {
638 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
639 NULL) == 0) {
640 xiobase = io;
641 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
642 NULL, NULL) == 0)
643 outb(xiobase + com_scr, 0x80);
644 else
645 outb(xiobase + com_scr, 0);
646 }
647 mcr_image = 0;
648 }
649 }
650 #endif /* COM_MULTIPORT */
651 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
652 mcr_image = 0;
653
654 bzero(failures, sizeof failures);
655 iobase = rman_get_start(port);
656
657 /*
658 * We don't want to get actual interrupts, just masked ones.
659 * Interrupts from this line should already be masked in the ICU,
660 * but mask them in the processor as well in case there are some
661 * (misconfigured) shared interrupts.
662 */
663 com_lock();
664 /* EXTRA DELAY? */
665
666 /*
667 * For the TI16754 chips, set prescaler to 1 (4 is often the
668 * default after-reset value) as otherwise it's impossible to
669 * get highest baudrates.
670 */
671 if (COM_TI16754(flags)) {
672 u_char cfcr, efr;
673
674 cfcr = sio_getreg(com, com_cfcr);
675 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
676 efr = sio_getreg(com, com_efr);
677 /* Unlock extended features to turn off prescaler. */
678 sio_setreg(com, com_efr, efr | EFR_EFE);
679 /* Disable EFR. */
680 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
681 /* Turn off prescaler. */
682 sio_setreg(com, com_mcr,
683 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
684 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
685 sio_setreg(com, com_efr, efr);
686 sio_setreg(com, com_cfcr, cfcr);
687 }
688
689 /*
690 * Initialize the speed and the word size and wait long enough to
691 * drain the maximum of 16 bytes of junk in device output queues.
692 * The speed is undefined after a master reset and must be set
693 * before relying on anything related to output. There may be
694 * junk after a (very fast) soft reboot and (apparently) after
695 * master reset.
696 * XXX what about the UART bug avoided by waiting in comparam()?
697 * We don't want to to wait long enough to drain at 2 bps.
698 */
699 if (iobase == siocniobase) {
700 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
701 } else {
702 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
703 divisor = siodivisor(rclk, SIO_TEST_SPEED);
704 sio_setreg(com, com_dlbl, divisor & 0xff);
705 sio_setreg(com, com_dlbh, divisor >> 8);
706 sio_setreg(com, com_cfcr, CFCR_8BITS);
707 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
708 }
709
710 /*
711 * Make sure we can drain the receiver. If we can't, the serial
712 * port may not exist.
713 */
714 for (fn = 0; fn < 256; ++fn) {
715 if ((sio_getreg(com, com_lsr) & LSR_RXRDY) == 0)
716 break;
717 (void)sio_getreg(com, com_data);
718 }
719 if (fn == 256) {
720 kprintf("sio%d: can't drain, serial port might "
721 "not exist, disabling\n", device_get_unit(dev));
722 com_unlock();
723 return (ENXIO);
724 }
725
726 /*
727 * Enable the interrupt gate and disable device interupts. This
728 * should leave the device driving the interrupt line low and
729 * guarantee an edge trigger if an interrupt can be generated.
730 */
731 /* EXTRA DELAY? */
732 sio_setreg(com, com_mcr, mcr_image);
733 sio_setreg(com, com_ier, 0);
734 DELAY(1000); /* XXX */
735 irqmap[0] = isa_irq_pending();
736
737 /*
738 * Attempt to set loopback mode so that we can send a null byte
739 * without annoying any external device.
740 */
741 /* EXTRA DELAY? */
742 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
743
744 /*
745 * Attempt to generate an output interrupt. On 8250's, setting
746 * IER_ETXRDY generates an interrupt independent of the current
747 * setting and independent of whether the THR is empty. On 16450's,
748 * setting IER_ETXRDY generates an interrupt independent of the
749 * current setting. On 16550A's, setting IER_ETXRDY only
750 * generates an interrupt when IER_ETXRDY is not already set.
751 */
752 sio_setreg(com, com_ier, IER_ETXRDY);
753
754 /*
755 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
756 * an interrupt. They'd better generate one for actually doing
757 * output. Loopback may be broken on the same incompatibles but
758 * it's unlikely to do more than allow the null byte out.
759 */
760 sio_setreg(com, com_data, 0);
761 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
762
763 /*
764 * Turn off loopback mode so that the interrupt gate works again
765 * (MCR_IENABLE was hidden). This should leave the device driving
766 * an interrupt line high. It doesn't matter if the interrupt
767 * line oscillates while we are not looking at it, since interrupts
768 * are disabled.
769 */
770 /* EXTRA DELAY? */
771 sio_setreg(com, com_mcr, mcr_image);
772
773 /*
774 * Some pcmcia cards have the "TXRDY bug", so we check everyone
775 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
776 */
777 if (COM_NOPROBE(flags)) {
778 /* Reading IIR register twice */
779 for (fn = 0; fn < 2; fn ++) {
780 DELAY(10000);
781 failures[6] = sio_getreg(com, com_iir);
782 }
783 /* Check IIR_TXRDY clear ? */
784 result = 0;
785 if (failures[6] & IIR_TXRDY) {
786 /* Nop, Double check with clearing IER */
787 sio_setreg(com, com_ier, 0);
788 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
789 /* Ok. we're familia this gang */
790 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
791 } else {
792 /* Unknown, Just omit this chip.. XXX */
793 result = ENXIO;
794 sio_setreg(com, com_mcr, 0);
795 }
796 } else {
797 /* OK. this is well-known guys */
798 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
799 }
800 sio_setreg(com, com_ier, 0);
801 sio_setreg(com, com_cfcr, CFCR_8BITS);
802 com_unlock();
803 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
804 return (iobase == siocniobase ? 0 : result);
805 }
806
807 /*
808 * Check that
809 * o the CFCR, IER and MCR in UART hold the values written to them
810 * (the values happen to be all distinct - this is good for
811 * avoiding false positive tests from bus echoes).
812 * o an output interrupt is generated and its vector is correct.
813 * o the interrupt goes away when the IIR in the UART is read.
814 */
815 /* EXTRA DELAY? */
816 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
817 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
818 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
819 DELAY(10000); /* Some internal modems need this time */
820 irqmap[1] = isa_irq_pending();
821 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
822 DELAY(1000); /* XXX */
823 irqmap[2] = isa_irq_pending();
824 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
825
826 /*
827 * Turn off all device interrupts and check that they go off properly.
828 * Leave MCR_IENABLE alone. For ports without a master port, it gates
829 * the OUT2 output of the UART to
830 * the ICU input. Closing the gate would give a floating ICU input
831 * (unless there is another device driving it) and spurious interrupts.
832 * (On the system that this was first tested on, the input floats high
833 * and gives a (masked) interrupt as soon as the gate is closed.)
834 */
835 sio_setreg(com, com_ier, 0);
836 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
837 failures[7] = sio_getreg(com, com_ier);
838 DELAY(1000); /* XXX */
839 irqmap[3] = isa_irq_pending();
840 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
841
842 com_unlock();
843
844 irqs = irqmap[1] & ~irqmap[0];
845 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
846 ((1 << xirq) & irqs) == 0)
847 kprintf(
848 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
849 device_get_unit(dev), xirq, irqs);
850 if (bootverbose)
851 kprintf("sio%d: irq maps: %#x %#x %#x %#x\n",
852 device_get_unit(dev),
853 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
854
855 result = 0;
856 for (fn = 0; fn < sizeof failures; ++fn)
857 if (failures[fn]) {
858 sio_setreg(com, com_mcr, 0);
859 result = ENXIO;
860 if (bootverbose) {
861 kprintf("sio%d: probe failed test(s):",
862 device_get_unit(dev));
863 for (fn = 0; fn < sizeof failures; ++fn)
864 if (failures[fn])
865 kprintf(" %d", fn);
866 kprintf("\n");
867 }
868 break;
869 }
870 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
871 return (iobase == siocniobase ? 0 : result);
872 }
873
874 #ifdef COM_ESP
875 static int
876 espattach(struct com_s *com, Port_t esp_port)
877 {
878 u_char dips;
879 u_char val;
880
881 /*
882 * Check the ESP-specific I/O port to see if we're an ESP
883 * card. If not, return failure immediately.
884 */
885 if ((inb(esp_port) & 0xf3) == 0) {
886 kprintf(" port 0x%x is not an ESP board?\n", esp_port);
887 return (0);
888 }
889
890 /*
891 * We've got something that claims to be a Hayes ESP card.
892 * Let's hope so.
893 */
894
895 /* Get the dip-switch configuration */
896 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
897 dips = inb(esp_port + ESP_STATUS1);
898
899 /*
900 * Bits 0,1 of dips say which COM port we are.
901 */
902 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
903 kprintf(" : ESP");
904 else {
905 kprintf(" esp_port has com %d\n", dips & 0x03);
906 return (0);
907 }
908
909 /*
910 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
911 */
912 outb(esp_port + ESP_CMD1, ESP_GETTEST);
913 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
914 val = inb(esp_port + ESP_STATUS2);
915 if ((val & 0x70) < 0x20) {
916 kprintf("-old (%o)", val & 0x70);
917 return (0);
918 }
919
920 /*
921 * Check for ability to emulate 16550: bit 7 == 1
922 */
923 if ((dips & 0x80) == 0) {
924 kprintf(" slave");
925 return (0);
926 }
927
928 /*
929 * Okay, we seem to be a Hayes ESP card. Whee.
930 */
931 com->esp = TRUE;
932 com->esp_port = esp_port;
933 return (1);
934 }
935 #endif /* COM_ESP */
936
937 static int
938 sio_isa_attach(device_t dev)
939 {
940 return (sioattach(dev, 0, 0UL));
941 }
942
943 int
944 sioattach(device_t dev, int xrid, u_long rclk)
945 {
946 struct com_s *com;
947 #ifdef COM_ESP
948 Port_t *espp;
949 #endif
950 Port_t iobase;
951 int minorbase;
952 int unit;
953 u_int flags;
954 int rid;
955 struct resource *port;
956 int ret;
957 static int did_init;
958
959 if (did_init == 0) {
960 did_init = 1;
961 callout_init(&sio_timeout_handle);
962 }
963
964 rid = xrid;
965 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
966 0, ~0, IO_COMSIZE, RF_ACTIVE);
967 if (!port)
968 return (ENXIO);
969
970 iobase = rman_get_start(port);
971 unit = device_get_unit(dev);
972 com = device_get_softc(dev);
973 flags = device_get_flags(dev);
974
975 if (unit >= sio_numunits)
976 sio_numunits = unit + 1;
977 /*
978 * sioprobe() has initialized the device registers as follows:
979 * o cfcr = CFCR_8BITS.
980 * It is most important that CFCR_DLAB is off, so that the
981 * data port is not hidden when we enable interrupts.
982 * o ier = 0.
983 * Interrupts are only enabled when the line is open.
984 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
985 * interrupt control register or the config specifies no irq.
986 * Keeping MCR_DTR and MCR_RTS off might stop the external
987 * device from sending before we are ready.
988 */
989 bzero(com, sizeof *com);
990 com->unit = unit;
991 com->ioportres = port;
992 com->bst = rman_get_bustag(port);
993 com->bsh = rman_get_bushandle(port);
994 com->cfcr_image = CFCR_8BITS;
995 com->dtr_wait = 3 * hz;
996 callout_init(&com->dtr_ch);
997 callout_init(&com->busy_ch);
998 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
999 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1000 com->tx_fifo_size = 1;
1001 com->obufs[0].l_head = com->obuf1;
1002 com->obufs[1].l_head = com->obuf2;
1003
1004 com->data_port = iobase + com_data;
1005 com->int_id_port = iobase + com_iir;
1006 com->modem_ctl_port = iobase + com_mcr;
1007 com->mcr_image = inb(com->modem_ctl_port);
1008 com->line_status_port = iobase + com_lsr;
1009 com->modem_status_port = iobase + com_msr;
1010 com->intr_ctl_port = iobase + com_ier;
1011
1012 if (rclk == 0)
1013 rclk = DEFAULT_RCLK;
1014 com->rclk = rclk;
1015
1016 /*
1017 * We don't use all the flags from <sys/ttydefaults.h> since they
1018 * are only relevant for logins. It's important to have echo off
1019 * initially so that the line doesn't start blathering before the
1020 * echo flag can be turned off.
1021 */
1022 com->it_in.c_iflag = 0;
1023 com->it_in.c_oflag = 0;
1024 com->it_in.c_cflag = TTYDEF_CFLAG;
1025 com->it_in.c_lflag = 0;
1026 if (unit == comconsole) {
1027 com->it_in.c_iflag = TTYDEF_IFLAG;
1028 com->it_in.c_oflag = TTYDEF_OFLAG;
1029 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1030 com->it_in.c_lflag = TTYDEF_LFLAG;
1031 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1032 com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1033 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1034 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1035 } else
1036 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1037 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1038 com_unlock();
1039 /*
1040 * Leave i/o resources allocated if this is a `cn'-level
1041 * console, so that other devices can't snarf them.
1042 */
1043 if (iobase != siocniobase)
1044 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1045 return (ENOMEM);
1046 }
1047 com_unlock();
1048 termioschars(&com->it_in);
1049 com->it_out = com->it_in;
1050
1051 /* attempt to determine UART type */
1052 kprintf("sio%d: type", unit);
1053
1054
1055 #ifdef COM_MULTIPORT
1056 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1057 #else
1058 if (!COM_IIR_TXRDYBUG(flags))
1059 #endif
1060 {
1061 u_char scr;
1062 u_char scr1;
1063 u_char scr2;
1064
1065 scr = sio_getreg(com, com_scr);
1066 sio_setreg(com, com_scr, 0xa5);
1067 scr1 = sio_getreg(com, com_scr);
1068 sio_setreg(com, com_scr, 0x5a);
1069 scr2 = sio_getreg(com, com_scr);
1070 sio_setreg(com, com_scr, scr);
1071 if (scr1 != 0xa5 || scr2 != 0x5a) {
1072 kprintf(" 8250");
1073 goto determined_type;
1074 }
1075 }
1076 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1077 DELAY(100);
1078 com->st16650a = 0;
1079 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1080 case FIFO_RX_LOW:
1081 kprintf(" 16450");
1082 break;
1083 case FIFO_RX_MEDL:
1084 kprintf(" 16450?");
1085 break;
1086 case FIFO_RX_MEDH:
1087 kprintf(" 16550?");
1088 break;
1089 case FIFO_RX_HIGH:
1090 if (COM_NOFIFO(flags)) {
1091 kprintf(" 16550A fifo disabled");
1092 } else {
1093 com->hasfifo = TRUE;
1094 if (COM_ST16650A(flags)) {
1095 com->st16650a = 1;
1096 com->tx_fifo_size = 32;
1097 kprintf(" ST16650A");
1098 } else if (COM_TI16754(flags)) {
1099 com->tx_fifo_size = 64;
1100 kprintf(" TI16754");
1101 } else {
1102 com->tx_fifo_size = COM_FIFOSIZE(flags);
1103 kprintf(" 16550A");
1104 }
1105 }
1106 #ifdef COM_ESP
1107 for (espp = likely_esp_ports; *espp != 0; espp++)
1108 if (espattach(com, *espp)) {
1109 com->tx_fifo_size = 1024;
1110 break;
1111 }
1112 #endif
1113 if (!com->st16650a && !COM_TI16754(flags)) {
1114 if (!com->tx_fifo_size)
1115 com->tx_fifo_size = 16;
1116 else
1117 kprintf(" lookalike with %d bytes FIFO",
1118 com->tx_fifo_size);
1119 }
1120
1121 break;
1122 }
1123
1124 #ifdef COM_ESP
1125 if (com->esp) {
1126 /*
1127 * Set 16550 compatibility mode.
1128 * We don't use the ESP_MODE_SCALE bit to increase the
1129 * fifo trigger levels because we can't handle large
1130 * bursts of input.
1131 * XXX flow control should be set in comparam(), not here.
1132 */
1133 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1134 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1135
1136 /* Set RTS/CTS flow control. */
1137 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1138 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1139 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1140
1141 /* Set flow-control levels. */
1142 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1143 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1144 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1145 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1146 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1147 }
1148 #endif /* COM_ESP */
1149 sio_setreg(com, com_fifo, 0);
1150 determined_type: ;
1151
1152 #ifdef COM_MULTIPORT
1153 if (COM_ISMULTIPORT(flags)) {
1154 device_t masterdev;
1155
1156 com->multiport = TRUE;
1157 kprintf(" (multiport");
1158 if (unit == COM_MPMASTER(flags))
1159 kprintf(" master");
1160 kprintf(")");
1161 masterdev = devclass_get_device(sio_devclass,
1162 COM_MPMASTER(flags));
1163 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1164 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1165 }
1166 #endif /* COM_MULTIPORT */
1167 if (unit == comconsole)
1168 kprintf(", console");
1169 if (COM_IIR_TXRDYBUG(flags))
1170 kprintf(" with a bogus IIR_TXRDY register");
1171 kprintf("\n");
1172
1173 if (!sio_registered) {
1174 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll", NULL);
1175 sio_registered = TRUE;
1176 }
1177 minorbase = UNIT_TO_MINOR(unit);
1178 dev_ops_add(&sio_ops, UNIT_TO_MINOR(-1), minorbase);
1179 make_dev(&sio_ops, minorbase,
1180 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1181 make_dev(&sio_ops, minorbase | CONTROL_INIT_STATE,
1182 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1183 make_dev(&sio_ops, minorbase | CONTROL_LOCK_STATE,
1184 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1185 make_dev(&sio_ops, minorbase | CALLOUT_MASK,
1186 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1187 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1188 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1189 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1190 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1191 com->flags = flags;
1192 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1193 pps_init(&com->pps);
1194
1195 rid = 0;
1196 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1197 RF_ACTIVE);
1198 if (com->irqres) {
1199 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1200 INTR_FAST, siointr, com,
1201 &com->cookie, NULL);
1202 if (ret) {
1203 ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1204 com->irqres, 0, siointr, com,
1205 &com->cookie, NULL);
1206 if (ret == 0)
1207 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1208 }
1209 if (ret)
1210 device_printf(dev, "could not activate interrupt\n");
1211 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1212 defined(ALT_BREAK_TO_DEBUGGER))
1213 /*
1214 * Enable interrupts for early break-to-debugger support
1215 * on the console.
1216 */
1217 if (ret == 0 && unit == comconsole)
1218 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1219 IER_EMSC);
1220 #endif
1221 }
1222
1223 return (0);
1224 }
1225
1226 static int
1227 sioopen(struct dev_open_args *ap)
1228 {
1229 cdev_t dev = ap->a_head.a_dev;
1230 struct com_s *com;
1231 int error;
1232 int mynor;
1233 struct tty *tp;
1234 int unit;
1235
1236 mynor = minor(dev);
1237 unit = MINOR_TO_UNIT(mynor);
1238 com = com_addr(unit);
1239 if (com == NULL)
1240 return (ENXIO);
1241 if (com->gone)
1242 return (ENXIO);
1243 if (mynor & CONTROL_MASK)
1244 return (0);
1245 tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1246 crit_enter();
1247 /*
1248 * We jump to this label after all non-interrupted sleeps to pick
1249 * up any changes of the device state.
1250 */
1251 open_top:
1252 while (com->state & CS_DTR_OFF) {
1253 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0);
1254 if (com_addr(unit) == NULL) {
1255 crit_exit();
1256 return (ENXIO);
1257 }
1258 if (error != 0 || com->gone)
1259 goto out;
1260 }
1261 if (tp->t_state & TS_ISOPEN) {
1262 /*
1263 * The device is open, so everything has been initialized.
1264 * Handle conflicts.
1265 */
1266 if (mynor & CALLOUT_MASK) {
1267 if (!com->active_out) {
1268 error = EBUSY;
1269 goto out;
1270 }
1271 } else {
1272 if (com->active_out) {
1273 if (ap->a_oflags & O_NONBLOCK) {
1274 error = EBUSY;
1275 goto out;
1276 }
1277 error = tsleep(&com->active_out,
1278 PCATCH, "siobi", 0);
1279 if (com_addr(unit) == NULL) {
1280 crit_exit();
1281 return (ENXIO);
1282 }
1283 if (error != 0 || com->gone)
1284 goto out;
1285 goto open_top;
1286 }
1287 }
1288 if (tp->t_state & TS_XCLUDE && suser_cred(ap->a_cred, 0)) {
1289 error = EBUSY;
1290 goto out;
1291 }
1292 } else {
1293 /*
1294 * The device isn't open, so there are no conflicts.
1295 * Initialize it. Initialization is done twice in many
1296 * cases: to preempt sleeping callin opens if we are
1297 * callout, and to complete a callin open after DCD rises.
1298 */
1299 tp->t_oproc = comstart;
1300 tp->t_param = comparam;
1301 tp->t_stop = comstop;
1302 tp->t_dev = dev;
1303 tp->t_termios = mynor & CALLOUT_MASK
1304 ? com->it_out : com->it_in;
1305 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1306 com->poll = com->no_irq;
1307 com->poll_output = com->loses_outints;
1308 ++com->wopeners;
1309 error = comparam(tp, &tp->t_termios);
1310 --com->wopeners;
1311 if (error != 0)
1312 goto out;
1313 /*
1314 * XXX we should goto open_top if comparam() slept.
1315 */
1316 if (com->hasfifo) {
1317 /*
1318 * (Re)enable and drain fifos.
1319 *
1320 * Certain SMC chips cause problems if the fifos
1321 * are enabled while input is ready. Turn off the
1322 * fifo if necessary to clear the input. We test
1323 * the input ready bit after enabling the fifos
1324 * since we've already enabled them in comparam()
1325 * and to handle races between enabling and fresh
1326 * input.
1327 */
1328 while (TRUE) {
1329 sio_setreg(com, com_fifo,
1330 FIFO_RCV_RST | FIFO_XMT_RST
1331 | com->fifo_image);
1332 /*
1333 * XXX the delays are for superstitious
1334 * historical reasons. It must be less than
1335 * the character time at the maximum
1336 * supported speed (87 usec at 115200 bps
1337 * 8N1). Otherwise we might loop endlessly
1338 * if data is streaming in. We used to use
1339 * delays of 100. That usually worked
1340 * because DELAY(100) used to usually delay
1341 * for about 85 usec instead of 100.
1342 */
1343 DELAY(50);
1344 if (!(inb(com->line_status_port) & LSR_RXRDY))
1345 break;
1346 sio_setreg(com, com_fifo, 0);
1347 DELAY(50);
1348 (void) inb(com->data_port);
1349 }
1350 }
1351
1352 com_lock();
1353 (void) inb(com->line_status_port);
1354 (void) inb(com->data_port);
1355 com->prev_modem_status = com->last_modem_status
1356 = inb(com->modem_status_port);
1357 if (COM_IIR_TXRDYBUG(com->flags)) {
1358 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1359 | IER_EMSC);
1360 } else {
1361 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1362 | IER_ERLS | IER_EMSC);
1363 }
1364 com_unlock();
1365 /*
1366 * Handle initial DCD. Callout devices get a fake initial
1367 * DCD (trapdoor DCD). If we are callout, then any sleeping
1368 * callin opens get woken up and resume sleeping on "siobi"
1369 * instead of "siodcd".
1370 */
1371 /*
1372 * XXX `mynor & CALLOUT_MASK' should be
1373 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1374 * TRAPDOOR_CARRIER is the default initial state for callout
1375 * devices and SOFT_CARRIER is like CLOCAL except it hides
1376 * the true carrier.
1377 */
1378 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1379 (*linesw[tp->t_line].l_modem)(tp, 1);
1380 }
1381 /*
1382 * Wait for DCD if necessary.
1383 */
1384 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1385 && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) {
1386 ++com->wopeners;
1387 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0);
1388 if (com_addr(unit) == NULL) {
1389 crit_exit();
1390 return (ENXIO);
1391 }
1392 --com->wopeners;
1393 if (error != 0 || com->gone)
1394 goto out;
1395 goto open_top;
1396 }
1397 error = (*linesw[tp->t_line].l_open)(dev, tp);
1398 disc_optim(tp, &tp->t_termios, com);
1399 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1400 com->active_out = TRUE;
1401 siosettimeout();
1402 out:
1403 crit_exit();
1404 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1405 comhardclose(com);
1406 return (error);
1407 }
1408
1409 static int
1410 sioclose(struct dev_close_args *ap)
1411 {
1412 cdev_t dev = ap->a_head.a_dev;
1413 struct com_s *com;
1414 int mynor;
1415 struct tty *tp;
1416
1417 mynor = minor(dev);
1418 if (mynor & CONTROL_MASK)
1419 return (0);
1420 com = com_addr(MINOR_TO_UNIT(mynor));
1421 if (com == NULL)
1422 return (ENODEV);
1423 tp = com->tp;
1424 crit_enter();
1425 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
1426 disc_optim(tp, &tp->t_termios, com);
1427 comstop(tp, FREAD | FWRITE);
1428 comhardclose(com);
1429 ttyclose(tp);
1430 siosettimeout();
1431 crit_exit();
1432 if (com->gone) {
1433 kprintf("sio%d: gone\n", com->unit);
1434 crit_enter();
1435 if (com->ibuf != NULL)
1436 kfree(com->ibuf, M_DEVBUF);
1437 bzero(tp, sizeof *tp);
1438 crit_exit();
1439 }
1440 return (0);
1441 }
1442
1443 static void
1444 comhardclose(struct com_s *com)
1445 {
1446 struct tty *tp;
1447 int unit;
1448
1449 unit = com->unit;
1450 crit_enter();
1451 com->poll = FALSE;
1452 com->poll_output = FALSE;
1453 com->do_timestamp = FALSE;
1454 com->do_dcd_timestamp = FALSE;
1455 com->pps.ppsparam.mode = 0;
1456 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1457 tp = com->tp;
1458
1459 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1460 defined(ALT_BREAK_TO_DEBUGGER))
1461 /*
1462 * Leave interrupts enabled and don't clear DTR if this is the
1463 * console. This allows us to detect break-to-debugger events
1464 * while the console device is closed.
1465 */
1466 if (com->unit != comconsole)
1467 #endif
1468 {
1469 sio_setreg(com, com_ier, 0);
1470 if (tp->t_cflag & HUPCL
1471 /*
1472 * XXX we will miss any carrier drop between here and the
1473 * next open. Perhaps we should watch DCD even when the
1474 * port is closed; it is not sufficient to check it at
1475 * the next open because it might go up and down while
1476 * we're not watching.
1477 */
1478 || (!com->active_out
1479 && !(com->prev_modem_status & MSR_DCD)
1480 && !(com->it_in.c_cflag & CLOCAL))
1481 || !(tp->t_state & TS_ISOPEN)) {
1482 (void)commctl(com, TIOCM_DTR, DMBIC);
1483 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1484 callout_reset(&com->dtr_ch, com->dtr_wait,
1485 siodtrwakeup, com);
1486 com->state |= CS_DTR_OFF;
1487 }
1488 }
1489 }
1490 if (com->hasfifo) {
1491 /*
1492 * Disable fifos so that they are off after controlled
1493 * reboots. Some BIOSes fail to detect 16550s when the
1494 * fifos are enabled.
1495 */
1496 sio_setreg(com, com_fifo, 0);
1497 }
1498 com->active_out = FALSE;
1499 wakeup(&com->active_out);
1500 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1501 crit_exit();
1502 }
1503
1504 static int
1505 sioread(struct dev_read_args *ap)
1506 {
1507 cdev_t dev = ap->a_head.a_dev;
1508 int mynor;
1509 struct com_s *com;
1510
1511 mynor = minor(dev);
1512 if (mynor & CONTROL_MASK)
1513 return (ENODEV);
1514 com = com_addr(MINOR_TO_UNIT(mynor));
1515 if (com == NULL || com->gone)
1516 return (ENODEV);
1517 return ((*linesw[com->tp->t_line].l_read)(com->tp, ap->a_uio, ap->a_ioflag));
1518 }
1519
1520 static int
1521 siowrite(struct dev_write_args *ap)
1522 {
1523 cdev_t dev = ap->a_head.a_dev;
1524 int mynor;
1525 struct com_s *com;
1526 int unit;
1527
1528 mynor = minor(dev);
1529 if (mynor & CONTROL_MASK)
1530 return (ENODEV);
1531
1532 unit = MINOR_TO_UNIT(mynor);
1533 com = com_addr(unit);
1534 if (com == NULL || com->gone)
1535 return (ENODEV);
1536 /*
1537 * (XXX) We disallow virtual consoles if the physical console is
1538 * a serial port. This is in case there is a display attached that
1539 * is not the console. In that situation we don't need/want the X
1540 * server taking over the console.
1541 */
1542 if (constty != NULL && unit == comconsole)
1543 constty = NULL;
1544 return ((*linesw[com->tp->t_line].l_write)(com->tp, ap->a_uio, ap->a_ioflag));
1545 }
1546
1547 static void
1548 siobusycheck(void *chan)
1549 {
1550 struct com_s *com;
1551
1552 com = (struct com_s *)chan;
1553
1554 /*
1555 * Clear TS_BUSY if low-level output is complete.
1556 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1557 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1558 * called again. Reading the line status port outside of siointr1()
1559 * is safe because CS_BUSY is clear so there are no output interrupts
1560 * to lose.
1561 */
1562 crit_enter();
1563 if (com->state & CS_BUSY)
1564 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1565 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1566 == (LSR_TSRE | LSR_TXRDY)) {
1567 com->tp->t_state &= ~TS_BUSY;
1568 ttwwakeup(com->tp);
1569 com->extra_state &= ~CSE_BUSYCHECK;
1570 } else {
1571 callout_reset(&com->busy_ch, hz / 100, siobusycheck, com);
1572 }
1573 crit_exit();
1574 }
1575
1576 static u_int
1577 siodivisor(u_long rclk, speed_t speed)
1578 {
1579 long actual_speed;
1580 u_int divisor;
1581 int error;
1582
1583 if (speed == 0 || speed > (ULONG_MAX - 1) / 8)
1584 return (0);
1585 divisor = (rclk / (8UL * speed) + 1) / 2;
1586 if (divisor == 0 || divisor >= 65536)
1587 return (0);
1588 actual_speed = rclk / (16UL * divisor);
1589
1590 /* 10 times error in percent: */
1591 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1592
1593 /* 3.0% maximum error tolerance: */
1594 if (error < -30 || error > 30)
1595 return (0);
1596
1597 return (divisor);
1598 }
1599
1600 static void
1601 siodtrwakeup(void *chan)
1602 {
1603 struct com_s *com;
1604
1605 com = (struct com_s *)chan;
1606 com->state &= ~CS_DTR_OFF;
1607 wakeup(&com->dtr_wait);
1608 }
1609
1610 static void
1611 sioinput(struct com_s *com)
1612 {
1613 u_char *buf;
1614 int incc;
1615 u_char line_status;
1616 int recv_data;
1617 struct tty *tp;
1618
1619 buf = com->ibuf;
1620 tp = com->tp;
1621 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1622 com_events -= (com->iptr - com->ibuf);
1623 com->iptr = com->ibuf;
1624 return;
1625 }
1626 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1627 /*
1628 * Avoid the grotesquely inefficient lineswitch routine
1629 * (ttyinput) in "raw" mode. It usually takes about 450
1630 * instructions (that's without canonical processing or echo!).
1631 * slinput is reasonably fast (usually 40 instructions plus
1632 * call overhead).
1633 */
1634 do {
1635 com_unlock();
1636 incc = com->iptr - buf;
1637 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1638 && (com->state & CS_RTS_IFLOW
1639 || tp->t_iflag & IXOFF)
1640 && !(tp->t_state & TS_TBLOCK))
1641 ttyblock(tp);
1642 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1643 += b_to_q((char *)buf, incc, &tp->t_rawq);
1644 buf += incc;
1645 tk_nin += incc;
1646 tk_rawcc += incc;
1647 tp->t_rawcc += incc;
1648 ttwakeup(tp);
1649 if (tp->t_state & TS_TTSTOP
1650 && (tp->t_iflag & IXANY
1651 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1652 tp->t_state &= ~TS_TTSTOP;
1653 tp->t_lflag &= ~FLUSHO;
1654 comstart(tp);
1655 }
1656 com_lock();
1657 } while (buf < com->iptr);
1658 } else {
1659 do {
1660 com_unlock();
1661 line_status = buf[com->ierroff];
1662 recv_data = *buf++;
1663 if (line_status
1664 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1665 if (line_status & LSR_BI)
1666 recv_data |= TTY_BI;
1667 if (line_status & LSR_FE)
1668 recv_data |= TTY_FE;
1669 if (line_status & LSR_OE)
1670 recv_data |= TTY_OE;
1671 if (line_status & LSR_PE)
1672 recv_data |= TTY_PE;
1673 }
1674 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1675 com_lock();
1676 } while (buf < com->iptr);
1677 }
1678 com_events -= (com->iptr - com->ibuf);
1679 com->iptr = com->ibuf;
1680
1681 /*
1682 * There is now room for another low-level buffer full of input,
1683 * so enable RTS if it is now disabled and there is room in the
1684 * high-level buffer.
1685 */
1686 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1687 !(tp->t_state & TS_TBLOCK))
1688 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1689 }
1690
1691 void
1692 siointr(void *arg)
1693 {
1694 #ifndef COM_MULTIPORT
1695 com_lock();
1696 siointr1((struct com_s *) arg);
1697 com_unlock();
1698 #else /* COM_MULTIPORT */
1699 bool_t possibly_more_intrs;
1700 int unit;
1701 struct com_s *com;
1702
1703 /*
1704 * Loop until there is no activity on any port. This is necessary
1705 * to get an interrupt edge more than to avoid another interrupt.
1706 * If the IRQ signal is just an OR of the IRQ signals from several
1707 * devices, then the edge from one may be lost because another is
1708 * on.
1709 */
1710 com_lock();
1711 do {
1712 possibly_more_intrs = FALSE;
1713 for (unit = 0; unit < sio_numunits; ++unit) {
1714 com = com_addr(unit);
1715 /*
1716 * XXX com_lock();
1717 * would it work here, or be counter-productive?
1718 */
1719 if (com != NULL
1720 && !com->gone
1721 && (inb(com->int_id_port) & IIR_IMASK)
1722 != IIR_NOPEND) {
1723 siointr1(com);
1724 possibly_more_intrs = TRUE;
1725 }
1726 /* XXX com_unlock(); */
1727 }
1728 } while (possibly_more_intrs);
1729 com_unlock();
1730 #endif /* COM_MULTIPORT */
1731 }
1732
1733 static void
1734 siointr1(struct com_s *com)
1735 {
1736 u_char line_status;
1737 u_char modem_status;
1738 u_char *ioptr;
1739 u_char recv_data;
1740 u_char int_ctl;
1741 u_char int_ctl_new;
1742 u_int count;
1743
1744 int_ctl = inb(com->intr_ctl_port);
1745 int_ctl_new = int_ctl;
1746
1747 while (!com->gone) {
1748 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1749 modem_status = inb(com->modem_status_port);
1750 if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1751 count = sys_cputimer->count();
1752 pps_event(&com->pps, count,
1753 (modem_status & MSR_DCD) ?
1754 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1755 }
1756 }
1757 line_status = inb(com->line_status_port);
1758
1759 /* input event? (check first to help avoid overruns) */
1760 while (line_status & LSR_RCV_MASK) {
1761 /* break/unnattached error bits or real input? */
1762 if (!(line_status & LSR_RXRDY))
1763 recv_data = 0;
1764 else
1765 recv_data = inb(com->data_port);
1766 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1767 /*
1768 * Solaris implements a new BREAK which is initiated
1769 * by a character sequence CR ~ ^b which is similar
1770 * to a familiar pattern used on Sun servers by the
1771 * Remote Console.
1772 */
1773 #define KEY_CRTLB 2 /* ^B */
1774 #define KEY_CR 13 /* CR '\r' */
1775 #define KEY_TILDE 126 /* ~ */
1776
1777 if (com->unit == comconsole) {
1778 static int brk_state1 = 0, brk_state2 = 0;
1779 if (recv_data == KEY_CR) {
1780 brk_state1 = recv_data;
1781 brk_state2 = 0;
1782 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) {
1783 if (recv_data == KEY_TILDE)
1784 brk_state2 = recv_data;
1785 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) {
1786 breakpoint();
1787 brk_state1 = brk_state2 = 0;
1788 goto cont;
1789 } else
1790 brk_state2 = 0;
1791 } else
1792 brk_state1 = 0;
1793 }
1794 #endif
1795 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1796 /*
1797 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1798 * Otherwise, push the work to a higher level
1799 * (to handle PARMRK) if we're bypassing.
1800 * Otherwise, convert BI/FE and PE+INPCK to 0.
1801 *
1802 * This makes bypassing work right in the
1803 * usual "raw" case (IGNBRK set, and IGNPAR
1804 * and INPCK clear).
1805 *
1806 * Note: BI together with FE/PE means just BI.
1807 */
1808 if (line_status & LSR_BI) {
1809 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1810 if (com->unit == comconsole) {
1811 breakpoint();
1812 goto cont;
1813 }
1814 #endif
1815 if (com->tp == NULL
1816 || com->tp->t_iflag & IGNBRK)
1817 goto cont;
1818 } else {
1819 if (com->tp == NULL
1820 || com->tp->t_iflag & IGNPAR)
1821 goto cont;
1822 }
1823 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1824 && (line_status & (LSR_BI | LSR_FE)
1825 || com->tp->t_iflag & INPCK))
1826 recv_data = 0;
1827 }
1828 ++com->bytes_in;
1829 if (com->hotchar != 0 && recv_data == com->hotchar)
1830 setsofttty();
1831 ioptr = com->iptr;
1832 if (ioptr >= com->ibufend)
1833 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1834 else {
1835 if (com->do_timestamp)
1836 microtime(&com->timestamp);
1837 ++com_events;
1838 schedsofttty();
1839 #if 0 /* for testing input latency vs efficiency */
1840 if (com->iptr - com->ibuf == 8)
1841 setsofttty();
1842 #endif
1843 ioptr[0] = recv_data;
1844 ioptr[com->ierroff] = line_status;
1845 com->iptr = ++ioptr;
1846 if (ioptr == com->ihighwater
1847 && com->state & CS_RTS_IFLOW)
1848 outb(com->modem_ctl_port,
1849 com->mcr_image &= ~MCR_RTS);
1850 if (line_status & LSR_OE)
1851 CE_RECORD(com, CE_OVERRUN);
1852 }
1853 cont:
1854 /*
1855 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1856 * jump from the top of the loop to here
1857 */
1858 line_status = inb(com->line_status_port) & 0x7F;
1859 }
1860
1861 /* modem status change? (always check before doing output) */
1862 modem_status = inb(com->modem_status_port);
1863 if (modem_status != com->last_modem_status) {
1864 if (com->do_dcd_timestamp
1865 && !(com->last_modem_status & MSR_DCD)
1866 && modem_status & MSR_DCD)
1867 microtime(&com->dcd_timestamp);
1868
1869 /*
1870 * Schedule high level to handle DCD changes. Note
1871 * that we don't use the delta bits anywhere. Some
1872 * UARTs mess them up, and it's easy to remember the
1873 * previous bits and calculate the delta.
1874 */
1875 com->last_modem_status = modem_status;
1876 if (!(com->state & CS_CHECKMSR)) {
1877 com_events += LOTS_OF_EVENTS;
1878 com->state |= CS_CHECKMSR;
1879 setsofttty();
1880 }
1881
1882 /* handle CTS change immediately for crisp flow ctl */
1883 if (com->state & CS_CTS_OFLOW) {
1884 if (modem_status & MSR_CTS)
1885 com->state |= CS_ODEVREADY;
1886 else
1887 com->state &= ~CS_ODEVREADY;
1888 }
1889 }
1890
1891 /* output queued and everything ready? */
1892 if (line_status & LSR_TXRDY
1893 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1894 ioptr = com->obufq.l_head;
1895 if (com->tx_fifo_size > 1) {
1896 u_int ocount;
1897
1898 ocount = com->obufq.l_tail - ioptr;
1899 if (ocount > com->tx_fifo_size)
1900 ocount = com->tx_fifo_size;
1901 com->bytes_out += ocount;
1902 do
1903 outb(com->data_port, *ioptr++);
1904 while (--ocount != 0);
1905 } else {
1906 outb(com->data_port, *ioptr++);
1907 ++com->bytes_out;
1908 }
1909 com->obufq.l_head = ioptr;
1910 if (COM_IIR_TXRDYBUG(com->flags)) {
1911 int_ctl_new = int_ctl | IER_ETXRDY;
1912 }
1913 if (ioptr >= com->obufq.l_tail) {
1914 struct lbq *qp;
1915
1916 qp = com->obufq.l_next;
1917 qp->l_queued = FALSE;
1918 qp = qp->l_next;
1919 if (qp != NULL) {
1920 com->obufq.l_head = qp->l_head;
1921 com->obufq.l_tail = qp->l_tail;
1922 com->obufq.l_next = qp;
1923 } else {
1924 /* output just completed */
1925 if (COM_IIR_TXRDYBUG(com->flags)) {
1926 int_ctl_new = int_ctl & ~IER_ETXRDY;
1927 }
1928 com->state &= ~CS_BUSY;
1929 }
1930 if (!(com->state & CS_ODONE)) {
1931 com_events += LOTS_OF_EVENTS;
1932 com->state |= CS_ODONE;
1933 setsofttty(); /* handle at high level ASAP */
1934 }
1935 }
1936 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
1937 outb(com->intr_ctl_port, int_ctl_new);
1938 }
1939 }
1940
1941 /* finished? */
1942 #ifndef COM_MULTIPORT
1943 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1944 #endif /* COM_MULTIPORT */
1945 return;
1946 }
1947 }
1948
1949 static int
1950 sioioctl(struct dev_ioctl_args *ap)
1951 {
1952 cdev_t dev = ap->a_head.a_dev;
1953 caddr_t data = ap->a_data;
1954 struct com_s *com;
1955 int error;
1956 int mynor;
1957 struct tty *tp;
1958 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1959 u_long oldcmd;
1960 struct termios term;
1961 #endif
1962
1963 mynor = minor(dev);
1964 com = com_addr(MINOR_TO_UNIT(mynor));
1965 if (com == NULL || com->gone)
1966 return (ENODEV);
1967 if (mynor & CONTROL_MASK) {
1968 struct termios *ct;
1969
1970 switch (mynor & CONTROL_MASK) {
1971 case CONTROL_INIT_STATE:
1972 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1973 break;
1974 case CONTROL_LOCK_STATE:
1975 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1976 break;
1977 default:
1978 return (ENODEV); /* /dev/nodev */
1979 }
1980 switch (ap->a_cmd) {
1981 case TIOCSETA:
1982 error = suser_cred(ap->a_cred, 0);
1983 if (error != 0)
1984 return (error);
1985 *ct = *(struct termios *)data;
1986 return (0);
1987 case TIOCGETA:
1988 *(struct termios *)data = *ct;
1989 return (0);
1990 case TIOCGETD:
1991 *(int *)data = TTYDISC;
1992 return (0);
1993 case TIOCGWINSZ:
1994 bzero(data, sizeof(struct winsize));
1995 return (0);
1996 default:
1997 return (ENOTTY);
1998 }
1999 }
2000 tp = com->tp;
2001 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2002 term = tp->t_termios;
2003 oldcmd = ap->a_cmd;
2004 error = ttsetcompat(tp, &ap->a_cmd, data, &term);
2005 if (error != 0)
2006 return (error);
2007 if (ap->a_cmd != oldcmd)
2008 data = (caddr_t)&term;
2009 #endif
2010 if (ap->a_cmd == TIOCSETA || ap->a_cmd == TIOCSETAW ||
2011 ap->a_cmd == TIOCSETAF) {
2012 int cc;
2013 struct termios *dt = (struct termios *)data;
2014 struct termios *lt = mynor & CALLOUT_MASK
2015 ? &com->lt_out : &com->lt_in;
2016
2017 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2018 | (dt->c_iflag & ~lt->c_iflag);
2019 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2020 | (dt->c_oflag & ~lt->c_oflag);
2021 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2022 | (dt->c_cflag & ~lt->c_cflag);
2023 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2024 | (dt->c_lflag & ~lt->c_lflag);
2025 for (cc = 0; cc < NCCS; ++cc)
2026 if (lt->c_cc[cc] != 0)
2027 dt->c_cc[cc] = tp->t_cc[cc];
2028 if (lt->c_ispeed != 0)
2029 dt->c_ispeed = tp->t_ispeed;
2030 if (lt->c_ospeed != 0)
2031 dt->c_ospeed = tp->t_ospeed;
2032 }
2033 error = (*linesw[tp->t_line].l_ioctl)(tp, ap->a_cmd, data, ap->a_fflag, ap->a_cred);
2034 if (error != ENOIOCTL)
2035 return (error);
2036 crit_enter();
2037 error = ttioctl(tp, ap->a_cmd, data, ap->a_fflag);
2038 disc_optim(tp, &tp->t_termios, com);
2039 if (error != ENOIOCTL) {
2040 crit_exit();
2041 return (error);
2042 }
2043 switch (ap->a_cmd) {
2044 case TIOCSBRK:
2045 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2046 break;
2047 case TIOCCBRK:
2048 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2049 break;
2050 case TIOCSDTR:
2051 (void)commctl(com, TIOCM_DTR, DMBIS);
2052 break;
2053 case TIOCCDTR:
2054 (void)commctl(com, TIOCM_DTR, DMBIC);
2055 break;
2056 /*
2057 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2058 * changes get undone on the next call to comparam().
2059 */
2060 case TIOCMSET:
2061 (void)commctl(com, *(int *)data, DMSET);
2062 break;
2063 case TIOCMBIS:
2064 (void)commctl(com, *(int *)data, DMBIS);
2065 break;
2066 case TIOCMBIC:
2067 (void)commctl(com, *(int *)data, DMBIC);
2068 break;
2069 case TIOCMGET:
2070 *(int *)data = commctl(com, 0, DMGET);
2071 break;
2072 case TIOCMSDTRWAIT:
2073 /* must be root since the wait applies to following logins */
2074 error = suser_cred(ap->a_cred, 0);
2075 if (error != 0) {
2076 crit_exit();
2077 return (error);
2078 }
2079 com->dtr_wait = *(int *)data * hz / 100;
2080 break;
2081 case TIOCMGDTRWAIT:
2082 *(int *)data = com->dtr_wait * 100 / hz;
2083 break;
2084 case TIOCTIMESTAMP:
2085 com->do_timestamp = TRUE;
2086 *(struct timeval *)data = com->timestamp;
2087 break;
2088 case TIOCDCDTIMESTAMP:
2089 com->do_dcd_timestamp = TRUE;
2090 *(struct timeval *)data = com->dcd_timestamp;
2091 break;
2092 default:
2093 crit_exit();
2094 error = pps_ioctl(ap->a_cmd, data, &com->pps);
2095 if (error == ENODEV)
2096 error = ENOTTY;
2097 return (error);
2098 }
2099 crit_exit();
2100 return (0);
2101 }
2102
2103 static void
2104 siopoll(void *dummy, void *frame)
2105 {
2106 int unit;
2107
2108 if (com_events == 0)
2109 return;
2110 repeat:
2111 for (unit = 0; unit < sio_numunits; ++unit) {
2112 struct com_s *com;
2113 int incc;
2114 struct tty *tp;
2115
2116 com = com_addr(unit);
2117 if (com == NULL)
2118 continue;
2119 tp = com->tp;
2120 if (tp == NULL || com->gone) {
2121 /*
2122 * Discard any events related to never-opened or
2123 * going-away devices.
2124 */
2125 com_lock();
2126 incc = com->iptr - com->ibuf;
2127 com->iptr = com->ibuf;
2128 if (com->state & CS_CHECKMSR) {
2129 incc += LOTS_OF_EVENTS;
2130 com->state &= ~CS_CHECKMSR;
2131 }
2132 com_events -= incc;
2133 com_unlock();
2134 continue;
2135 }
2136 if (com->iptr != com->ibuf) {
2137 com_lock();
2138 sioinput(com);
2139 com_unlock();
2140 }
2141 if (com->state & CS_CHECKMSR) {
2142 u_char delta_modem_status;
2143
2144 com_lock();
2145 delta_modem_status = com->last_modem_status
2146 ^ com->prev_modem_status;
2147 com->prev_modem_status = com->last_modem_status;
2148 com_events -= LOTS_OF_EVENTS;
2149 com->state &= ~CS_CHECKMSR;
2150 com_unlock();
2151 if (delta_modem_status & MSR_DCD)
2152 (*linesw[tp->t_line].l_modem)
2153 (tp, com->prev_modem_status & MSR_DCD);
2154 }
2155 if (com->state & CS_ODONE) {
2156 com_lock();
2157 com_events -= LOTS_OF_EVENTS;
2158 com->state &= ~CS_ODONE;
2159 com_unlock();
2160 if (!(com->state & CS_BUSY)
2161 && !(com->extra_state & CSE_BUSYCHECK)) {
2162 callout_reset(&com->busy_ch, hz / 100,
2163 siobusycheck, com);
2164 com->extra_state |= CSE_BUSYCHECK;
2165 }
2166 (*linesw[tp->t_line].l_start)(tp);
2167 }
2168 if (com_events == 0)
2169 break;
2170 }
2171 if (com_events >= LOTS_OF_EVENTS)
2172 goto repeat;
2173 }
2174
2175 static int
2176 comparam(struct tty *tp, struct termios *t)
2177 {
2178 u_int cfcr;
2179 int cflag;
2180 struct com_s *com;
2181 u_int divisor;
2182 u_char dlbh;
2183 u_char dlbl;
2184 int unit;
2185
2186 unit = DEV_TO_UNIT(tp->t_dev);
2187 com = com_addr(unit);
2188 if (com == NULL)
2189 return (ENODEV);
2190
2191 /* do historical conversions */
2192 if (t->c_ispeed == 0)
2193 t->c_ispeed = t->c_ospeed;
2194
2195 /* check requested parameters */
2196 if (t->c_ospeed == 0)
2197 divisor = 0;
2198 else {
2199 if (t->c_ispeed != t->c_ospeed)
2200 return (EINVAL);
2201 divisor = siodivisor(com->rclk, t->c_ispeed);
2202 if (divisor == 0)
2203 return (EINVAL);
2204 }
2205
2206 /* parameters are OK, convert them to the com struct and the device */
2207 crit_enter();
2208 if (divisor == 0)
2209 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
2210 else
2211 (void)commctl(com, TIOCM_DTR, DMBIS);
2212 cflag = t->c_cflag;
2213 switch (cflag & CSIZE) {
2214 case CS5:
2215 cfcr = CFCR_5BITS;
2216 break;
2217 case CS6:
2218 cfcr = CFCR_6BITS;
2219 break;
2220 case CS7:
2221 cfcr = CFCR_7BITS;
2222 break;
2223 default:
2224 cfcr = CFCR_8BITS;
2225 break;
2226 }
2227 if (cflag & PARENB) {
2228 cfcr |= CFCR_PENAB;
2229 if (!(cflag & PARODD))
2230 cfcr |= CFCR_PEVEN;
2231 }
2232 if (cflag & CSTOPB)
2233 cfcr |= CFCR_STOPB;
2234
2235 if (com->hasfifo && divisor != 0) {
2236 /*
2237 * Use a fifo trigger level low enough so that the input
2238 * latency from the fifo is less than about 16 msec and
2239 * the total latency is less than about 30 msec. These
2240 * latencies are reasonable for humans. Serial comms
2241 * protocols shouldn't expect anything better since modem
2242 * latencies are larger.
2243 *
2244 * Interrupts can be held up for long periods of time
2245 * due to inefficiencies in other parts of the kernel,
2246 * certain video cards, etc. Setting the FIFO trigger
2247 * point to MEDH instead of HIGH gives us 694uS of slop
2248 * (8 character times) instead of 173uS (2 character times)
2249 * @ 115200 bps.
2250 */
2251 com->fifo_image = t->c_ospeed <= 4800
2252 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2253 #ifdef COM_ESP
2254 /*
2255 * The Hayes ESP card needs the fifo DMA mode bit set
2256 * in compatibility mode. If not, it will interrupt
2257 * for each character received.
2258 */
2259 if (com->esp)
2260 com->fifo_image |= FIFO_DMA_MODE;
2261 #endif
2262 sio_setreg(com, com_fifo, com->fifo_image);
2263 }
2264
2265 /*
2266 * This returns with interrupts disabled so that we can complete
2267 * the speed change atomically. Keeping interrupts disabled is
2268 * especially important while com_data is hidden.
2269 */
2270 (void) siosetwater(com, t->c_ispeed);
2271
2272 if (divisor != 0) {
2273 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2274 /*
2275 * Only set the divisor registers if they would change,
2276 * since on some 16550 incompatibles (UMC8669F), setting
2277 * them while input is arriving them loses sync until
2278 * data stops arriving.
2279 */
2280 dlbl = divisor & 0xFF;
2281 if (sio_getreg(com, com_dlbl) != dlbl)
2282 sio_setreg(com, com_dlbl, dlbl);
2283 dlbh = divisor >> 8;
2284 if (sio_getreg(com, com_dlbh) != dlbh)
2285 sio_setreg(com, com_dlbh, dlbh);
2286 }
2287
2288 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2289
2290 if (!(tp->t_state & TS_TTSTOP))
2291 com->state |= CS_TTGO;
2292
2293 if (cflag & CRTS_IFLOW) {
2294 if (com->st16650a) {
2295 sio_setreg(com, com_cfcr, 0xbf);
2296 sio_setreg(com, com_fifo,
2297 sio_getreg(com, com_fifo) | 0x40);
2298 }
2299 com->state |= CS_RTS_IFLOW;
2300 /*
2301 * If CS_RTS_IFLOW just changed from off to on, the change
2302 * needs to be propagated to MCR_RTS. This isn't urgent,
2303 * so do it later by calling comstart() instead of repeating
2304 * a lot of code from comstart() here.
2305 */
2306 } else if (com->state & CS_RTS_IFLOW) {
2307 com->state &= ~CS_RTS_IFLOW;
2308 /*
2309 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2310 * on here, since comstart() won't do it later.
2311 */
2312 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2313 if (com->st16650a) {
2314 sio_setreg(com, com_cfcr, 0xbf);
2315 sio_setreg(com, com_fifo,
2316 sio_getreg(com, com_fifo) & ~0x40);
2317 }
2318 }
2319
2320
2321 /*
2322 * Set up state to handle output flow control.
2323 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2324 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2325 */
2326 com->state |= CS_ODEVREADY;
2327 com->state &= ~CS_CTS_OFLOW;
2328 if (cflag & CCTS_OFLOW) {
2329 com->state |= CS_CTS_OFLOW;
2330 if (!(com->last_modem_status & MSR_CTS))
2331 com->state &= ~CS_ODEVREADY;
2332 if (com->st16650a) {
2333 sio_setreg(com, com_cfcr, 0xbf);
2334 sio_setreg(com, com_fifo,
2335 sio_getreg(com, com_fifo) | 0x80);
2336 }
2337 } else {
2338 if (com->st16650a) {
2339 sio_setreg(com, com_cfcr, 0xbf);
2340 sio_setreg(com, com_fifo,
2341 sio_getreg(com, com_fifo) & ~0x80);
2342 }
2343 }
2344
2345 sio_setreg(com, com_cfcr, com->cfcr_image);
2346
2347 /* XXX shouldn't call functions while intrs are disabled. */
2348 disc_optim(tp, t, com);
2349 /*
2350 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2351 * unconditionally, but that defeated the careful discarding of
2352 * stale input in sioopen().
2353 */
2354 if (com->state >= (CS_BUSY | CS_TTGO))
2355 siointr1(com);
2356
2357 com_unlock();
2358 crit_exit();
2359 comstart(tp);
2360 if (com->ibufold != NULL) {
2361 kfree(com->ibufold, M_DEVBUF);
2362 com->ibufold = NULL;
2363 }
2364 return (0);
2365 }
2366
2367 static int
2368 siosetwater(struct com_s *com, speed_t speed)
2369 {
2370 int cp4ticks;
2371 u_char *ibuf;
2372 int ibufsize;
2373 struct tty *tp;
2374
2375 /*
2376 * Make the buffer size large enough to handle a softtty interrupt
2377 * latency of about 2 ticks without loss of throughput or data
2378 * (about 3 ticks if input flow control is not used or not honoured,
2379 * but a bit less for CS5-CS7 modes).
2380 */
2381 cp4ticks = speed / 10 / hz * 4;
2382 for (ibufsize = 128; ibufsize < cp4ticks;)
2383 ibufsize <<= 1;
2384 if (ibufsize == com->ibufsize) {
2385 com_lock();
2386 return (0);
2387 }
2388
2389 /*
2390 * Allocate input buffer. The extra factor of 2 in the size is
2391 * to allow for an error byte for each input byte.
2392 */
2393 ibuf = kmalloc(2 * ibufsize, M_DEVBUF, M_WAITOK | M_ZERO);
2394
2395 /* Initialize non-critical variables. */
2396 com->ibufold = com->ibuf;
2397 com->ibufsize = ibufsize;
2398 tp = com->tp;
2399 if (tp != NULL) {
2400 tp->t_ififosize = 2 * ibufsize;
2401 tp->t_ispeedwat = (speed_t)-1;
2402 tp->t_ospeedwat = (speed_t)-1;
2403 }
2404
2405 /*
2406 * Read current input buffer, if any. Continue with interrupts
2407 * disabled.
2408 */
2409 com_lock();
2410 if (com->iptr != com->ibuf)
2411 sioinput(com);
2412
2413 /*-
2414 * Initialize critical variables, including input buffer watermarks.
2415 * The external device is asked to stop sending when the buffer
2416 * exactly reaches high water, or when the high level requests it.
2417 * The high level is notified immediately (rather than at a later
2418 * clock tick) when this watermark is reached.
2419 * The buffer size is chosen so the watermark should almost never
2420 * be reached.
2421 * The low watermark is invisibly 0 since the buffer is always
2422 * emptied all at once.
2423 */
2424 com->iptr = com->ibuf = ibuf;
2425 com->ibufend = ibuf + ibufsize;
2426 com->ierroff = ibufsize;
2427 com->ihighwater = ibuf + 3 * ibufsize / 4;
2428 return (0);
2429 }
2430
2431 static void
2432 comstart(struct tty *tp)
2433 {
2434 struct com_s *com;
2435 int unit;
2436
2437 unit = DEV_TO_UNIT(tp->t_dev);
2438 com = com_addr(unit);
2439 if (com == NULL)
2440 return;
2441 crit_enter();
2442 com_lock();
2443 if (tp->t_state & TS_TTSTOP)
2444 com->state &= ~CS_TTGO;
2445 else
2446 com->state |= CS_TTGO;
2447 if (tp->t_state & TS_TBLOCK) {
2448 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2449 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2450 } else {
2451 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2452 && com->state & CS_RTS_IFLOW)
2453 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2454 }
2455 com_unlock();
2456 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2457 ttwwakeup(tp);
2458 crit_exit();
2459 return;
2460 }
2461 if (tp->t_outq.c_cc != 0) {
2462 struct lbq *qp;
2463 struct lbq *next;
2464
2465 if (!com->obufs[0].l_queued) {
2466 com->obufs[0].l_tail
2467 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2468 sizeof com->obuf1);
2469 com->obufs[0].l_next = NULL;
2470 com->obufs[0].l_queued = TRUE;
2471 com_lock();
2472 if (com->state & CS_BUSY) {
2473 qp = com->obufq.l_next;
2474 while ((next = qp->l_next) != NULL)
2475 qp = next;
2476 qp->l_next = &com->obufs[0];
2477 } else {
2478 com->obufq.l_head = com->obufs[0].l_head;
2479 com->obufq.l_tail = com->obufs[0].l_tail;
2480 com->obufq.l_next = &com->obufs[0];
2481 com->state |= CS_BUSY;
2482 }
2483 com_unlock();
2484 }
2485 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2486 com->obufs[1].l_tail
2487 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2488 sizeof com->obuf2);
2489 com->obufs[1].l_next = NULL;
2490 com->obufs[1].l_queued = TRUE;
2491 com_lock();
2492 if (com->state & CS_BUSY) {
2493 qp = com->obufq.l_next;
2494 while ((next = qp->l_next) != NULL)
2495 qp = next;
2496 qp->l_next = &com->obufs[1];
2497 } else {
2498 com->obufq.l_head = com->obufs[1].l_head;
2499 com->obufq.l_tail = com->obufs[1].l_tail;
2500 com->obufq.l_next = &com->obufs[1];
2501 com->state |= CS_BUSY;
2502 }
2503 com_unlock();
2504 }
2505 tp->t_state |= TS_BUSY;
2506 }
2507 com_lock();
2508 if (com->state >= (CS_BUSY | CS_TTGO))
2509 siointr1(com); /* fake interrupt to start output */
2510 com_unlock();
2511 ttwwakeup(tp);
2512 crit_exit();
2513 }
2514
2515 static void
2516 comstop(struct tty *tp, int rw)
2517 {
2518 struct com_s *com;
2519
2520 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2521 if (com == NULL || com->gone)
2522 return;
2523 com_lock();
2524 if (rw & FWRITE) {
2525 if (com->hasfifo)
2526 #ifdef COM_ESP
2527 /* XXX avoid h/w bug. */
2528 if (!com->esp)
2529 #endif
2530 sio_setreg(com, com_fifo,
2531 FIFO_XMT_RST | com->fifo_image);
2532 com->obufs[0].l_queued = FALSE;
2533 com->obufs[1].l_queued = FALSE;
2534 if (com->state & CS_ODONE)
2535 com_events -= LOTS_OF_EVENTS;
2536 com->state &= ~(CS_ODONE | CS_BUSY);
2537 com->tp->t_state &= ~TS_BUSY;
2538 }
2539 if (rw & FREAD) {
2540 if (com->hasfifo)
2541 #ifdef COM_ESP
2542 /* XXX avoid h/w bug. */
2543 if (!com->esp)
2544 #endif
2545 sio_setreg(com, com_fifo,
2546 FIFO_RCV_RST | com->fifo_image);
2547 com_events -= (com->iptr - com->ibuf);
2548 com->iptr = com->ibuf;
2549 }
2550 com_unlock();
2551 comstart(tp);
2552 }
2553
2554 static int
2555 commctl(struct com_s *com, int bits, int how)
2556 {
2557 int mcr;
2558 int msr;
2559
2560 if (how == DMGET) {
2561 bits = TIOCM_LE; /* XXX - always enabled while open */
2562 mcr = com->mcr_image;
2563 if (mcr & MCR_DTR)
2564 bits |= TIOCM_DTR;
2565 if (mcr & MCR_RTS)
2566 bits |= TIOCM_RTS;
2567 msr = com->prev_modem_status;
2568 if (msr & MSR_CTS)
2569 bits |= TIOCM_CTS;
2570 if (msr & MSR_DCD)
2571 bits |= TIOCM_CD;
2572 if (msr & MSR_DSR)
2573 bits |= TIOCM_DSR;
2574 /*
2575 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2576 * more volatile by reading the modem status a lot. Perhaps
2577 * we should latch both bits until the status is read here.
2578 */
2579 if (msr & (MSR_RI | MSR_TERI))
2580 bits |= TIOCM_RI;
2581 return (bits);
2582 }
2583 mcr = 0;
2584 if (bits & TIOCM_DTR)
2585 mcr |= MCR_DTR;
2586 if (bits & TIOCM_RTS)
2587 mcr |= MCR_RTS;
2588 if (com->gone)
2589 return(0);
2590 com_lock();
2591 switch (how) {
2592 case DMSET:
2593 outb(com->modem_ctl_port,
2594 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2595 break;
2596 case DMBIS:
2597 outb(com->modem_ctl_port, com->mcr_image |= mcr);
2598 break;
2599 case DMBIC:
2600 outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2601 break;
2602 }
2603 com_unlock();
2604 return (0);
2605 }
2606
2607 static void
2608 siosettimeout(void)
2609 {
2610 struct com_s *com;
2611 bool_t someopen;
2612 int unit;
2613
2614 /*
2615 * Set our timeout period to 1 second if no polled devices are open.
2616 * Otherwise set it to max(1/200, 1/hz).
2617 * Enable timeouts iff some device is open.
2618 */
2619 callout_stop(&sio_timeout_handle);
2620 sio_timeout = hz;
2621 someopen = FALSE;
2622 for (unit = 0; unit < sio_numunits; ++unit) {
2623 com = com_addr(unit);
2624 if (com != NULL && com->tp != NULL
2625 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2626 someopen = TRUE;
2627 if (com->poll || com->poll_output) {
2628 sio_timeout = hz > 200 ? hz / 200 : 1;
2629 break;
2630 }
2631 }
2632 }
2633 if (someopen) {
2634 sio_timeouts_until_log = hz / sio_timeout;
2635 callout_reset(&sio_timeout_handle, sio_timeout,
2636 comwakeup, NULL);
2637 } else {
2638 /* Flush error messages, if any. */
2639 sio_timeouts_until_log = 1;
2640 comwakeup(NULL);
2641 callout_stop(&sio_timeout_handle);
2642 }
2643 }
2644
2645 static void
2646 comwakeup(void *chan)
2647 {
2648 struct com_s *com;
2649 int unit;
2650
2651 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL);
2652
2653 /*
2654 * Recover from lost output interrupts.
2655 * Poll any lines that don't use interrupts.
2656 */
2657 for (unit = 0; unit < sio_numunits; ++unit) {
2658 com = com_addr(unit);
2659 if (com != NULL && !com->gone
2660 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2661 com_lock();
2662 siointr1(com);
2663 com_unlock();
2664 }
2665 }
2666
2667 /*
2668 * Check for and log errors, but not too often.
2669 */
2670 if (--sio_timeouts_until_log > 0)
2671 return;
2672 sio_timeouts_until_log = hz / sio_timeout;
2673 for (unit = 0; unit < sio_numunits; ++unit) {
2674 int errnum;
2675
2676 com = com_addr(unit);
2677 if (com == NULL)
2678 continue;
2679 if (com->gone)
2680 continue;
2681 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2682 u_int delta;
2683 u_long total;
2684
2685 com_lock();
2686 delta = com->delta_error_counts[errnum];
2687 com->delta_error_counts[errnum] = 0;
2688 com_unlock();
2689 if (delta == 0)
2690 continue;
2691 total = com->error_counts[errnum] += delta;
2692 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2693 unit, delta, error_desc[errnum],
2694 delta == 1 ? "" : "s", total);
2695 }
2696 }
2697 }
2698
2699 static void
2700 disc_optim(struct tty *tp, struct termios *t, struct com_s *com)
2701 {
2702 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2703 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2704 && (!(t->c_iflag & PARMRK)
2705 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2706 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2707 && linesw[tp->t_line].l_rint == ttyinput)
2708 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2709 else
2710 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2711 com->hotchar = linesw[tp->t_line].l_hotchar;
2712 }
2713
2714 /*
2715 * Following are all routines needed for SIO to act as console
2716 */
2717 #include <sys/cons.h>
2718
2719 struct siocnstate {
2720 u_char dlbl;
2721 u_char dlbh;
2722 u_char ier;
2723 u_char cfcr;
2724 u_char mcr;
2725 };
2726
2727 static speed_t siocngetspeed (Port_t, u_long rclk);
2728 static void siocnclose (struct siocnstate *sp, Port_t iobase);
2729 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed);
2730 static void siocntxwait (Port_t iobase);
2731
2732 static cn_probe_t siocnprobe;
2733 static cn_init_t siocninit;
2734 static cn_init_fini_t siocninit_fini;
2735 static cn_checkc_t siocncheckc;
2736 static cn_getc_t siocngetc;
2737 static cn_putc_t siocnputc;
2738
2739 #ifdef __i386__
2740 CONS_DRIVER(sio, siocnprobe, siocninit, siocninit_fini,
2741 NULL, siocngetc, siocncheckc, siocnputc, NULL);
2742 #endif
2743
2744 /* To get the GDB related variables */
2745 #if DDB > 0
2746 #include <ddb/ddb.h>
2747 #endif
2748
2749 static void
2750 siocntxwait(Port_t iobase)
2751 {
2752 int timo;
2753
2754 /*
2755 * Wait for any pending transmission to finish. Required to avoid
2756 * the UART lockup bug when the speed is changed, and for normal
2757 * transmits.
2758 */
2759 timo = 100000;
2760 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2761 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2762 ;
2763 }
2764
2765 /*
2766 * Read the serial port specified and try to figure out what speed
2767 * it's currently running at. We're assuming the serial port has
2768 * been initialized and is basicly idle. This routine is only intended
2769 * to be run at system startup.
2770 *
2771 * If the value read from the serial port doesn't make sense, return 0.
2772 */
2773
2774 static speed_t
2775 siocngetspeed(Port_t iobase, u_long rclk)
2776 {
2777 u_int divisor;
2778 u_char dlbh;
2779 u_char dlbl;
2780 u_char cfcr;
2781
2782 cfcr = inb(iobase + com_cfcr);
2783 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2784
2785 dlbl = inb(iobase + com_dlbl);
2786 dlbh = inb(iobase + com_dlbh);
2787
2788 outb(iobase + com_cfcr, cfcr);
2789
2790 divisor = dlbh << 8 | dlbl;
2791
2792 /* XXX there should be more sanity checking. */
2793 if (divisor == 0)
2794 return (CONSPEED);
2795 return (rclk / (16UL * divisor));
2796 }
2797
2798 static void
2799 siocnopen(struct siocnstate *sp, Port_t iobase, int speed)
2800 {
2801 u_int divisor;
2802 u_char dlbh;
2803 u_char dlbl;
2804
2805 /*
2806 * Save all the device control registers except the fifo register
2807 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2808 * We can't save the fifo register since it is read-only.
2809 */
2810 sp->ier = inb(iobase + com_ier);
2811 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2812 siocntxwait(iobase);
2813 sp->cfcr = inb(iobase + com_cfcr);
2814 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2815 sp->dlbl = inb(iobase + com_dlbl);
2816 sp->dlbh = inb(iobase + com_dlbh);
2817 /*
2818 * Only set the divisor registers if they would change, since on
2819 * some 16550 incompatibles (Startech), setting them clears the
2820 * data input register. This also reduces the effects of the
2821 * UMC8669F bug.
2822 */
2823 divisor = siodivisor(comdefaultrclk, speed);
2824 dlbl = divisor & 0xFF;
2825 if (sp->dlbl != dlbl)
2826 outb(iobase + com_dlbl, dlbl);
2827 dlbh = divisor >> 8;
2828 if (sp->dlbh != dlbh)
2829 outb(iobase + com_dlbh, dlbh);
2830 outb(iobase + com_cfcr, CFCR_8BITS);
2831 sp->mcr = inb(iobase + com_mcr);
2832 /*
2833 * We don't want interrupts, but must be careful not to "disable"
2834 * them by clearing the MCR_IENABLE bit, since that might cause
2835 * an interrupt by floating the IRQ line.
2836 */
2837 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2838 }
2839
2840 static void
2841 siocnclose(struct siocnstate *sp, Port_t iobase)
2842 {
2843 /*
2844 * Restore the device control registers.
2845 */
2846 siocntxwait(iobase);
2847 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2848 if (sp->dlbl != inb(iobase + com_dlbl))
2849 outb(iobase + com_dlbl, sp->dlbl);
2850 if (sp->dlbh != inb(iobase + com_dlbh))
2851 outb(iobase + com_dlbh, sp->dlbh);
2852 outb(iobase + com_cfcr, sp->cfcr);
2853 /*
2854 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2855 */
2856 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2857 outb(iobase + com_ier, sp->ier);
2858 }
2859
2860 static void
2861 siocnprobe(struct consdev *cp)
2862 {
2863 speed_t boot_speed;
2864 u_char cfcr;
2865 u_int divisor;
2866 int unit;
2867 struct siocnstate sp;
2868
2869 /*
2870 * Find our first enabled console, if any. If it is a high-level
2871 * console device, then initialize it and return successfully.
2872 * If it is a low-level console device, then initialize it and
2873 * return unsuccessfully. It must be initialized in both cases
2874 * for early use by console drivers and debuggers. Initializing
2875 * the hardware is not necessary in all cases, since the i/o
2876 * routines initialize it on the fly, but it is necessary if
2877 * input might arrive while the hardware is switched back to an
2878 * uninitialized state. We can't handle multiple console devices
2879 * yet because our low-level routines don't take a device arg.
2880 * We trust the user to set the console flags properly so that we
2881 * don't need to probe.
2882 */
2883 cp->cn_pri = CN_DEAD;
2884
2885 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2886 int flags;
2887 int disabled;
2888 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
2889 if (disabled)
2890 continue;
2891 }
2892 if (resource_int_value("sio", unit, "flags", &flags))
2893 continue;
2894 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2895 int port;
2896 Port_t iobase;
2897
2898 if (resource_int_value("sio", unit, "port", &port))
2899 continue;
2900 iobase = port;
2901 crit_enter();
2902 if (boothowto & RB_SERIAL) {
2903 boot_speed =
2904 siocngetspeed(iobase, comdefaultrclk);
2905 if (boot_speed)
2906 comdefaultrate = boot_speed;
2907 }
2908
2909 /*
2910 * Initialize the divisor latch. We can't rely on
2911 * siocnopen() to do this the first time, since it
2912 * avoids writing to the latch if the latch appears
2913 * to have the correct value. Also, if we didn't
2914 * just read the speed from the hardware, then we
2915 * need to set the speed in hardware so that
2916 * switching it later is null.
2917 */
2918 cfcr = inb(iobase + com_cfcr);
2919 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2920 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2921 outb(iobase + com_dlbl, divisor & 0xff);
2922 outb(iobase + com_dlbh, divisor >> 8);
2923 outb(iobase + com_cfcr, cfcr);
2924
2925 siocnopen(&sp, iobase, comdefaultrate);
2926
2927 crit_exit();
2928 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2929 cp->cn_probegood = 1;
2930 cp->cn_private = (void *)unit;
2931 cp->cn_pri = COM_FORCECONSOLE(flags)
2932 || boothowto & RB_SERIAL
2933 ? CN_REMOTE : CN_NORMAL;
2934 siocniobase = iobase;
2935 siocnunit = unit;
2936 }
2937 if (COM_DEBUGGER(flags) && gdb_tab == NULL) {
2938 kprintf("sio%d: gdb debugging port\n", unit);
2939 siogdbiobase = iobase;
2940 siogdbunit = unit;
2941 #if DDB > 0
2942 cp->cn_gdbprivate = (void *)unit;
2943 gdb_tab = cp;
2944 #endif
2945 }
2946 }
2947 }
2948 #ifdef __i386__
2949 #if DDB > 0
2950 /*
2951 * XXX Ugly Compatability.
2952 * If no gdb port has been specified, set it to be the console
2953 * as some configuration files don't specify the gdb port.
2954 */
2955 if (gdb_tab == NULL && (boothowto & RB_GDB)) {
2956 kprintf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2957 siocnunit);
2958 kprintf("Set flag 0x80 on desired GDB port in your\n");
2959 kprintf("configuration file (currently sio only).\n");
2960 siogdbiobase = siocniobase;
2961 siogdbunit = siocnunit;
2962 cp->cn_gdbprivate = (void *)siocnunit;
2963 gdb_tab = cp;
2964 }
2965 #endif
2966 #endif
2967 }
2968
2969 static void
2970 siocninit(struct consdev *cp)
2971 {
2972 comconsole = (int)(intptr_t)cp->cn_private;
2973 }
2974
2975 static void
2976 siocninit_fini(struct consdev *cp)
2977 {
2978 int unit;
2979
2980 if (cp->cn_probegood) {
2981 unit = (int)(intptr_t)cp->cn_private;
2982 cp->cn_dev = make_dev(&sio_ops, unit,
2983 UID_ROOT, GID_WHEEL, 0600,
2984 "ttyd%r", unit);
2985 }
2986 }
2987
2988 static int
2989 siocncheckc(void *private)
2990 {
2991 int c;
2992 int unit = (int)(intptr_t)private;
2993 Port_t iobase;
2994 struct siocnstate sp;
2995
2996 if (unit == siogdbunit)
2997 iobase = siogdbiobase;
2998 else
2999 iobase = siocniobase;
3000 crit_enter();
3001 siocnopen(&sp, iobase, comdefaultrate);
3002 if (inb(iobase + com_lsr) & LSR_RXRDY)
3003 c = inb(iobase + com_data);
3004 else
3005 c = -1;
3006 siocnclose(&sp, iobase);
3007 crit_exit();
3008 return (c);
3009 }
3010
3011
3012 int
3013 siocngetc(void *private)
3014 {
3015 int c;
3016 int unit = (int)(intptr_t)private;
3017 Port_t iobase;
3018 struct siocnstate sp;
3019
3020 if (unit == siogdbunit)
3021 iobase = siogdbiobase;
3022 else
3023 iobase = siocniobase;
3024 crit_enter();
3025 siocnopen(&sp, iobase, comdefaultrate);
3026 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3027 ;
3028 c = inb(iobase + com_data);
3029 siocnclose(&sp, iobase);
3030 crit_exit();
3031 return (c);
3032 }
3033
3034 void
3035 siocnputc(void *private, int c)
3036 {
3037 int unit = (int)(intptr_t)private;
3038 struct siocnstate sp;
3039 Port_t iobase;
3040
3041 if (unit == siogdbunit)
3042 iobase = siogdbiobase;
3043 else
3044 iobase = siocniobase;
3045 crit_enter();
3046 siocnopen(&sp, iobase, comdefaultrate);
3047 siocntxwait(iobase);
3048 outb(iobase + com_data, c);
3049 siocnclose(&sp, iobase);
3050 crit_exit();
3051 }
3052
3053 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3054 DRIVER_MODULE(sio, acpi, sio_isa_driver, sio_devclass, 0, 0);
3055 #if NPCI > 0
3056 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3057 #endif
3058 #if NPUC > 0
3059 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0);
3060 #endif
DragonFly BSD