sys/sys/pciio.h

   1 /*-
   2  * Copyright (c) 1997, Stefan Esser <se@FreeBSD.ORG>
   3  * Copyright (c) 1997, 1998, 1999, Kenneth D. Merry <ken@FreeBSD.ORG>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice unmodified, this list of conditions, and the following
  11  *    disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  *      $FreeBSD: src/sys/sys/pciio.h,v 1.5 1999/12/08 17:44:04 ken Exp $
  28  *      $DragonFly: src/sys/sys/pciio.h,v 1.3 2006/05/20 02:42:13 dillon Exp $
  29  *
  30  */
  31
  32 #ifndef _SYS_PCIIO_H_
  33 #define _SYS_PCIIO_H_
  34
  35 #ifndef _SYS_TYPES_H_
  36 #include <sys/types.h>
  37 #endif
  38 #ifndef _SYS_IOCCOM_H_
  39 #include <sys/ioccom.h>
  40 #endif
  41
  42 #define PCI_MAXNAMELEN  16
  43
  44 typedef enum {
  45         PCI_GETCONF_LAST_DEVICE,
  46         PCI_GETCONF_LIST_CHANGED,
  47         PCI_GETCONF_MORE_DEVS,
  48         PCI_GETCONF_ERROR
  49 } pci_getconf_status;
  50
  51 typedef enum {
  52         PCI_GETCONF_NO_MATCH            = 0x0000,
  53         PCI_GETCONF_MATCH_DOMAIN        = 0x0001,
  54         PCI_GETCONF_MATCH_BUS           = 0x0002,
  55         PCI_GETCONF_MATCH_DEV           = 0x0004,
  56         PCI_GETCONF_MATCH_FUNC          = 0x0008,
  57         PCI_GETCONF_MATCH_NAME          = 0x0010,
  58         PCI_GETCONF_MATCH_UNIT          = 0x0020,
  59         PCI_GETCONF_MATCH_VENDOR        = 0x0040,
  60         PCI_GETCONF_MATCH_DEVICE        = 0x0080,
  61         PCI_GETCONF_MATCH_CLASS         = 0x0100
  62 } pci_getconf_flags;
  63
  64 struct pcisel {
  65         u_int32_t       pc_domain;      /* domain number */
  66         u_int8_t        pc_bus;         /* bus number */
  67         u_int8_t        pc_dev;         /* device on this bus */
  68         u_int8_t        pc_func;        /* function on this device */
  69 };
  70
  71 struct  pci_conf {
  72         struct pcisel   pc_sel;         /* bus+slot+function */
  73         u_int8_t        pc_hdr;         /* PCI header type */
  74         u_int16_t       pc_subvendor;   /* card vendor ID */
  75         u_int16_t       pc_subdevice;   /* card device ID, assigned by
  76                                            card vendor */
  77         u_int16_t       pc_vendor;      /* chip vendor ID */
  78         u_int16_t       pc_device;      /* chip device ID, assigned by
  79                                            chip vendor */
  80         u_int8_t        pc_class;       /* chip PCI class */
  81         u_int8_t        pc_subclass;    /* chip PCI subclass */
  82         u_int8_t        pc_progif;      /* chip PCI programming interface */
  83         u_int8_t        pc_revid;       /* chip revision ID */
  84         char            pd_name[PCI_MAXNAMELEN + 1];  /* device name */
  85         u_long          pd_unit;        /* device unit number */
  86 };
  87
  88 struct pci_match_conf {
  89         struct pcisel           pc_sel;         /* bus+slot+function */
  90         char                    pd_name[PCI_MAXNAMELEN + 1];  /* device name */
  91         u_long                  pd_unit;        /* Unit number */
  92         u_int16_t               pc_vendor;      /* PCI Vendor ID */
  93         u_int16_t               pc_device;      /* PCI Device ID */
  94         u_int8_t                pc_class;       /* PCI class */
  95         pci_getconf_flags       flags;          /* Matching expression */
  96 };
  97
  98 struct  pci_conf_io {
  99         u_int32_t               pat_buf_len;    /* pattern buffer length */
 100         u_int32_t               num_patterns;   /* number of patterns */
 101         struct pci_match_conf   *patterns;      /* pattern buffer */
 102         u_int32_t               match_buf_len;  /* match buffer length */
 103         u_int32_t               num_matches;    /* number of matches returned */
 104         struct pci_conf         *matches;       /* match buffer */
 105         u_int32_t               offset;         /* offset into device list */
 106         u_int32_t               generation;     /* device list generation */
 107         pci_getconf_status      status;         /* request status */
 108 };
 109
 110 struct pci_io {
 111         struct pcisel   pi_sel;         /* device to operate on */
 112         int             pi_reg;         /* configuration register to examine */
 113         int             pi_width;       /* width (in bytes) of read or write */
 114         u_int32_t       pi_data;        /* data to write or result of read */
 115 };
 116
 117 struct pci_bar_io {
 118         struct pcisel   pbi_sel;        /* device to operate on */
 119         int             pbi_reg;        /* starting address of BAR */
 120         int             pbi_enabled;    /* decoding enabled */
 121         uint64_t        pbi_base;       /* current value of BAR */
 122         uint64_t        pbi_length;     /* length of BAR */
 123 };
 124
 125 #define PCIOCGETCONF    _IOWR('p', 5, struct pci_conf_io)
 126 #define PCIOCREAD       _IOWR('p', 2, struct pci_io)
 127 #define PCIOCWRITE      _IOWR('p', 3, struct pci_io)
 128 #define PCIOCATTACHED   _IOWR('p', 4, struct pci_io)
 129 #define PCIOCGETBAR     _IOWR('p', 6, struct pci_bar_io)
 130
 131 #endif /* !_SYS_PCIIO_H_ */