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1 /* lance.c: An AMD LANCE ethernet driver for linux. */
2 /*
3 Written 1993,1994,1995 by Donald Becker.
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100 clone) ethercards.
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
18 Fixing alignment problem with 1.3.* kernel and some minor changes
19 by Andrey V. Savochkin, 1996.
21 Problems or questions may be send to Donald Becker (see above) or to
22 Andrey Savochkin -- saw@shade.msu.ru or
23 Laboratory of Computation Methods,
24 Department of Mathematics and Mechanics,
25 Moscow State University,
26 Leninskye Gory, Moscow 119899
28 But I should to inform you that I'm not an expert in the LANCE card
29 and it may occurs that you will receive no answer on your mail
30 to Donald Becker. I didn't receive any answer on all my letters
31 to him. Who knows why... But may be you are more lucky? ;-)
32 SAW
33 Fixed 7990 autoIRQ failure and reversed unneeded alignment. 8/20/96 djb
36 static const char *version = "lance.c:v1.09 Aug 20 1996 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
38 #include <linux/config.h>
39 #include <linux/kernel.h>
40 #include <linux/sched.h>
41 #include <linux/string.h>
42 #include <linux/ptrace.h>
43 #include <linux/errno.h>
44 #include <linux/ioport.h>
45 #include <linux/malloc.h>
46 #include <linux/interrupt.h>
47 #include <linux/pci.h>
48 #include <linux/bios32.h>
49 #include <linux/init.h>
50 #include <asm/bitops.h>
51 #include <asm/io.h>
52 #include <asm/dma.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
58 static unsigned int lance_portlist[] __initdata = {0x300, 0x320, 0x340, 0x360, 0};
59 void lance_probe1(int ioaddr);
61 #ifdef HAVE_DEVLIST
62 struct netdev_entry lance_drv =
63 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
64 #endif
66 #ifdef LANCE_DEBUG
67 int lance_debug = LANCE_DEBUG;
68 #else
69 int lance_debug = 1;
70 #endif
73 Theory of Operation
75 I. Board Compatibility
77 This device driver is designed for the AMD 79C960, the "PCnet-ISA
78 single-chip ethernet controller for ISA". This chip is used in a wide
79 variety of boards from vendors such as Allied Telesis, HP, Kingston,
80 and Boca. This driver is also intended to work with older AMD 7990
81 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
82 I use the name LANCE to refer to all of the AMD chips, even though it properly
83 refers only to the original 7990.
85 II. Board-specific settings
87 The driver is designed to work the boards that use the faster
88 bus-master mode, rather than in shared memory mode. (Only older designs
89 have on-board buffer memory needed to support the slower shared memory mode.)
91 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
92 channel. This driver probes the likely base addresses:
93 {0x300, 0x320, 0x340, 0x360}.
94 After the board is found it generates a DMA-timeout interrupt and uses
95 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
96 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
97 probed for by enabling each free DMA channel in turn and checking if
98 initialization succeeds.
100 The HP-J2405A board is an exception: with this board it's easy to read the
101 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
102 _know_ the base address -- that field is for writing the EEPROM.)
104 III. Driver operation
106 IIIa. Ring buffers
107 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
108 the base and length of the data buffer, along with status bits. The length
109 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
110 the buffer length (rather than being directly the buffer length) for
111 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
112 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
113 needlessly uses extra space and reduces the chance that an upper layer will
114 be able to reorder queued Tx packets based on priority. Decreasing the number
115 of entries makes it more difficult to achieve back-to-back packet transmission
116 and increases the chance that Rx ring will overflow. (Consider the worst case
117 of receiving back-to-back minimum-sized packets.)
119 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
120 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
121 avoid the administrative overhead. For the Rx side this avoids dynamically
122 allocating full-sized buffers "just in case", at the expense of a
123 memory-to-memory data copy for each packet received. For most systems this
124 is a good tradeoff: the Rx buffer will always be in low memory, the copy
125 is inexpensive, and it primes the cache for later packet processing. For Tx
126 the buffers are only used when needed as low-memory bounce buffers.
128 IIIB. 16M memory limitations.
129 For the ISA bus master mode all structures used directly by the LANCE,
130 the initialization block, Rx and Tx rings, and data buffers, must be
131 accessible from the ISA bus, i.e. in the lower 16M of real memory.
132 This is a problem for current Linux kernels on >16M machines. The network
133 devices are initialized after memory initialization, and the kernel doles out
134 memory from the top of memory downward. The current solution is to have a
135 special network initialization routine that's called before memory
136 initialization; this will eventually be generalized for all network devices.
137 As mentioned before, low-memory "bounce-buffers" are used when needed.
139 IIIC. Synchronization
140 The driver runs as two independent, single-threaded flows of control. One
141 is the send-packet routine, which enforces single-threaded use by the
142 dev->tbusy flag. The other thread is the interrupt handler, which is single
143 threaded by the hardware and other software.
145 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
146 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
147 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
148 the 'lp->tx_full' flag.
150 The interrupt handler has exclusive control over the Rx ring and records stats
151 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
152 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
153 stats.) After reaping the stats, it marks the queue entry as empty by setting
154 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
155 tx_full and tbusy flags.
159 /* Memory accessed from LANCE card must be aligned on 8-byte boundaries.
160 But we can't believe that kmalloc()'ed memory satisfies it. -- SAW */
161 #define LANCE_KMALLOC(x) \
162 ((void *) (((unsigned long)kmalloc((x)+7, GFP_DMA | GFP_KERNEL)+7) & ~7))
165 * Changes:
166 * Thomas Bogendoerfer (tsbogend@alpha.franken.de):
167 * - added support for Linux/Alpha, but removed most of it, because
168 * it worked only for the PCI chip.
169 * - added hook for the 32bit lance driver
170 * - added PCnetPCI II (79C970A) to chip table
171 * - made 32bit driver standalone
172 * - changed setting of autoselect bit
174 * Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
175 * - hopefully fix above so Linux/Alpha can use ISA cards too.
178 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
179 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
180 That translates to 4 and 4 (16 == 2^^4). */
181 #ifndef LANCE_LOG_TX_BUFFERS
182 #define LANCE_LOG_TX_BUFFERS 4
183 #define LANCE_LOG_RX_BUFFERS 4
184 #endif
186 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
187 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
188 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
190 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
191 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
192 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
194 #define PKT_BUF_SZ 1544
196 /* Offsets from base I/O address. */
197 #define LANCE_DATA 0x10
198 #define LANCE_ADDR 0x12
199 #define LANCE_RESET 0x14
200 #define LANCE_BUS_IF 0x16
201 #define LANCE_TOTAL_SIZE 0x18
203 /* The LANCE Rx and Tx ring descriptors. */
204 struct lance_rx_head {
205 s32 base;
206 s16 buf_length; /* This length is 2s complement (negative)! */
207 s16 msg_length; /* This length is "normal". */
210 struct lance_tx_head {
211 s32 base;
212 s16 length; /* Length is 2s complement (negative)! */
213 s16 misc;
216 /* The LANCE initialization block, described in databook. */
217 struct lance_init_block {
218 u16 mode; /* Pre-set mode (reg. 15) */
219 u8 phys_addr[6]; /* Physical ethernet address */
220 u32 filter[2]; /* Multicast filter (unused). */
221 /* Receive and transmit ring base, along with extra bits. */
222 u32 rx_ring; /* Tx and Rx ring base pointers */
223 u32 tx_ring;
226 struct lance_private {
227 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
228 struct lance_rx_head rx_ring[RX_RING_SIZE];
229 struct lance_tx_head tx_ring[TX_RING_SIZE];
230 struct lance_init_block init_block;
231 const char *name;
232 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
233 struct sk_buff* tx_skbuff[TX_RING_SIZE];
234 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
235 /* Tx low-memory "bounce buffer" address. */
236 char (*tx_bounce_buffs)[PKT_BUF_SZ];
237 int cur_rx, cur_tx; /* The next free ring entry */
238 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
239 int dma;
240 struct net_device_stats stats;
241 unsigned char chip_version; /* See lance_chip_type. */
242 char tx_full;
243 unsigned long lock;
246 #define LANCE_MUST_PAD 0x00000001
247 #define LANCE_ENABLE_AUTOSELECT 0x00000002
248 #define LANCE_MUST_REINIT_RING 0x00000004
249 #define LANCE_MUST_UNRESET 0x00000008
250 #define LANCE_HAS_MISSED_FRAME 0x00000010
251 #define PCNET32_POSSIBLE 0x00000020
253 /* A mapping from the chip ID number to the part number and features.
254 These are from the datasheets -- in real life the '970 version
255 reportedly has the same ID as the '965. */
256 static struct lance_chip_type {
257 int id_number;
258 const char *name;
259 int flags;
260 } chip_table[] = {
261 {0x0000, "LANCE 7990", /* Ancient lance chip. */
262 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
263 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
264 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
265 LANCE_HAS_MISSED_FRAME},
266 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
267 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
268 LANCE_HAS_MISSED_FRAME},
269 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
270 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
271 LANCE_HAS_MISSED_FRAME + PCNET32_POSSIBLE},
272 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
273 it the PCnet32. */
274 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
275 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
276 LANCE_HAS_MISSED_FRAME + PCNET32_POSSIBLE},
277 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
278 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
279 LANCE_HAS_MISSED_FRAME + PCNET32_POSSIBLE},
280 {0x0, "PCnet (unknown)",
281 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
282 LANCE_HAS_MISSED_FRAME},
285 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
287 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
288 static unsigned char pci_irq_line = 0;
290 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
291 Assume yes until we know the memory size. */
292 static unsigned char lance_need_isa_bounce_buffers = 1;
294 static int lance_open(struct device *dev);
295 static int lance_open_fail(struct device *dev);
296 static void lance_init_ring(struct device *dev);
297 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
298 static int lance_rx(struct device *dev);
299 static void lance_interrupt(int irq, void *dev_id, struct pt_regs *regs);
300 static int lance_close(struct device *dev);
301 static struct net_device_stats *lance_get_stats(struct device *dev);
302 static void set_multicast_list(struct device *dev);
306 /* This lance probe is unlike the other board probes in 1.0.*. The LANCE may
307 have to allocate a contiguous low-memory region for bounce buffers.
308 This requirement is satisfied by having the lance initialization occur
309 before the memory management system is started, and thus well before the
310 other probes. */
312 __initfunc(int lance_init(void))
314 int *port;
316 if (virt_to_bus(high_memory) <= 16*1024*1024)
317 lance_need_isa_bounce_buffers = 0;
319 #if defined(CONFIG_PCI) && !defined(CONFIG_PCNET32)
320 if (pcibios_present()) {
321 int pci_index;
322 if (lance_debug > 1)
323 printk("lance.c: PCI bios is present, checking for devices...\n");
324 for (pci_index = 0; pci_index < 8; pci_index++) {
325 unsigned char pci_bus, pci_device_fn;
326 unsigned int pci_ioaddr;
327 unsigned short pci_command;
329 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
330 PCI_DEVICE_ID_AMD_LANCE, pci_index,
331 &pci_bus, &pci_device_fn) != 0)
332 break;
333 pcibios_read_config_byte(pci_bus, pci_device_fn,
334 PCI_INTERRUPT_LINE, &pci_irq_line);
335 pcibios_read_config_dword(pci_bus, pci_device_fn,
336 PCI_BASE_ADDRESS_0, &pci_ioaddr);
337 /* Remove I/O space marker in bit 0. */
338 pci_ioaddr &= ~3;
339 /* PCI Spec 2.1 states that it is either the driver or PCI card's
340 * responsibility to set the PCI Master Enable Bit if needed.
341 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
343 pcibios_read_config_word(pci_bus, pci_device_fn,
344 PCI_COMMAND, &pci_command);
345 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
346 printk("PCI Master Bit has not been set. Setting...\n");
347 pci_command |= PCI_COMMAND_MASTER;
348 pcibios_write_config_word(pci_bus, pci_device_fn,
349 PCI_COMMAND, pci_command);
351 printk("Found PCnet/PCI at %#x, irq %d.\n",
352 pci_ioaddr, pci_irq_line);
353 lance_probe1(pci_ioaddr);
354 pci_irq_line = 0;
357 #endif /* defined(CONFIG_PCI) */
359 for (port = lance_portlist; *port; port++) {
360 int ioaddr = *port;
362 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
363 /* Detect "normal" 0x57 0x57 and the NI6510EB 0x52 0x44
364 signatures w/ minimal I/O reads */
365 char offset15, offset14 = inb(ioaddr + 14);
367 if ((offset14 == 0x52 || offset14 == 0x57) &&
368 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
369 lance_probe1(ioaddr);
372 return 0;
375 __initfunc(void lance_probe1(int ioaddr))
377 struct device *dev;
378 struct lance_private *lp;
379 short dma_channels; /* Mark spuriously-busy DMA channels */
380 int i, reset_val, lance_version;
381 const char *chipname;
382 /* Flags for specific chips or boards. */
383 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
384 int hp_builtin = 0; /* HP on-board ethernet. */
385 static int did_version = 0; /* Already printed version info. */
387 /* First we look for special cases.
388 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
389 There are two HP versions, check the BIOS for the configuration port.
390 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
392 if (readw(0x000f0102) == 0x5048) {
393 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
394 int hp_port = (readl(0x000f00f1) & 1) ? 0x499 : 0x99;
395 /* We can have boards other than the built-in! Verify this is on-board. */
396 if ((inb(hp_port) & 0xc0) == 0x80
397 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
398 hp_builtin = hp_port;
400 /* We also recognize the HP Vectra on-board here, but check below. */
401 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
402 && inb(ioaddr+2) == 0x09);
404 /* Reset the LANCE. */
405 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
407 /* The Un-Reset needed is only needed for the real NE2100, and will
408 confuse the HP board. */
409 if (!hpJ2405A)
410 outw(reset_val, ioaddr+LANCE_RESET);
412 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
413 if (inw(ioaddr+LANCE_DATA) != 0x0004)
414 return;
416 /* Get the version of the chip. */
417 outw(88, ioaddr+LANCE_ADDR);
418 if (inw(ioaddr+LANCE_ADDR) != 88) {
419 lance_version = 0;
420 } else { /* Good, it's a newer chip. */
421 int chip_version = inw(ioaddr+LANCE_DATA);
422 outw(89, ioaddr+LANCE_ADDR);
423 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
424 if (lance_debug > 2)
425 printk(" LANCE chip version is %#x.\n", chip_version);
426 if ((chip_version & 0xfff) != 0x003)
427 return;
428 chip_version = (chip_version >> 12) & 0xffff;
429 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
430 if (chip_table[lance_version].id_number == chip_version)
431 break;
435 #ifdef CONFIG_PCNET32
437 * if pcnet32 is configured and the chip is capable of 32bit mode
438 * leave the card alone
440 if (chip_table[lance_version].flags & PCNET32_POSSIBLE)
441 return;
442 #endif
444 dev = init_etherdev(0, 0);
445 dev->open = lance_open_fail;
446 chipname = chip_table[lance_version].name;
447 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
449 /* There is a 16 byte station address PROM at the base address.
450 The first six bytes are the station address. */
451 for (i = 0; i < 6; i++)
452 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
454 dev->base_addr = ioaddr;
455 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
457 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
458 lp = (struct lance_private *)(((unsigned long)kmalloc(sizeof(*lp)+7,
459 GFP_DMA | GFP_KERNEL)+7) & ~7);
460 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
461 memset(lp, 0, sizeof(*lp));
462 dev->priv = lp;
463 lp->name = chipname;
464 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
465 GFP_DMA | GFP_KERNEL);
466 if (lance_need_isa_bounce_buffers)
467 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
468 GFP_DMA | GFP_KERNEL);
469 else
470 lp->tx_bounce_buffs = NULL;
472 lp->chip_version = lance_version;
474 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
475 for (i = 0; i < 6; i++)
476 lp->init_block.phys_addr[i] = dev->dev_addr[i];
477 lp->init_block.filter[0] = 0x00000000;
478 lp->init_block.filter[1] = 0x00000000;
479 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
480 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
482 outw(0x0001, ioaddr+LANCE_ADDR);
483 inw(ioaddr+LANCE_ADDR);
484 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
485 outw(0x0002, ioaddr+LANCE_ADDR);
486 inw(ioaddr+LANCE_ADDR);
487 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
488 outw(0x0000, ioaddr+LANCE_ADDR);
489 inw(ioaddr+LANCE_ADDR);
491 if (pci_irq_line) {
492 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
493 dev->irq = pci_irq_line;
494 } else if (hp_builtin) {
495 static const char dma_tbl[4] = {3, 5, 6, 0};
496 static const char irq_tbl[4] = {3, 4, 5, 9};
497 unsigned char port_val = inb(hp_builtin);
498 dev->dma = dma_tbl[(port_val >> 4) & 3];
499 dev->irq = irq_tbl[(port_val >> 2) & 3];
500 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
501 } else if (hpJ2405A) {
502 static const char dma_tbl[4] = {3, 5, 6, 7};
503 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
504 short reset_val = inw(ioaddr+LANCE_RESET);
505 dev->dma = dma_tbl[(reset_val >> 2) & 3];
506 dev->irq = irq_tbl[(reset_val >> 4) & 7];
507 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
508 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
509 short bus_info;
510 outw(8, ioaddr+LANCE_ADDR);
511 bus_info = inw(ioaddr+LANCE_BUS_IF);
512 dev->dma = bus_info & 0x07;
513 dev->irq = (bus_info >> 4) & 0x0F;
514 } else {
515 /* The DMA channel may be passed in PARAM1. */
516 if (dev->mem_start & 0x07)
517 dev->dma = dev->mem_start & 0x07;
520 if (dev->dma == 0) {
521 /* Read the DMA channel status register, so that we can avoid
522 stuck DMA channels in the DMA detection below. */
523 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
524 (inb(DMA2_STAT_REG) & 0xf0);
526 if (dev->irq >= 2)
527 printk(" assigned IRQ %d", dev->irq);
528 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
529 /* To auto-IRQ we enable the initialization-done and DMA error
530 interrupts. For ISA boards we get a DMA error, but VLB and PCI
531 boards will work. */
532 autoirq_setup(0);
534 /* Trigger an initialization just for the interrupt. */
535 outw(0x0041, ioaddr+LANCE_DATA);
537 dev->irq = autoirq_report(2);
538 if (dev->irq)
539 printk(", probed IRQ %d", dev->irq);
540 else {
541 printk(", failed to detect IRQ line.\n");
542 return;
545 /* Check for the initialization done bit, 0x0100, which means
546 that we don't need a DMA channel. */
547 if (inw(ioaddr+LANCE_DATA) & 0x0100)
548 dev->dma = 4;
551 if (dev->dma == 4) {
552 printk(", no DMA needed.\n");
553 } else if (dev->dma) {
554 if (request_dma(dev->dma, chipname)) {
555 printk("DMA %d allocation failed.\n", dev->dma);
556 return;
557 } else
558 printk(", assigned DMA %d.\n", dev->dma);
559 } else { /* OK, we have to auto-DMA. */
560 for (i = 0; i < 4; i++) {
561 static const char dmas[] = { 5, 6, 7, 3 };
562 int dma = dmas[i];
563 int boguscnt;
565 /* Don't enable a permanently busy DMA channel, or the machine
566 will hang. */
567 if (test_bit(dma, &dma_channels))
568 continue;
569 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
570 if (request_dma(dma, chipname))
571 continue;
572 set_dma_mode(dma, DMA_MODE_CASCADE);
573 enable_dma(dma);
575 /* Trigger an initialization. */
576 outw(0x0001, ioaddr+LANCE_DATA);
577 for (boguscnt = 100; boguscnt > 0; --boguscnt)
578 if (inw(ioaddr+LANCE_DATA) & 0x0900)
579 break;
580 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
581 dev->dma = dma;
582 printk(", DMA %d.\n", dev->dma);
583 break;
584 } else {
585 disable_dma(dma);
586 free_dma(dma);
589 if (i == 4) { /* Failure: bail. */
590 printk("DMA detection failed.\n");
591 return;
595 if (lance_version == 0 && dev->irq == 0) {
596 /* We may auto-IRQ now that we have a DMA channel. */
597 /* Trigger an initialization just for the interrupt. */
598 autoirq_setup(0);
599 outw(0x0041, ioaddr+LANCE_DATA);
601 dev->irq = autoirq_report(4);
602 if (dev->irq == 0) {
603 printk(" Failed to detect the 7990 IRQ line.\n");
604 return;
606 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
609 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
610 /* Turn on auto-select of media (10baseT or BNC) so that the user
611 can watch the LEDs even if the board isn't opened. */
612 outw(0x0002, ioaddr+LANCE_ADDR);
613 /* set autoselect and clean xmausel */
614 outw((inw(ioaddr+LANCE_BUS_IF) & 0xfffe) | 0x0002, ioaddr+LANCE_BUS_IF);
617 if (lance_debug > 0 && did_version++ == 0)
618 printk(version);
620 /* The LANCE-specific entries in the device structure. */
621 dev->open = lance_open;
622 dev->hard_start_xmit = lance_start_xmit;
623 dev->stop = lance_close;
624 dev->get_stats = lance_get_stats;
625 dev->set_multicast_list = set_multicast_list;
627 return;
630 static int
631 lance_open_fail(struct device *dev)
633 return -ENODEV;
638 static int
639 lance_open(struct device *dev)
641 struct lance_private *lp = (struct lance_private *)dev->priv;
642 int ioaddr = dev->base_addr;
643 int i;
645 if (dev->irq == 0 ||
646 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
647 return -EAGAIN;
650 /* We used to allocate DMA here, but that was silly.
651 DMA lines can't be shared! We now permanently allocate them. */
653 /* Reset the LANCE */
654 inw(ioaddr+LANCE_RESET);
656 /* The DMA controller is used as a no-operation slave, "cascade mode". */
657 if (dev->dma != 4) {
658 enable_dma(dev->dma);
659 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
662 /* Un-Reset the LANCE, needed only for the NE2100. */
663 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
664 outw(0, ioaddr+LANCE_RESET);
666 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
667 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
668 outw(0x0002, ioaddr+LANCE_ADDR);
669 /* set autoselect and clean xmausel */
670 outw((inw(ioaddr+LANCE_BUS_IF) & 0xfffe) | 0x0002, ioaddr+LANCE_BUS_IF);
673 if (lance_debug > 1)
674 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
675 dev->name, dev->irq, dev->dma,
676 (u32) virt_to_bus(lp->tx_ring),
677 (u32) virt_to_bus(lp->rx_ring),
678 (u32) virt_to_bus(&lp->init_block));
680 lance_init_ring(dev);
681 /* Re-initialize the LANCE, and start it when done. */
682 outw(0x0001, ioaddr+LANCE_ADDR);
683 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
684 outw(0x0002, ioaddr+LANCE_ADDR);
685 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
687 outw(0x0004, ioaddr+LANCE_ADDR);
688 outw(0x0915, ioaddr+LANCE_DATA);
690 outw(0x0000, ioaddr+LANCE_ADDR);
691 outw(0x0001, ioaddr+LANCE_DATA);
693 dev->tbusy = 0;
694 dev->interrupt = 0;
695 dev->start = 1;
696 i = 0;
697 while (i++ < 100)
698 if (inw(ioaddr+LANCE_DATA) & 0x0100)
699 break;
701 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
702 * reports that doing so triggers a bug in the '974.
704 outw(0x0042, ioaddr+LANCE_DATA);
706 if (lance_debug > 2)
707 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
708 dev->name, i, (u32) virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
710 return 0; /* Always succeed */
713 /* The LANCE has been halted for one reason or another (busmaster memory
714 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
715 etc.). Modern LANCE variants always reload their ring-buffer
716 configuration when restarted, so we must reinitialize our ring
717 context before restarting. As part of this reinitialization,
718 find all packets still on the Tx ring and pretend that they had been
719 sent (in effect, drop the packets on the floor) - the higher-level
720 protocols will time out and retransmit. It'd be better to shuffle
721 these skbs to a temp list and then actually re-Tx them after
722 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
725 static void
726 lance_purge_tx_ring(struct device *dev)
728 struct lance_private *lp = (struct lance_private *)dev->priv;
729 int i;
731 for (i = 0; i < TX_RING_SIZE; i++) {
732 if (lp->tx_skbuff[i]) {
733 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
734 lp->tx_skbuff[i] = NULL;
740 /* Initialize the LANCE Rx and Tx rings. */
741 static void
742 lance_init_ring(struct device *dev)
744 struct lance_private *lp = (struct lance_private *)dev->priv;
745 int i;
747 lp->lock = 0, lp->tx_full = 0;
748 lp->cur_rx = lp->cur_tx = 0;
749 lp->dirty_rx = lp->dirty_tx = 0;
751 for (i = 0; i < RX_RING_SIZE; i++) {
752 lp->rx_ring[i].base = (u32)virt_to_bus((char *)lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
753 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
755 /* The Tx buffer address is filled in as needed, but we do need to clear
756 the upper ownership bit. */
757 for (i = 0; i < TX_RING_SIZE; i++) {
758 lp->tx_ring[i].base = 0;
761 lp->init_block.mode = 0x0000;
762 for (i = 0; i < 6; i++)
763 lp->init_block.phys_addr[i] = dev->dev_addr[i];
764 lp->init_block.filter[0] = 0x00000000;
765 lp->init_block.filter[1] = 0x00000000;
766 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
767 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
770 static void
771 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
773 struct lance_private *lp = (struct lance_private *)dev->priv;
775 if (must_reinit ||
776 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
777 lance_purge_tx_ring(dev);
778 lance_init_ring(dev);
780 outw(0x0000, dev->base_addr + LANCE_ADDR);
781 outw(csr0_bits, dev->base_addr + LANCE_DATA);
784 static int lance_start_xmit(struct sk_buff *skb, struct device *dev)
786 struct lance_private *lp = (struct lance_private *)dev->priv;
787 int ioaddr = dev->base_addr;
788 int entry;
789 unsigned long flags;
791 /* Transmitter timeout, serious problems. */
792 if (dev->tbusy) {
793 int tickssofar = jiffies - dev->trans_start;
794 if (tickssofar < 20)
795 return 1;
796 outw(0, ioaddr+LANCE_ADDR);
797 printk("%s: transmit timed out, status %4.4x, resetting.\n",
798 dev->name, inw(ioaddr+LANCE_DATA));
799 outw(0x0004, ioaddr+LANCE_DATA);
800 lp->stats.tx_errors++;
801 #ifndef final_version
803 int i;
804 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
805 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
806 lp->cur_rx);
807 for (i = 0 ; i < RX_RING_SIZE; i++)
808 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
809 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
810 lp->rx_ring[i].msg_length);
811 for (i = 0 ; i < TX_RING_SIZE; i++)
812 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
813 lp->tx_ring[i].base, -lp->tx_ring[i].length,
814 lp->tx_ring[i].misc);
815 printk("\n");
817 #endif
818 lance_restart(dev, 0x0043, 1);
820 dev->tbusy=0;
821 dev->trans_start = jiffies;
823 return 0;
826 if (lance_debug > 3) {
827 outw(0x0000, ioaddr+LANCE_ADDR);
828 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
829 inw(ioaddr+LANCE_DATA));
830 outw(0x0000, ioaddr+LANCE_DATA);
833 /* Block a timer-based transmit from overlapping. This could better be
834 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
835 if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
836 printk("%s: Transmitter access conflict.\n", dev->name);
837 return 1;
840 if (test_and_set_bit(0, (void*)&lp->lock) != 0) {
841 if (lance_debug > 0)
842 printk("%s: tx queue lock!.\n", dev->name);
843 /* don't clear dev->tbusy flag. */
844 return 1;
847 /* Fill in a Tx ring entry */
849 /* Mask to ring buffer boundary. */
850 entry = lp->cur_tx & TX_RING_MOD_MASK;
852 /* Caution: the write order is important here, set the base address
853 with the "ownership" bits last. */
855 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
856 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
857 lp->tx_ring[entry].length =
858 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
859 } else
860 lp->tx_ring[entry].length = -skb->len;
862 lp->tx_ring[entry].misc = 0x0000;
864 /* If any part of this buffer is >16M we must copy it to a low-memory
865 buffer. */
866 if ((u32)virt_to_bus(skb->data) + skb->len > 0x01000000) {
867 if (lance_debug > 5)
868 printk("%s: bouncing a high-memory packet (%#x).\n",
869 dev->name, (u32)virt_to_bus(skb->data));
870 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
871 lp->tx_ring[entry].base =
872 ((u32)virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
873 dev_kfree_skb (skb, FREE_WRITE);
874 } else {
875 lp->tx_skbuff[entry] = skb;
876 lp->tx_ring[entry].base = ((u32)virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
878 lp->cur_tx++;
879 lp->stats.tx_bytes+=skb->len;
881 /* Trigger an immediate send poll. */
882 outw(0x0000, ioaddr+LANCE_ADDR);
883 outw(0x0048, ioaddr+LANCE_DATA);
885 dev->trans_start = jiffies;
887 save_flags(flags);
888 cli();
889 lp->lock = 0;
890 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
891 dev->tbusy=0;
892 else
893 lp->tx_full = 1;
894 restore_flags(flags);
896 return 0;
899 /* The LANCE interrupt handler. */
900 static void
901 lance_interrupt(int irq, void *dev_id, struct pt_regs * regs)
903 struct device *dev = dev_id;
904 struct lance_private *lp;
905 int csr0, ioaddr, boguscnt=10;
906 int must_restart;
908 if (dev == NULL) {
909 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
910 return;
913 ioaddr = dev->base_addr;
914 lp = (struct lance_private *)dev->priv;
915 if (dev->interrupt)
916 printk("%s: Re-entering the interrupt handler.\n", dev->name);
918 dev->interrupt = 1;
920 outw(0x00, dev->base_addr + LANCE_ADDR);
921 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
922 && --boguscnt >= 0) {
923 /* Acknowledge all of the current interrupt sources ASAP. */
924 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
926 must_restart = 0;
928 if (lance_debug > 5)
929 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
930 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
932 if (csr0 & 0x0400) /* Rx interrupt */
933 lance_rx(dev);
935 if (csr0 & 0x0200) { /* Tx-done interrupt */
936 int dirty_tx = lp->dirty_tx;
938 while (dirty_tx < lp->cur_tx) {
939 int entry = dirty_tx & TX_RING_MOD_MASK;
940 int status = lp->tx_ring[entry].base;
942 if (status < 0)
943 break; /* It still hasn't been Txed */
945 lp->tx_ring[entry].base = 0;
947 if (status & 0x40000000) {
948 /* There was an major error, log it. */
949 int err_status = lp->tx_ring[entry].misc;
950 lp->stats.tx_errors++;
951 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
952 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
953 if (err_status & 0x1000) lp->stats.tx_window_errors++;
954 if (err_status & 0x4000) {
955 /* Ackk! On FIFO errors the Tx unit is turned off! */
956 lp->stats.tx_fifo_errors++;
957 /* Remove this verbosity later! */
958 printk("%s: Tx FIFO error! Status %4.4x.\n",
959 dev->name, csr0);
960 /* Restart the chip. */
961 must_restart = 1;
963 } else {
964 if (status & 0x18000000)
965 lp->stats.collisions++;
966 lp->stats.tx_packets++;
969 /* We must free the original skb if it's not a data-only copy
970 in the bounce buffer. */
971 if (lp->tx_skbuff[entry]) {
972 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
973 lp->tx_skbuff[entry] = 0;
975 dirty_tx++;
978 #ifndef final_version
979 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
980 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
981 dirty_tx, lp->cur_tx, lp->tx_full);
982 dirty_tx += TX_RING_SIZE;
984 #endif
986 if (lp->tx_full && dev->tbusy
987 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
988 /* The ring is no longer full, clear tbusy. */
989 lp->tx_full = 0;
990 dev->tbusy = 0;
991 mark_bh(NET_BH);
994 lp->dirty_tx = dirty_tx;
997 /* Log misc errors. */
998 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
999 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1000 if (csr0 & 0x0800) {
1001 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1002 dev->name, csr0);
1003 /* Restart the chip. */
1004 must_restart = 1;
1007 if (must_restart) {
1008 /* stop the chip to clear the error condition, then restart */
1009 outw(0x0000, dev->base_addr + LANCE_ADDR);
1010 outw(0x0004, dev->base_addr + LANCE_DATA);
1011 lance_restart(dev, 0x0002, 0);
1015 /* Clear any other interrupt, and set interrupt enable. */
1016 outw(0x0000, dev->base_addr + LANCE_ADDR);
1017 outw(0x7940, dev->base_addr + LANCE_DATA);
1019 if (lance_debug > 4)
1020 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1021 dev->name, inw(ioaddr + LANCE_ADDR),
1022 inw(dev->base_addr + LANCE_DATA));
1024 dev->interrupt = 0;
1025 return;
1028 static int
1029 lance_rx(struct device *dev)
1031 struct lance_private *lp = (struct lance_private *)dev->priv;
1032 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1033 int i;
1035 /* If we own the next entry, it's a new packet. Send it up. */
1036 while (lp->rx_ring[entry].base >= 0) {
1037 int status = lp->rx_ring[entry].base >> 24;
1039 if (status != 0x03) { /* There was an error. */
1040 /* There is a tricky error noted by John Murphy,
1041 <murf@perftech.com> to Russ Nelson: Even with full-sized
1042 buffers it's possible for a jabber packet to use two
1043 buffers, with only the last correctly noting the error. */
1044 if (status & 0x01) /* Only count a general error at the */
1045 lp->stats.rx_errors++; /* end of a packet.*/
1046 if (status & 0x20) lp->stats.rx_frame_errors++;
1047 if (status & 0x10) lp->stats.rx_over_errors++;
1048 if (status & 0x08) lp->stats.rx_crc_errors++;
1049 if (status & 0x04) lp->stats.rx_fifo_errors++;
1050 lp->rx_ring[entry].base &= 0x03ffffff;
1052 else
1054 /* Malloc up new buffer, compatible with net3. */
1055 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1056 struct sk_buff *skb;
1058 if(pkt_len<60)
1060 printk("%s: Runt packet!\n",dev->name);
1061 lp->stats.rx_errors++;
1063 else
1065 skb = dev_alloc_skb(pkt_len+2);
1066 if (skb == NULL)
1068 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1069 for (i=0; i < RX_RING_SIZE; i++)
1070 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1071 break;
1073 if (i > RX_RING_SIZE -2)
1075 lp->stats.rx_dropped++;
1076 lp->rx_ring[entry].base |= 0x80000000;
1077 lp->cur_rx++;
1079 break;
1081 skb->dev = dev;
1082 skb_reserve(skb,2); /* 16 byte align */
1083 skb_put(skb,pkt_len); /* Make room */
1084 eth_copy_and_sum(skb,
1085 (unsigned char *)bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1086 pkt_len,0);
1087 lp->stats.rx_bytes+=skb->len;
1088 skb->protocol=eth_type_trans(skb,dev);
1089 lp->stats.rx_packets++;
1090 netif_rx(skb);
1093 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1094 of QNX reports that some revs of the 79C965 clear it. */
1095 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1096 lp->rx_ring[entry].base |= 0x80000000;
1097 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1100 /* We should check that at least two ring entries are free. If not,
1101 we should free one and mark stats->rx_dropped++. */
1103 return 0;
1106 static int
1107 lance_close(struct device *dev)
1109 int ioaddr = dev->base_addr;
1110 struct lance_private *lp = (struct lance_private *)dev->priv;
1112 dev->start = 0;
1113 dev->tbusy = 1;
1115 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1116 outw(112, ioaddr+LANCE_ADDR);
1117 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1119 outw(0, ioaddr+LANCE_ADDR);
1121 if (lance_debug > 1)
1122 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1123 dev->name, inw(ioaddr+LANCE_DATA));
1125 /* We stop the LANCE here -- it occasionally polls
1126 memory if we don't. */
1127 outw(0x0004, ioaddr+LANCE_DATA);
1129 if (dev->dma != 4)
1130 disable_dma(dev->dma);
1132 free_irq(dev->irq, dev);
1134 return 0;
1137 static struct net_device_stats *lance_get_stats(struct device *dev)
1139 struct lance_private *lp = (struct lance_private *)dev->priv;
1140 short ioaddr = dev->base_addr;
1141 short saved_addr;
1142 unsigned long flags;
1144 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1145 save_flags(flags);
1146 cli();
1147 saved_addr = inw(ioaddr+LANCE_ADDR);
1148 outw(112, ioaddr+LANCE_ADDR);
1149 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1150 outw(saved_addr, ioaddr+LANCE_ADDR);
1151 restore_flags(flags);
1154 return &lp->stats;
1157 /* Set or clear the multicast filter for this adaptor.
1160 static void set_multicast_list(struct device *dev)
1162 short ioaddr = dev->base_addr;
1164 outw(0, ioaddr+LANCE_ADDR);
1165 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1167 if (dev->flags&IFF_PROMISC) {
1168 /* Log any net taps. */
1169 printk("%s: Promiscuous mode enabled.\n", dev->name);
1170 outw(15, ioaddr+LANCE_ADDR);
1171 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1172 } else {
1173 short multicast_table[4];
1174 int i;
1175 int num_addrs=dev->mc_count;
1176 if(dev->flags&IFF_ALLMULTI)
1177 num_addrs=1;
1178 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1179 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1180 for (i = 0; i < 4; i++) {
1181 outw(8 + i, ioaddr+LANCE_ADDR);
1182 outw(multicast_table[i], ioaddr+LANCE_DATA);
1184 outw(15, ioaddr+LANCE_ADDR);
1185 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1188 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1194 * Local variables:
1195 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c lance.c"
1196 * c-indent-level: 4
1197 * tab-width: 4
1198 * End: