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Import 2.1.81
[davej-history.git] / drivers / isdn / hisax / elsa.c
blob430d2409c5a7e31f3ed2b6f430afc13736b234c6
1 /* $Id: elsa.c,v 1.14 1997/04/13 19:53:25 keil Exp $
2
3 * elsa.c low level stuff for Elsa isdn cards
4 *
5 * Author Karsten Keil (keil@temic-ech.spacenet.de)
6 *
7 * Thanks to Elsa GmbH for documents and informations
8 *
9 *
10 * $Log: elsa.c,v $
11 * Revision 1.14 1997/04/13 19:53:25 keil
12 * Fixed QS1000 init, change in IRQ check delay for SMP
13 *
14 * Revision 1.13 1997/04/07 22:58:07 keil
15 * need include config.h
16 *
17 * Revision 1.12 1997/04/06 22:54:14 keil
18 * Using SKB's
19 *
20 * Revision 1.11 1997/03/23 21:45:46 keil
21 * Add support for ELSA PCMCIA
22 *
23 * Revision 1.10 1997/03/12 21:42:19 keil
24 * Bugfix: IRQ hangs with QS1000
25 *
26 * Revision 1.9 1997/03/04 15:57:39 keil
27 * bugfix IRQ reset Quickstep, ELSA PC changes, some stuff for new cards
28 *
29 * Revision 1.8 1997/01/27 15:51:48 keil
30 * SMP proof,cosmetics
31 *
32 * Revision 1.7 1997/01/21 22:20:48 keil
33 * Elsa Quickstep support
34 *
35 * Revision 1.6 1997/01/09 18:22:46 keil
36 * one more PCC-8 fix
37 *
38 * Revision 1.5 1996/12/08 19:46:14 keil
39 * PCC-8 correct IRQs; starting ARCOFI support
40 *
41 * Revision 1.4 1996/11/18 20:50:54 keil
42 * with PCF Pro release 16 Byte IO
43 *
44 * Revision 1.3 1996/11/18 15:33:04 keil
45 * PCC and PCFPro support
46 *
47 * Revision 1.2 1996/10/27 22:08:03 keil
48 * cosmetic changes
49 *
50 * Revision 1.1 1996/10/13 20:04:52 keil
51 * Initial revision
52 *
53 *
54 */
55
56 #define ARCOFI_USE 0
57
58 #define __NO_VERSION__
59 #include <linux/config.h>
60 #include "siemens.h"
61 #include "hisax.h"
62 #include "elsa.h"
63 #include "isdnl1.h"
64 #include <linux/kernel_stat.h>
65
66 extern const char *CardType[];
67
68 const char *Elsa_revision = "$Revision: 1.14 $";
69 const char *Elsa_Types[] =
70 {"None", "PC", "PCC-8", "PCC-16", "PCF", "PCF-Pro",
71 "PCMCIA", "QS 1000", "QS 3000"};
72
73 const char *ITACVer[] =
74 {"?0?", "?1?", "?2?", "?3?", "?4?", "V2.2",
75 "B1", "A1"};
76
77 #define byteout(addr,val) outb_p(val,addr)
78 #define bytein(addr) inb_p(addr)
79
80 static inline u_char
81 readhscx(unsigned int adr, int hscx, u_char off)
82 {
83 register u_char ret;
84 long flags;
85
86 save_flags(flags);
87 cli();
88 byteout(adr + CARD_ALE, off + (hscx ? 0x60 : 0x20));
89 ret = bytein(adr + CARD_HSCX);
90 restore_flags(flags);
91 return (ret);
92 }
93
94 static inline void
95 read_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)
96 {
97 /* fifo read without cli because it's allready done */
98
99 byteout(adr + CARD_ALE, (hscx ? 0x40 : 0));
100 insb(adr + CARD_HSCX, data, size);
101 }
102
103
104 static inline void
105 writehscx(unsigned int adr, int hscx, u_char off, u_char data)
106 {
107 long flags;
108
109 save_flags(flags);
110 cli();
111 byteout(adr + CARD_ALE, off + (hscx ? 0x60 : 0x20));
112 byteout(adr + CARD_HSCX, data);
113 restore_flags(flags);
114 }
115
116 static inline void
117 write_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)
118 {
119 /* fifo write without cli because it's allready done */
120 byteout(adr + CARD_ALE, (hscx ? 0x40 : 0));
121 outsb(adr + CARD_HSCX, data, size);
122 }
123
124 static inline u_char
125 readisac(unsigned int adr, u_char off)
126 {
127 register u_char ret;
128 long flags;
129
130 save_flags(flags);
131 cli();
132 byteout(adr + CARD_ALE, off + 0x20);
133 ret = bytein(adr + CARD_ISAC);
134 restore_flags(flags);
135 return (ret);
136 }
137
138 static inline void
139 read_fifo_isac(unsigned int adr, u_char * data, int size)
140 {
141 /* fifo read without cli because it's allready done */
142
143 byteout(adr + CARD_ALE, 0);
144 insb(adr + CARD_ISAC, data, size);
145 }
146
147
148 static inline void
149 writeisac(unsigned int adr, u_char off, u_char data)
150 {
151 long flags;
152
153 save_flags(flags);
154 cli();
155 byteout(adr + CARD_ALE, off + 0x20);
156 byteout(adr + CARD_ISAC, data);
157 restore_flags(flags);
158 }
159
160 static inline void
161 write_fifo_isac(unsigned int adr, u_char * data, int size)
162 {
163 /* fifo write without cli because it's allready done */
164
165 byteout(adr + CARD_ALE, 0);
166 outsb(adr + CARD_ISAC, data, size);
167 }
168
169 #ifdef CONFIG_HISAX_ELSA_PCC
170 static inline u_char
171 readitac(unsigned int adr, u_char off)
172 {
173 register u_char ret;
174 long flags;
175
176 save_flags(flags);
177 cli();
178 byteout(adr + CARD_ALE, off);
179 ret = bytein(adr + CARD_ITAC);
180 restore_flags(flags);
181 return (ret);
182 }
183
184 static inline void
185 writeitac(unsigned int adr, u_char off, u_char data)
186 {
187 long flags;
188
189 save_flags(flags);
190 cli();
191 byteout(adr + CARD_ALE, off);
192 byteout(adr + CARD_ITAC, data);
193 restore_flags(flags);
194 }
195
196 static inline int
197 TimerRun(struct IsdnCardState *sp)
198 {
199 register u_char val;
200
201 val = bytein(sp->cfg_reg + CARD_CONFIG);
202 if (sp->subtyp == ELSA_QS1000)
203 return (0 == (val & TIMER_RUN));
204 else if (sp->subtyp == ELSA_PCC8)
205 return (val & TIMER_RUN_PCC8);
206 return (val & TIMER_RUN);
207 }
208
209 static inline void
210 elsa_led_handler(struct IsdnCardState *sp)
211 {
212
213 u_char outval = 0xf0;
214 int stat = 0, cval;
215
216
217 if ((sp->ph_state == 0) || (sp->ph_state == 15)) {
218 stat = 1;
219 } else {
220 if (sp->hs[0].mode != 0)
221 stat |= 2;
222 if (sp->hs[1].mode != 0)
223 stat |= 4;
224 }
225 cval = (sp->counter >> 6) & 3;
226 switch (cval) {
227 case 0:
228 if (!stat)
229 outval |= STAT_LED;
230 else if (stat == 1)
231 outval |= LINE_LED | STAT_LED;
232 else {
233 if (stat & 2)
234 outval |= STAT_LED;
235 if (stat & 4)
236 outval |= LINE_LED;
237 }
238 break;
239 case 1:
240 if (!stat)
241 outval |= LINE_LED;
242 else if (stat == 1)
243 outval |= LINE_LED | STAT_LED;
244 else {
245 if (stat & 2)
246 outval |= STAT_LED;
247 if (stat & 4)
248 outval |= LINE_LED;
249 }
250 break;
251 case 2:
252 if (!stat)
253 outval |= STAT_LED;
254 else if (stat == 1)
255 outval |= 0;
256 else {
257 if (stat & 2)
258 outval |= STAT_LED;
259 if (stat & 4)
260 outval |= LINE_LED;
261 }
262 break;
263 case 3:
264 if (!stat)
265 outval |= LINE_LED;
266 break;
267 }
268 byteout(sp->cfg_reg + CARD_CONTROL, outval);
269 }
270 #endif
271
272 static inline void
273 waitforCEC(int adr, int hscx)
274 {
275 int to = 50;
276
277 while ((readhscx(adr, hscx, HSCX_STAR) & 0x04) && to) {
278 udelay(1);
279 to--;
280 }
281 if (!to)
282 printk(KERN_WARNING "Elsa: waitforCEC timeout\n");
283 }
284
285
286 static inline void
287 waitforXFW(int adr, int hscx)
288 {
289 int to = 50;
290
291 while ((!(readhscx(adr, hscx, HSCX_STAR) & 0x44) == 0x40) && to) {
292 udelay(1);
293 to--;
294 }
295 if (!to)
296 printk(KERN_WARNING "Elsa: waitforXFW timeout\n");
297 }
298
299 static inline void
300 writehscxCMDR(int adr, int hscx, u_char data)
301 {
302 long flags;
303
304 save_flags(flags);
305 cli();
306 waitforCEC(adr, hscx);
307 writehscx(adr, hscx, HSCX_CMDR, data);
308 restore_flags(flags);
309 }
310
311 /*
312 * fast interrupt here
313 */
314
315
316 static void
317 hscxreport(struct IsdnCardState *sp, int hscx)
318 {
319 printk(KERN_DEBUG "HSCX %d\n", hscx);
320 printk(KERN_DEBUG "ISTA %x\n", readhscx(sp->cfg_reg, hscx, HSCX_ISTA));
321 printk(KERN_DEBUG "STAR %x\n", readhscx(sp->cfg_reg, hscx, HSCX_STAR));
322 printk(KERN_DEBUG "EXIR %x\n", readhscx(sp->cfg_reg, hscx, HSCX_EXIR));
323 }
324
325 void
326 elsa_report(struct IsdnCardState *sp)
327 {
328 printk(KERN_DEBUG "ISAC\n");
329 printk(KERN_DEBUG "ISTA %x\n", readisac(sp->cfg_reg, ISAC_ISTA));
330 printk(KERN_DEBUG "STAR %x\n", readisac(sp->cfg_reg, ISAC_STAR));
331 printk(KERN_DEBUG "EXIR %x\n", readisac(sp->cfg_reg, ISAC_EXIR));
332 hscxreport(sp, 0);
333 hscxreport(sp, 1);
334 }
335
336 /*
337 * HSCX stuff goes here
338 */
339
340 static void
341 hscx_empty_fifo(struct HscxState *hsp, int count)
342 {
343 u_char *ptr;
344 struct IsdnCardState *sp = hsp->sp;
345 long flags;
346
347 if ((sp->debug & L1_DEB_HSCX) && !(sp->debug & L1_DEB_HSCX_FIFO))
348 debugl1(sp, "hscx_empty_fifo");
349
350 if (hsp->rcvidx + count > HSCX_BUFMAX) {
351 if (sp->debug & L1_DEB_WARN)
352 debugl1(sp, "hscx_empty_fifo: incoming packet too large");
353 writehscxCMDR(sp->cfg_reg, hsp->hscx, 0x80);
354 hsp->rcvidx = 0;
355 return;
356 }
357 ptr = hsp->rcvbuf + hsp->rcvidx;
358 hsp->rcvidx += count;
359 save_flags(flags);
360 cli();
361 read_fifo_hscx(sp->cfg_reg, hsp->hscx, ptr, count);
362 writehscxCMDR(sp->cfg_reg, hsp->hscx, 0x80);
363 restore_flags(flags);
364 if (sp->debug & L1_DEB_HSCX_FIFO) {
365 char tmp[128];
366 char *t = tmp;
367
368 t += sprintf(t, "hscx_empty_fifo %c cnt %d",
369 hsp->hscx ? 'B' : 'A', count);
370 QuickHex(t, ptr, count);
371 debugl1(sp, tmp);
372 }
373 }
374
375 static void
376 hscx_fill_fifo(struct HscxState *hsp)
377 {
378 struct IsdnCardState *sp = hsp->sp;
379 int more, count;
380 u_char *ptr;
381 long flags;
382
383
384 if ((sp->debug & L1_DEB_HSCX) && !(sp->debug & L1_DEB_HSCX_FIFO))
385 debugl1(sp, "hscx_fill_fifo");
386
387 if (!hsp->tx_skb)
388 return;
389 if (hsp->tx_skb->len <= 0)
390 return;
391
392 more = (hsp->mode == 1) ? 1 : 0;
393 if (hsp->tx_skb->len > 32) {
394 more = !0;
395 count = 32;
396 } else
397 count = hsp->tx_skb->len;
398
399 waitforXFW(sp->cfg_reg, hsp->hscx);
400 save_flags(flags);
401 cli();
402 ptr = hsp->tx_skb->data;
403 skb_pull(hsp->tx_skb, count);
404 hsp->tx_cnt -= count;
405 hsp->count += count;
406 write_fifo_hscx(sp->cfg_reg, hsp->hscx, ptr, count);
407 writehscxCMDR(sp->cfg_reg, hsp->hscx, more ? 0x8 : 0xa);
408 restore_flags(flags);
409 if (sp->debug & L1_DEB_HSCX_FIFO) {
410 char tmp[128];
411 char *t = tmp;
412
413 t += sprintf(t, "hscx_fill_fifo %c cnt %d",
414 hsp->hscx ? 'B' : 'A', count);
415 QuickHex(t, ptr, count);
416 debugl1(sp, tmp);
417 }
418 }
419
420 static inline void
421 hscx_interrupt(struct IsdnCardState *sp, u_char val, u_char hscx)
422 {
423 u_char r;
424 struct HscxState *hsp = sp->hs + hscx;
425 struct sk_buff *skb;
426 int count;
427 char tmp[32];
428
429 if (!hsp->init)
430 return;
431
432 if (val & 0x80) { /* RME */
433
434 r = readhscx(sp->cfg_reg, hsp->hscx, HSCX_RSTA);
435 if ((r & 0xf0) != 0xa0) {
436 if (!r & 0x80)
437 if (sp->debug & L1_DEB_WARN)
438 debugl1(sp, "HSCX invalid frame");
439 if ((r & 0x40) && hsp->mode)
440 if (sp->debug & L1_DEB_WARN) {
441 sprintf(tmp, "HSCX RDO mode=%d",
442 hsp->mode);
443 debugl1(sp, tmp);
444 }
445 if (!r & 0x20)
446 if (sp->debug & L1_DEB_WARN)
447 debugl1(sp, "HSCX CRC error");
448 writehscxCMDR(sp->cfg_reg, hsp->hscx, 0x80);
449 } else {
450 count = readhscx(sp->cfg_reg, hsp->hscx, HSCX_RBCL) & 0x1f;
451 if (count == 0)
452 count = 32;
453 hscx_empty_fifo(hsp, count);
454 if ((count = hsp->rcvidx - 1) > 0) {
455 if (sp->debug & L1_DEB_HSCX_FIFO) {
456 sprintf(tmp, "HX Frame %d", count);
457 debugl1(sp, tmp);
458 }
459 if (!(skb = dev_alloc_skb(count)))
460 printk(KERN_WARNING "Elsa: receive out of memory\n");
461 else {
462 memcpy(skb_put(skb, count), hsp->rcvbuf, count);
463 skb_queue_tail(&hsp->rqueue, skb);
464 }
465 }
466 }
467 hsp->rcvidx = 0;
468 hscx_sched_event(hsp, HSCX_RCVBUFREADY);
469 }
470 if (val & 0x40) { /* RPF */
471 hscx_empty_fifo(hsp, 32);
472 if (hsp->mode == 1) {
473 /* receive audio data */
474 if (!(skb = dev_alloc_skb(32)))
475 printk(KERN_WARNING "elsa: receive out of memory\n");
476 else {
477 memcpy(skb_put(skb, 32), hsp->rcvbuf, 32);
478 skb_queue_tail(&hsp->rqueue, skb);
479 }
480 hsp->rcvidx = 0;
481 hscx_sched_event(hsp, HSCX_RCVBUFREADY);
482 }
483 }
484 if (val & 0x10) { /* XPR */
485 if (hsp->tx_skb)
486 if (hsp->tx_skb->len) {
487 hscx_fill_fifo(hsp);
488 return;
489 } else {
490 SET_SKB_FREE(hsp->tx_skb);
491 dev_kfree_skb(hsp->tx_skb, FREE_WRITE);
492 hsp->count = 0;
493 if (hsp->st->l4.l1writewakeup)
494 hsp->st->l4.l1writewakeup(hsp->st);
495 hsp->tx_skb = NULL;
496 }
497 if ((hsp->tx_skb = skb_dequeue(&hsp->squeue))) {
498 hsp->count = 0;
499 hscx_fill_fifo(hsp);
500 } else
501 hscx_sched_event(hsp, HSCX_XMTBUFREADY);
502 }
503 }
504
505 /*
506 * ISAC stuff goes here
507 */
508
509 static void
510 isac_empty_fifo(struct IsdnCardState *sp, int count)
511 {
512 u_char *ptr;
513 long flags;
514
515 if ((sp->debug & L1_DEB_ISAC) && !(sp->debug & L1_DEB_ISAC_FIFO))
516 debugl1(sp, "isac_empty_fifo");
517
518 if ((sp->rcvidx + count) >= MAX_DFRAME_LEN) {
519 if (sp->debug & L1_DEB_WARN) {
520 char tmp[40];
521 sprintf(tmp, "isac_empty_fifo overrun %d",
522 sp->rcvidx + count);
523 debugl1(sp, tmp);
524 }
525 writeisac(sp->cfg_reg, ISAC_CMDR, 0x80);
526 sp->rcvidx = 0;
527 return;
528 }
529 ptr = sp->rcvbuf + sp->rcvidx;
530 sp->rcvidx += count;
531 save_flags(flags);
532 cli();
533 read_fifo_isac(sp->cfg_reg, ptr, count);
534 writeisac(sp->cfg_reg, ISAC_CMDR, 0x80);
535 restore_flags(flags);
536 if (sp->debug & L1_DEB_ISAC_FIFO) {
537 char tmp[128];
538 char *t = tmp;
539
540 t += sprintf(t, "isac_empty_fifo cnt %d", count);
541 QuickHex(t, ptr, count);
542 debugl1(sp, tmp);
543 }
544 }
545
546 static void
547 isac_fill_fifo(struct IsdnCardState *sp)
548 {
549 int count, more;
550 u_char *ptr;
551 long flags;
552
553 if ((sp->debug & L1_DEB_ISAC) && !(sp->debug & L1_DEB_ISAC_FIFO))
554 debugl1(sp, "isac_fill_fifo");
555
556 if (!sp->tx_skb)
557 return;
558
559 count = sp->tx_skb->len;
560 if (count <= 0)
561 return;
562
563 more = 0;
564 if (count > 32) {
565 more = !0;
566 count = 32;
567 }
568 save_flags(flags);
569 cli();
570 ptr = sp->tx_skb->data;
571 skb_pull(sp->tx_skb, count);
572 sp->tx_cnt += count;
573 write_fifo_isac(sp->cfg_reg, ptr, count);
574 writeisac(sp->cfg_reg, ISAC_CMDR, more ? 0x8 : 0xa);
575 restore_flags(flags);
576 if (sp->debug & L1_DEB_ISAC_FIFO) {
577 char tmp[128];
578 char *t = tmp;
579
580 t += sprintf(t, "isac_fill_fifo cnt %d", count);
581 QuickHex(t, ptr, count);
582 debugl1(sp, tmp);
583 }
584 }
585
586 static void
587 ph_command(struct IsdnCardState *sp, unsigned int command)
588 {
589 if (sp->debug & L1_DEB_ISAC) {
590 char tmp[32];
591 sprintf(tmp, "ph_command %d", command);
592 debugl1(sp, tmp);
593 }
594 writeisac(sp->cfg_reg, ISAC_CIX0, (command << 2) | 3);
595 }
596
597 static inline void
598 isac_interrupt(struct IsdnCardState *sp, u_char val)
599 {
600 u_char exval, v1;
601 struct sk_buff *skb;
602 unsigned int count;
603 char tmp[32];
604 #if ARCOFI_USE
605 struct BufHeader *ibh;
606 u_char *ptr;
607 #endif
608
609 if (sp->debug & L1_DEB_ISAC) {
610 sprintf(tmp, "ISAC interrupt %x", val);
611 debugl1(sp, tmp);
612 }
613 if (val & 0x80) { /* RME */
614 exval = readisac(sp->cfg_reg, ISAC_RSTA);
615 if ((exval & 0x70) != 0x20) {
616 if (exval & 0x40)
617 if (sp->debug & L1_DEB_WARN)
618 debugl1(sp, "ISAC RDO");
619 if (!exval & 0x20)
620 if (sp->debug & L1_DEB_WARN)
621 debugl1(sp, "ISAC CRC error");
622 writeisac(sp->cfg_reg, ISAC_CMDR, 0x80);
623 } else {
624 count = readisac(sp->cfg_reg, ISAC_RBCL) & 0x1f;
625 if (count == 0)
626 count = 32;
627 isac_empty_fifo(sp, count);
628 if ((count = sp->rcvidx) > 0) {
629 sp->rcvidx = 0;
630 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
631 printk(KERN_WARNING "Elsa: D receive out of memory\n");
632 else {
633 memcpy(skb_put(skb, count), sp->rcvbuf, count);
634 skb_queue_tail(&sp->rq, skb);
635 }
636 }
637 }
638 sp->rcvidx = 0;
639 isac_sched_event(sp, ISAC_RCVBUFREADY);
640 }
641 if (val & 0x40) { /* RPF */
642 isac_empty_fifo(sp, 32);
643 }
644 if (val & 0x20) { /* RSC */
645 /* never */
646 if (sp->debug & L1_DEB_WARN)
647 debugl1(sp, "ISAC RSC interrupt");
648 }
649 if (val & 0x10) { /* XPR */
650 if (sp->tx_skb)
651 if (sp->tx_skb->len) {
652 isac_fill_fifo(sp);
653 goto afterXPR;
654 } else {
655 SET_SKB_FREE(sp->tx_skb);
656 dev_kfree_skb(sp->tx_skb, FREE_WRITE);
657 sp->tx_cnt = 0;
658 sp->tx_skb = NULL;
659 }
660 if ((sp->tx_skb = skb_dequeue(&sp->sq))) {
661 sp->tx_cnt = 0;
662 isac_fill_fifo(sp);
663 } else
664 isac_sched_event(sp, ISAC_XMTBUFREADY);
665 }
666 afterXPR:
667 if (val & 0x04) { /* CISQ */
668 sp->ph_state = (readisac(sp->cfg_reg, ISAC_CIX0) >> 2)
669 & 0xf;
670 if (sp->debug & L1_DEB_ISAC) {
671 sprintf(tmp, "l1state %d", sp->ph_state);
672 debugl1(sp, tmp);
673 }
674 isac_new_ph(sp);
675 }
676 if (val & 0x02) { /* SIN */
677 /* never */
678 if (sp->debug & L1_DEB_WARN)
679 debugl1(sp, "ISAC SIN interrupt");
680 }
681 if (val & 0x01) { /* EXI */
682 exval = readisac(sp->cfg_reg, ISAC_EXIR);
683 if (sp->debug & L1_DEB_WARN) {
684 sprintf(tmp, "ISAC EXIR %02x", exval);
685 debugl1(sp, tmp);
686 }
687 if (exval & 0x08) {
688 v1 = readisac(sp->cfg_reg, ISAC_MOSR);
689 if (sp->debug & L1_DEB_WARN) {
690 sprintf(tmp, "ISAC MOSR %02x", v1);
691 debugl1(sp, tmp);
692 }
693 #if ARCOFI_USE
694 if (v1 & 0x08) {
695 if (!sp->mon_rx)
696 if (BufPoolGet(&(sp->mon_rx), &(sp->rbufpool),
697 GFP_ATOMIC, (void *) 1, 3)) {
698 if (sp->debug & L1_DEB_WARN)
699 debugl1(sp, "ISAC MON RX out of buffers!");
700 writeisac(sp->cfg_reg, ISAC_MOCR, 0x0a);
701 goto afterMONR0;
702 } else
703 sp->mon_rxp = 0;
704 ibh = sp->mon_rx;
705 ptr = DATAPTR(ibh);
706 ptr += sp->mon_rxp;
707 sp->mon_rxp++;
708 if (sp->mon_rxp >= 3072) {
709 writeisac(sp->cfg_reg, ISAC_MOCR, 0x0a);
710 sp->mon_rxp = 0;
711 if (sp->debug & L1_DEB_WARN)
712 debugl1(sp, "ISAC MON RX overflow!");
713 goto afterMONR0;
714 }
715 *ptr = readisac(sp->cfg_reg, ISAC_MOR0);
716 if (sp->debug & L1_DEB_WARN) {
717 sprintf(tmp, "ISAC MOR0 %02x", *ptr);
718 debugl1(sp, tmp);
719 }
720 }
721 afterMONR0:
722 if (v1 & 0x80) {
723 if (!sp->mon_rx)
724 if (BufPoolGet(&(sp->mon_rx), &(sp->rbufpool),
725 GFP_ATOMIC, (void *) 1, 3)) {
726 if (sp->debug & L1_DEB_WARN)
727 debugl1(sp, "ISAC MON RX out of buffers!");
728 writeisac(sp->cfg_reg, ISAC_MOCR, 0xa0);
729 goto afterMONR1;
730 } else
731 sp->mon_rxp = 0;
732 ibh = sp->mon_rx;
733 ptr = DATAPTR(ibh);
734 ptr += sp->mon_rxp;
735 sp->mon_rxp++;
736 if (sp->mon_rxp >= 3072) {
737 writeisac(sp->cfg_reg, ISAC_MOCR, 0xa0);
738 sp->mon_rxp = 0;
739 if (sp->debug & L1_DEB_WARN)
740 debugl1(sp, "ISAC MON RX overflow!");
741 goto afterMONR1;
742 }
743 *ptr = readisac(sp->cfg_reg, ISAC_MOR1);
744 if (sp->debug & L1_DEB_WARN) {
745 sprintf(tmp, "ISAC MOR1 %02x", *ptr);
746 debugl1(sp, tmp);
747 }
748 }
749 afterMONR1:
750 if (v1 & 0x04) {
751 writeisac(sp->cfg_reg, ISAC_MOCR, 0x0a);
752 sp->mon_rx->datasize = sp->mon_rxp;
753 sp->mon_flg |= MON0_RX;
754 }
755 if (v1 & 0x40) {
756 writeisac(sp->cfg_reg, ISAC_MOCR, 0xa0);
757 sp->mon_rx->datasize = sp->mon_rxp;
758 sp->mon_flg |= MON1_RX;
759 }
760 if (v1 == 0x02) {
761 ibh = sp->mon_tx;
762 if (!ibh) {
763 writeisac(sp->cfg_reg, ISAC_MOCR, 0x0a);
764 goto AfterMOX0;
765 }
766 count = ibh->datasize - sp->mon_txp;
767 if (count <= 0) {
768 writeisac(sp->cfg_reg, ISAC_MOCR, 0x0f);
769 BufPoolRelease(sp->mon_tx);
770 sp->mon_tx = NULL;
771 sp->mon_txp = 0;
772 sp->mon_flg |= MON0_TX;
773 goto AfterMOX0;
774 }
775 ptr = DATAPTR(ibh);
776 ptr += sp->mon_txp;
777 sp->mon_txp++;
778 writeisac(sp->cfg_reg, ISAC_MOX0, *ptr);
779 }
780 AfterMOX0:
781 if (v1 == 0x20) {
782 ibh = sp->mon_tx;
783 if (!ibh) {
784 writeisac(sp->cfg_reg, ISAC_MOCR, 0xa0);
785 goto AfterMOX1;
786 }
787 count = ibh->datasize - sp->mon_txp;
788 if (count <= 0) {
789 writeisac(sp->cfg_reg, ISAC_MOCR, 0xf0);
790 BufPoolRelease(sp->mon_tx);
791 sp->mon_tx = NULL;
792 sp->mon_txp = 0;
793 sp->mon_flg |= MON1_TX;
794 goto AfterMOX1;
795 }
796 ptr = DATAPTR(ibh);
797 ptr += sp->mon_txp;
798 sp->mon_txp++;
799 writeisac(sp->cfg_reg, ISAC_MOX1, *ptr);
800 }
801 AfterMOX1:
802 #endif
803 }
804 }
805 }
806
807 static inline void
808 hscx_int_main(struct IsdnCardState *sp, u_char val)
809 {
810
811 u_char exval;
812 struct HscxState *hsp;
813 char tmp[32];
814
815 if (val & 0x01) {
816 hsp = sp->hs + 1;
817 exval = readhscx(sp->cfg_reg, 1, HSCX_EXIR);
818 if (exval == 0x40) {
819 if (hsp->mode == 1)
820 hscx_fill_fifo(hsp);
821 else {
822 /* Here we lost an TX interrupt, so
823 * restart transmitting the whole frame.
824 */
825 if (hsp->tx_skb) {
826 skb_push(hsp->tx_skb, hsp->count);
827 hsp->tx_cnt += hsp->count;
828 hsp->count = 0;
829 }
830 writehscxCMDR(sp->cfg_reg, hsp->hscx, 0x01);
831 if (sp->debug & L1_DEB_WARN) {
832 sprintf(tmp, "HSCX B EXIR %x Lost TX", exval);
833 debugl1(sp, tmp);
834 }
835 }
836 } else if (sp->debug & L1_DEB_HSCX) {
837 sprintf(tmp, "HSCX B EXIR %x", exval);
838 debugl1(sp, tmp);
839 }
840 }
841 if (val & 0xf8) {
842 if (sp->debug & L1_DEB_HSCX) {
843 sprintf(tmp, "HSCX B interrupt %x", val);
844 debugl1(sp, tmp);
845 }
846 hscx_interrupt(sp, val, 1);
847 }
848 if (val & 0x02) {
849 hsp = sp->hs;
850 exval = readhscx(sp->cfg_reg, 0, HSCX_EXIR);
851 if (exval == 0x40) {
852 if (hsp->mode == 1)
853 hscx_fill_fifo(hsp);
854 else {
855 /* Here we lost an TX interrupt, so
856 * restart transmitting the whole frame.
857 */
858 if (hsp->tx_skb) {
859 skb_push(hsp->tx_skb, hsp->count);
860 hsp->tx_cnt += hsp->count;
861 hsp->count = 0;
862 }
863 writehscxCMDR(sp->cfg_reg, hsp->hscx, 0x01);
864 if (sp->debug & L1_DEB_WARN) {
865 sprintf(tmp, "HSCX A EXIR %x Lost TX", exval);
866 debugl1(sp, tmp);
867 }
868 }
869 } else if (sp->debug & L1_DEB_HSCX) {
870 sprintf(tmp, "HSCX A EXIR %x", exval);
871 debugl1(sp, tmp);
872 }
873 }
874 if (val & 0x04) {
875 exval = readhscx(sp->cfg_reg, 0, HSCX_ISTA);
876 if (sp->debug & L1_DEB_HSCX) {
877 sprintf(tmp, "HSCX A interrupt %x", exval);
878 debugl1(sp, tmp);
879 }
880 hscx_interrupt(sp, exval, 0);
881 }
882 }
883
884 static void
885 elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
886 {
887 struct IsdnCardState *sp;
888 u_char val;
889
890 sp = (struct IsdnCardState *) dev_id;
891
892 if (!sp) {
893 printk(KERN_WARNING "Elsa: Spurious interrupt!\n");
894 return;
895 }
896 #ifdef CONFIG_HISAX_ELSA_PCC
897 INT_RESTART:
898 if (!TimerRun(sp)) {
899 /* Timer Restart */
900 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
901 if (!(sp->counter++ & 0x3f)) {
902 /* Call LEDs all 64 tics */
903 elsa_led_handler(sp);
904 }
905 }
906 #endif
907 val = readhscx(sp->cfg_reg, 1, HSCX_ISTA);
908 Start_HSCX:
909 if (val) {
910 hscx_int_main(sp, val);
911 }
912 val = readisac(sp->cfg_reg, ISAC_ISTA);
913 Start_ISAC:
914 if (val) {
915 isac_interrupt(sp, val);
916 }
917 #ifdef CONFIG_HISAX_ELSA_PCC
918 if (!TimerRun(sp))
919 goto INT_RESTART;
920 #endif
921 val = readhscx(sp->cfg_reg, 1, HSCX_ISTA);
922 if (val) {
923 if (sp->debug & L1_DEB_HSCX)
924 debugl1(sp, "HSCX IntStat after IntRoutine");
925 goto Start_HSCX;
926 }
927 val = readisac(sp->cfg_reg, ISAC_ISTA);
928 if (val) {
929 if (sp->debug & L1_DEB_ISAC)
930 debugl1(sp, "ISAC IntStat after IntRoutine");
931 goto Start_ISAC;
932 }
933 writehscx(sp->cfg_reg, 0, HSCX_MASK, 0xFF);
934 writehscx(sp->cfg_reg, 1, HSCX_MASK, 0xFF);
935 writeisac(sp->cfg_reg, ISAC_MASK, 0xFF);
936 #ifdef CONFIG_HISAX_ELSA_PCC
937 if (sp->subtyp == ELSA_QS1000) {
938 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
939 byteout(sp->cfg_reg + CARD_TRIG_IRQ, 0xff);
940 }
941 #endif
942 writehscx(sp->cfg_reg, 0, HSCX_MASK, 0x0);
943 writehscx(sp->cfg_reg, 1, HSCX_MASK, 0x0);
944 writeisac(sp->cfg_reg, ISAC_MASK, 0x0);
945 }
946
947
948 static void
949 initisac(struct IsdnCardState *sp)
950 {
951 unsigned int adr = sp->cfg_reg;
952
953 /* Elsa IOM 2 Mode */
954 writeisac(adr, ISAC_MASK, 0xff);
955 writeisac(adr, ISAC_ADF2, 0x80);
956 writeisac(adr, ISAC_SQXR, 0x2f);
957 writeisac(adr, ISAC_SPCR, 0x00);
958 writeisac(adr, ISAC_STCR, 0x70);
959 writeisac(adr, ISAC_MODE, 0xc9);
960 writeisac(adr, ISAC_TIMR, 0x00);
961 writeisac(adr, ISAC_ADF1, 0x00);
962 writeisac(adr, ISAC_CIX0, (1 << 2) | 3);
963 writeisac(adr, ISAC_MASK, 0xff);
964 writeisac(adr, ISAC_MASK, 0x0);
965 }
966
967 static void
968 modehscx(struct HscxState *hs, int mode, int ichan)
969 {
970 struct IsdnCardState *sp = hs->sp;
971 int hscx = hs->hscx;
972
973 if (sp->debug & L1_DEB_HSCX) {
974 char tmp[40];
975 sprintf(tmp, "hscx %c mode %d ichan %d",
976 'A' + hscx, mode, ichan);
977 debugl1(sp, tmp);
978 }
979 hs->mode = mode;
980 writehscx(sp->cfg_reg, hscx, HSCX_CCR1, 0x85);
981 writehscx(sp->cfg_reg, hscx, HSCX_XAD1, 0xFF);
982 writehscx(sp->cfg_reg, hscx, HSCX_XAD2, 0xFF);
983 writehscx(sp->cfg_reg, hscx, HSCX_RAH2, 0xFF);
984 writehscx(sp->cfg_reg, hscx, HSCX_XBCH, 0x0);
985 writehscx(sp->cfg_reg, hscx, HSCX_RLCR, 0x0);
986 writehscx(sp->cfg_reg, hscx, HSCX_CCR2, 0x30);
987
988 switch (mode) {
989 case (0):
990 writehscx(sp->cfg_reg, hscx, HSCX_TSAX, 0xff);
991 writehscx(sp->cfg_reg, hscx, HSCX_TSAR, 0xff);
992 writehscx(sp->cfg_reg, hscx, HSCX_XCCR, 7);
993 writehscx(sp->cfg_reg, hscx, HSCX_RCCR, 7);
994 writehscx(sp->cfg_reg, hscx, HSCX_MODE, 0x84);
995 break;
996 case (1):
997 if (ichan == 0) {
998 writehscx(sp->cfg_reg, hscx, HSCX_TSAX, 0x2f);
999 writehscx(sp->cfg_reg, hscx, HSCX_TSAR, 0x2f);
1000 } else {
1001 writehscx(sp->cfg_reg, hscx, HSCX_TSAX, 0x3);
1002 writehscx(sp->cfg_reg, hscx, HSCX_TSAR, 0x3);
1003 }
1004 writehscx(sp->cfg_reg, hscx, HSCX_XCCR, 7);
1005 writehscx(sp->cfg_reg, hscx, HSCX_RCCR, 7);
1006 writehscx(sp->cfg_reg, hscx, HSCX_MODE, 0xe4);
1007 writehscx(sp->cfg_reg, hscx, HSCX_CMDR, 0x41);
1008 break;
1009 case (2):
1010 if (ichan == 0) {
1011 writehscx(sp->cfg_reg, hscx, HSCX_TSAX, 0x2f);
1012 writehscx(sp->cfg_reg, hscx, HSCX_TSAR, 0x2f);
1013 } else {
1014 writehscx(sp->cfg_reg, hscx, HSCX_TSAX, 0x3);
1015 writehscx(sp->cfg_reg, hscx, HSCX_TSAR, 0x3);
1016 }
1017 writehscx(sp->cfg_reg, hscx, HSCX_XCCR, 7);
1018 writehscx(sp->cfg_reg, hscx, HSCX_RCCR, 7);
1019 writehscx(sp->cfg_reg, hscx, HSCX_MODE, 0x8c);
1020 writehscx(sp->cfg_reg, hscx, HSCX_CMDR, 0x41);
1021 break;
1022 }
1023 writehscx(sp->cfg_reg, hscx, HSCX_ISTA, 0x00);
1024 }
1025
1026 void
1027 release_io_elsa(struct IsdnCard *card)
1028 {
1029 int bytecnt = 8;
1030
1031 if (card->sp->subtyp == ELSA_PCFPRO)
1032 bytecnt = 16;
1033 if (card->sp->cfg_reg)
1034 release_region(card->sp->cfg_reg, bytecnt);
1035 }
1036
1037 static void
1038 reset_elsa(struct IsdnCardState *sp)
1039 {
1040 #ifdef CONFIG_HISAX_ELSA_PCC
1041 /* Wait 1 Timer */
1042 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1043 while (TimerRun(sp));
1044 byteout(sp->cfg_reg + CARD_CONTROL, 0x00); /* Reset On */
1045 /* Wait 1 Timer */
1046 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1047 while (TimerRun(sp));
1048 byteout(sp->cfg_reg + CARD_CONTROL, ISDN_RESET); /* Reset Off */
1049 /* Wait 1 Timer */
1050 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1051 while (TimerRun(sp));
1052 byteout(sp->cfg_reg + CARD_TRIG_IRQ, 0xff);
1053 #endif
1054 }
1055
1056 static void
1057 clear_pending_ints(struct IsdnCardState *sp)
1058 {
1059 #ifdef CONFIG_HISAX_ELSA_PCMCIA
1060 int val;
1061 char tmp[64];
1062
1063 val = readhscx(sp->cfg_reg, 1, HSCX_ISTA);
1064 sprintf(tmp, "HSCX B ISTA %x", val);
1065 debugl1(sp, tmp);
1066 if (val & 0x01) {
1067 val = readhscx(sp->cfg_reg, 1, HSCX_EXIR);
1068 sprintf(tmp, "HSCX B EXIR %x", val);
1069 debugl1(sp, tmp);
1070 } else if (val & 0x02) {
1071 val = readhscx(sp->cfg_reg, 0, HSCX_EXIR);
1072 sprintf(tmp, "HSCX A EXIR %x", val);
1073 debugl1(sp, tmp);
1074 }
1075 val = readhscx(sp->cfg_reg, 0, HSCX_ISTA);
1076 sprintf(tmp, "HSCX A ISTA %x", val);
1077 debugl1(sp, tmp);
1078 val = readhscx(sp->cfg_reg, 1, HSCX_STAR);
1079 sprintf(tmp, "HSCX B STAR %x", val);
1080 debugl1(sp, tmp);
1081 val = readhscx(sp->cfg_reg, 0, HSCX_STAR);
1082 sprintf(tmp, "HSCX A STAR %x", val);
1083 debugl1(sp, tmp);
1084 val = readisac(sp->cfg_reg, ISAC_STAR);
1085 sprintf(tmp, "ISAC STAR %x", val);
1086 debugl1(sp, tmp);
1087 val = readisac(sp->cfg_reg, ISAC_MODE);
1088 sprintf(tmp, "ISAC MODE %x", val);
1089 debugl1(sp, tmp);
1090 val = readisac(sp->cfg_reg, ISAC_ADF2);
1091 sprintf(tmp, "ISAC ADF2 %x", val);
1092 debugl1(sp, tmp);
1093 val = readisac(sp->cfg_reg, ISAC_ISTA);
1094 sprintf(tmp, "ISAC ISTA %x", val);
1095 debugl1(sp, tmp);
1096 if (val & 0x01) {
1097 val = readisac(sp->cfg_reg, ISAC_EXIR);
1098 sprintf(tmp, "ISAC EXIR %x", val);
1099 debugl1(sp, tmp);
1100 } else if (val & 0x04) {
1101 val = readisac(sp->cfg_reg, ISAC_CIR0);
1102 sprintf(tmp, "ISAC CIR0 %x", val);
1103 debugl1(sp, tmp);
1104 }
1105 #endif
1106 writehscx(sp->cfg_reg, 0, HSCX_MASK, 0xFF);
1107 writehscx(sp->cfg_reg, 1, HSCX_MASK, 0xFF);
1108 writeisac(sp->cfg_reg, ISAC_MASK, 0xFF);
1109 #ifdef CONFIG_HISAX_ELSA_PCC
1110 if (sp->subtyp == ELSA_QS1000) {
1111 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1112 byteout(sp->cfg_reg + CARD_TRIG_IRQ, 0xff);
1113 }
1114 #endif
1115 writehscx(sp->cfg_reg, 0, HSCX_MASK, 0x0);
1116 writehscx(sp->cfg_reg, 1, HSCX_MASK, 0x0);
1117 writeisac(sp->cfg_reg, ISAC_MASK, 0x0);
1118 writeisac(sp->cfg_reg, ISAC_CMDR, 0x41);
1119 }
1120
1121 static void
1122 check_arcofi(struct IsdnCardState *sp)
1123 {
1124 #if 0
1125 u_char val;
1126 char tmp[40];
1127 char *t;
1128 long flags;
1129 u_char *p;
1130
1131 if (BufPoolGet(&(sp->mon_tx), &(sp->sbufpool),
1132 GFP_ATOMIC, (void *) 1, 3)) {
1133 if (sp->debug & L1_DEB_WARN)
1134 debugl1(sp, "ISAC MON TX out of buffers!");
1135 return;
1136 } else
1137 sp->mon_txp = 0;
1138 p = DATAPTR(sp->mon_tx);
1139 *p++ = 0xa0;
1140 *p++ = 0x0;
1141 sp->mon_tx->datasize = 2;
1142 sp->mon_txp = 1;
1143 sp->mon_flg = 0;
1144 writeisac(sp->cfg_reg, ISAC_MOCR, 0xa0);
1145 val = readisac(sp->cfg_reg, ISAC_MOSR);
1146 writeisac(sp->cfg_reg, ISAC_MOX1, 0xa0);
1147 writeisac(sp->cfg_reg, ISAC_MOCR, 0xb0);
1148 save_flags(flags);
1149 sti();
1150 HZDELAY(3);
1151 restore_flags(flags);
1152 if (sp->mon_flg & MON1_TX) {
1153 if (sp->mon_flg & MON1_RX) {
1154 sprintf(tmp, "Arcofi response received %d bytes", sp->mon_rx->datasize);
1155 debugl1(sp, tmp);
1156 p = DATAPTR(sp->mon_rx);
1157 t = tmp;
1158 t += sprintf(tmp, "Arcofi data");
1159 QuickHex(t, p, sp->mon_rx->datasize);
1160 debugl1(sp, tmp);
1161 BufPoolRelease(sp->mon_rx);
1162 sp->mon_rx = NULL;
1163 sp->mon_rxp = 0;
1164 sp->mon_flg = 0;
1165 }
1166 } else if (sp->mon_tx) {
1167 BufPoolRelease(sp->mon_tx);
1168 sp->mon_tx = NULL;
1169 sp->mon_txp = 0;
1170 sprintf(tmp, "Arcofi not detected");
1171 debugl1(sp, tmp);
1172 }
1173 sp->mon_flg = 0;
1174 #endif
1175 }
1176
1177 int
1178 initelsa(struct IsdnCardState *sp)
1179 {
1180 int ret, irq_cnt, cnt = 3;
1181 long flags;
1182
1183 irq_cnt = kstat_irqs(sp->irq);
1184 printk(KERN_INFO "Elsa: IRQ %d count %d\n", sp->irq, irq_cnt);
1185 ret = get_irq(sp->cardnr, &elsa_interrupt);
1186 #ifdef CONFIG_HISAX_ELSA_PCC
1187 byteout(sp->cfg_reg + CARD_TRIG_IRQ, 0xff);
1188 #endif
1189 while (ret && cnt) {
1190 sp->counter = 0;
1191 clear_pending_ints(sp);
1192 initisac(sp);
1193 sp->modehscx(sp->hs, 0, 0);
1194 sp->modehscx(sp->hs + 1, 0, 0);
1195 save_flags(flags);
1196 sp->counter = 0;
1197 sti();
1198 #ifdef CONFIG_HISAX_ELSA_PCC
1199 byteout(sp->cfg_reg + CARD_CONTROL, ISDN_RESET | ENABLE_TIM_INT);
1200 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1201 current->state = TASK_INTERRUPTIBLE;
1202 current->timeout = jiffies + (110 * HZ) / 1000; /* Timeout 110ms */
1203 schedule();
1204 restore_flags(flags);
1205 printk(KERN_INFO "Elsa: %d timer tics in 110 msek\n",
1206 sp->counter);
1207 if (abs(sp->counter - 13) < 3) {
1208 printk(KERN_INFO "Elsa: timer and irq OK\n");
1209 } else {
1210 printk(KERN_WARNING
1211 "Elsa: timer tic problem (%d/12) maybe an IRQ(%d) conflict\n",
1212 sp->counter, sp->irq);
1213 }
1214 #endif
1215 printk(KERN_INFO "Elsa: IRQ %d count %d\n", sp->irq,
1216 kstat_irqs(sp->irq));
1217 if (kstat_irqs(sp->irq) == irq_cnt) {
1218 printk(KERN_WARNING
1219 "Elsa: IRQ(%d) getting no interrupts during init %d\n",
1220 sp->irq, 4 - cnt);
1221 if (cnt == 1) {
1222 free_irq(sp->irq, sp);
1223 return (0);
1224 } else {
1225 reset_elsa(sp);
1226 cnt--;
1227 }
1228 } else {
1229 check_arcofi(sp);
1230 cnt = 0;
1231 }
1232 }
1233 sp->counter = 0;
1234 return (ret);
1235 }
1236
1237 #ifdef CONFIG_HISAX_ELSA_PCC
1238 static unsigned char
1239 probe_elsa_adr(unsigned int adr)
1240 {
1241 int i, in1, in2, p16_1 = 0, p16_2 = 0, p8_1 = 0, p8_2 = 0, pc_1 = 0,
1242 pc_2 = 0, pfp_1 = 0, pfp_2 = 0;
1243 long flags;
1244
1245 if (check_region(adr, 8)) {
1246 printk(KERN_WARNING
1247 "Elsa: Probing Port 0x%x: already in use\n",
1248 adr);
1249 return (0);
1250 }
1251 save_flags(flags);
1252 cli();
1253 for (i = 0; i < 16; i++) {
1254 in1 = inb(adr + CARD_CONFIG); /* 'toggelt' bei */
1255 in2 = inb(adr + CARD_CONFIG); /* jedem Zugriff */
1256 p16_1 += 0x04 & in1;
1257 p16_2 += 0x04 & in2;
1258 p8_1 += 0x02 & in1;
1259 p8_2 += 0x02 & in2;
1260 pc_1 += 0x01 & in1;
1261 pc_2 += 0x01 & in2;
1262 pfp_1 += 0x40 & in1;
1263 pfp_2 += 0x40 & in2;
1264 }
1265 restore_flags(flags);
1266 printk(KERN_INFO "Elsa: Probing IO 0x%x", adr);
1267 if (65 == ++p16_1 * ++p16_2) {
1268 printk(" PCC-16/PCF found\n");
1269 return (ELSA_PCC16);
1270 } else if (1025 == ++pfp_1 * ++pfp_2) {
1271 printk(" PCF-Pro found\n");
1272 return (ELSA_PCFPRO);
1273 } else if (33 == ++p8_1 * ++p8_2) {
1274 printk(" PCC8 found\n");
1275 return (ELSA_PCC8);
1276 } else if (17 == ++pc_1 * ++pc_2) {
1277 printk(" PC found\n");
1278 return (ELSA_PC);
1279 } else {
1280 printk(" failed\n");
1281 return (0);
1282 }
1283 }
1284
1285 static unsigned int
1286 probe_elsa(struct IsdnCardState *sp)
1287 {
1288 int i;
1289 unsigned int CARD_portlist[] =
1290 {0x160, 0x170, 0x260, 0x360, 0};
1291
1292 for (i = 0; CARD_portlist[i]; i++) {
1293 if ((sp->subtyp = probe_elsa_adr(CARD_portlist[i])))
1294 break;
1295 }
1296 return (CARD_portlist[i]);
1297 }
1298 #endif
1299
1300 int
1301 setup_elsa(struct IsdnCard *card)
1302 {
1303 #ifdef CONFIG_HISAX_ELSA_PCC
1304 long flags;
1305 #endif
1306 int bytecnt;
1307 u_char val, verA, verB;
1308 struct IsdnCardState *sp = card->sp;
1309 char tmp[64];
1310
1311 strcpy(tmp, Elsa_revision);
1312 printk(KERN_NOTICE "HiSax: Elsa driver Rev. %s\n", HiSax_getrev(tmp));
1313 #ifdef CONFIG_HISAX_ELSA_PCC
1314 if (sp->typ == ISDN_CTYPE_ELSA) {
1315 sp->cfg_reg = card->para[0];
1316 printk(KERN_INFO "Elsa: Microlink IO probing\n");
1317 if (sp->cfg_reg) {
1318 if (!(sp->subtyp = probe_elsa_adr(sp->cfg_reg))) {
1319 printk(KERN_WARNING
1320 "Elsa: no Elsa Microlink at 0x%x\n",
1321 sp->cfg_reg);
1322 return (0);
1323 }
1324 } else
1325 sp->cfg_reg = probe_elsa(sp);
1326 if (sp->cfg_reg) {
1327 val = bytein(sp->cfg_reg + CARD_CONFIG);
1328 if (sp->subtyp == ELSA_PC) {
1329 const u_char CARD_IrqTab[8] =
1330 {7, 3, 5, 9, 0, 0, 0, 0};
1331 sp->irq = CARD_IrqTab[(val & IRQ_INDEX_PC) >> 2];
1332 } else if (sp->subtyp == ELSA_PCC8) {
1333 const u_char CARD_IrqTab[8] =
1334 {7, 3, 5, 9, 0, 0, 0, 0};
1335 sp->irq = CARD_IrqTab[(val & IRQ_INDEX_PCC8) >> 4];
1336 } else {
1337 const u_char CARD_IrqTab[8] =
1338 {15, 10, 15, 3, 11, 5, 11, 9};
1339 sp->irq = CARD_IrqTab[(val & IRQ_INDEX) >> 3];
1340 }
1341 val = bytein(sp->cfg_reg + CARD_ALE) & 0x7;
1342 if (val < 3)
1343 val |= 8;
1344 val += 'A' - 3;
1345 if (val == 'B' || val == 'C')
1346 val ^= 1;
1347 if ((sp->subtyp == ELSA_PCFPRO) && (val = 'G'))
1348 val = 'C';
1349 printk(KERN_INFO
1350 "Elsa: %s found at 0x%x Rev.:%c IRQ %d\n",
1351 Elsa_Types[sp->subtyp],
1352 sp->cfg_reg,
1353 val, sp->irq);
1354 val = bytein(sp->cfg_reg + CARD_ALE) & 0x08;
1355 if (val)
1356 printk(KERN_WARNING
1357 "Elsa: Microlink S0 bus power bad\n");
1358 } else {
1359 printk(KERN_WARNING
1360 "No Elsa Microlink found\n");
1361 return (0);
1362 }
1363 } else if (sp->typ == ISDN_CTYPE_ELSA_QS1000) {
1364 sp->cfg_reg = card->para[1];
1365 sp->irq = card->para[0];
1366 sp->subtyp = ELSA_QS1000;
1367 printk(KERN_INFO
1368 "Elsa: %s found at 0x%x IRQ %d\n",
1369 Elsa_Types[sp->subtyp],
1370 sp->cfg_reg,
1371 sp->irq);
1372 } else
1373 return (0);
1374 #endif
1375 #ifdef CONFIG_HISAX_ELSA_PCMCIA
1376 if (sp->typ == ISDN_CTYPE_ELSA_QS1000) {
1377 sp->cfg_reg = card->para[1];
1378 sp->irq = card->para[0];
1379 sp->subtyp = ELSA_PCMCIA;
1380 printk(KERN_INFO
1381 "Elsa: %s found at 0x%x IRQ %d\n",
1382 Elsa_Types[sp->subtyp],
1383 sp->cfg_reg,
1384 sp->irq);
1385 } else
1386 return (0);
1387 #endif
1388
1389 switch (sp->subtyp) {
1390 case ELSA_PC:
1391 bytecnt = 8;
1392 break;
1393 case ELSA_PCC8:
1394 bytecnt = 8;
1395 break;
1396 case ELSA_PCFPRO:
1397 bytecnt = 16;
1398 break;
1399 case ELSA_PCC16:
1400 bytecnt = 8;
1401 break;
1402 case ELSA_PCF:
1403 bytecnt = 16;
1404 break;
1405 case ELSA_QS1000:
1406 bytecnt = 8;
1407 break;
1408 case ELSA_PCMCIA:
1409 bytecnt = 8;
1410 break;
1411 default:
1412 printk(KERN_WARNING
1413 "Unknown ELSA subtype %d\n", sp->subtyp);
1414 return (0);
1415 }
1416
1417 if (check_region((sp->cfg_reg), bytecnt)) {
1418 printk(KERN_WARNING
1419 "HiSax: %s config port %x-%x already in use\n",
1420 CardType[card->typ],
1421 sp->cfg_reg,
1422 sp->cfg_reg + bytecnt);
1423 return (0);
1424 } else {
1425 request_region(sp->cfg_reg, bytecnt, "elsa isdn");
1426 }
1427
1428 /* Teste Timer */
1429 #ifdef CONFIG_HISAX_ELSA_PCC
1430 byteout(sp->cfg_reg + CARD_TRIG_IRQ, 0xff);
1431 byteout(sp->cfg_reg + CARD_START_TIMER, 0);
1432 if (!TimerRun(sp)) {
1433 byteout(sp->cfg_reg + CARD_START_TIMER, 0); /* 2. Versuch */
1434 if (!TimerRun(sp)) {
1435 printk(KERN_WARNING
1436 "Elsa: timer do not start\n");
1437 release_io_elsa(card);
1438 return (0);
1439 }
1440 }
1441 save_flags(flags);
1442 sti();
1443 HZDELAY(1); /* wait >=10 ms */
1444 restore_flags(flags);
1445 if (TimerRun(sp)) {
1446 printk(KERN_WARNING "Elsa: timer do not run down\n");
1447 release_io_elsa(card);
1448 return (0);
1449 }
1450 printk(KERN_INFO "Elsa: timer OK; resetting card\n");
1451 reset_elsa(sp);
1452 #endif
1453 verA = readhscx(sp->cfg_reg, 0, HSCX_VSTR) & 0xf;
1454 verB = readhscx(sp->cfg_reg, 1, HSCX_VSTR) & 0xf;
1455 printk(KERN_INFO "Elsa: HSCX version A: %s B: %s\n",
1456 HscxVersion(verA), HscxVersion(verB));
1457 val = readisac(sp->cfg_reg, ISAC_RBCH);
1458 printk(KERN_INFO "Elsa: ISAC %s\n",
1459 ISACVersion(val));
1460
1461 #ifdef CONFIG_HISAX_ELSA_PCMCIA
1462 if ((verA == 0) | (verA == 0xf) | (verB == 0) | (verB == 0xf)) {
1463 printk(KERN_WARNING
1464 "Elsa: wrong HSCX versions check IO address\n");
1465 release_io_elsa(card);
1466 return (0);
1467 }
1468 #endif
1469
1470 #ifdef CONFIG_HISAX_ELSA_PCC
1471 if (sp->subtyp == ELSA_PC) {
1472 val = readitac(sp->cfg_reg, ITAC_SYS);
1473 printk(KERN_INFO "Elsa: ITAC version %s\n", ITACVer[val & 7]);
1474 writeitac(sp->cfg_reg, ITAC_ISEN, 0);
1475 writeitac(sp->cfg_reg, ITAC_RFIE, 0);
1476 writeitac(sp->cfg_reg, ITAC_XFIE, 0);
1477 writeitac(sp->cfg_reg, ITAC_SCIE, 0);
1478 writeitac(sp->cfg_reg, ITAC_STIE, 0);
1479 }
1480 #endif
1481 sp->modehscx = &modehscx;
1482 sp->ph_command = &ph_command;
1483 sp->hscx_fill_fifo = &hscx_fill_fifo;
1484 sp->isac_fill_fifo = &isac_fill_fifo;
1485
1486 return (1);
1487 }
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