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Import 2.1.81
[davej-history.git] / drivers / isdn / hisax / avm_a1.c
bloba35d1c71f5597fa2eea832f1818c55c9e6d9e35e
1 /* $Id: avm_a1.c,v 1.6 1997/04/13 19:54:07 keil Exp $
2
3 * avm_a1.c low level stuff for AVM A1 (Fritz) isdn cards
4 *
5 * Author Karsten Keil (keil@temic-ech.spacenet.de)
6 *
7 *
8 * $Log: avm_a1.c,v $
9 * Revision 1.6 1997/04/13 19:54:07 keil
10 * Change in IRQ check delay for SMP
11 *
12 * Revision 1.5 1997/04/06 22:54:10 keil
13 * Using SKB's
14 *
15 * Revision 1.4 1997/01/27 15:50:21 keil
16 * SMP proof,cosmetics
17 *
18 * Revision 1.3 1997/01/21 22:14:20 keil
19 * cleanups
20 *
21 * Revision 1.2 1996/10/27 22:07:31 keil
22 * cosmetic changes
23 *
24 * Revision 1.1 1996/10/13 20:04:49 keil
25 * Initial revision
26 *
27 *
28 */
29 #define __NO_VERSION__
30 #include "siemens.h"
31 #include "hisax.h"
32 #include "avm_a1.h"
33 #include "isdnl1.h"
34 #include <linux/kernel_stat.h>
35
36 extern const char *CardType[];
37 const char *avm_revision = "$Revision: 1.6 $";
38
39 #define byteout(addr,val) outb_p(val,addr)
40 #define bytein(addr) inb_p(addr)
41
42 static inline u_char
43 readreg(unsigned int adr, u_char off)
44 {
45 return (bytein(adr + off));
46 }
47
48 static inline void
49 writereg(unsigned int adr, u_char off, u_char data)
50 {
51 byteout(adr + off, data);
52 }
53
54
55 static inline void
56 read_fifo(unsigned int adr, u_char * data, int size)
57 {
58 insb(adr - 0x400, data, size);
59 }
60
61 static void
62 write_fifo(unsigned int adr, u_char * data, int size)
63 {
64 outsb(adr - 0x400, data, size);
65 }
66
67 static inline void
68 waitforCEC(int adr)
69 {
70 int to = 50;
71
72 while ((readreg(adr, HSCX_STAR) & 0x04) && to) {
73 udelay(1);
74 to--;
75 }
76 if (!to)
77 printk(KERN_WARNING "AVM A1: waitforCEC timeout\n");
78 }
79
80
81 static inline void
82 waitforXFW(int adr)
83 {
84 int to = 50;
85
86 while ((!(readreg(adr, HSCX_STAR) & 0x44) == 0x40) && to) {
87 udelay(1);
88 to--;
89 }
90 if (!to)
91 printk(KERN_WARNING "AVM A1: waitforXFW timeout\n");
92 }
93
94 static inline void
95 writehscxCMDR(int adr, u_char data)
96 {
97 long flags;
98
99 save_flags(flags);
100 cli();
101 waitforCEC(adr);
102 writereg(adr, HSCX_CMDR, data);
103 restore_flags(flags);
104 }
105
106 /*
107 * fast interrupt here
108 */
109
110 static void
111 hscxreport(struct IsdnCardState *sp, int hscx)
112 {
113 printk(KERN_DEBUG "HSCX %d\n", hscx);
114 printk(KERN_DEBUG "ISTA %x\n", readreg(sp->hscx[hscx], HSCX_ISTA));
115 printk(KERN_DEBUG "STAR %x\n", readreg(sp->hscx[hscx], HSCX_STAR));
116 printk(KERN_DEBUG "EXIR %x\n", readreg(sp->hscx[hscx], HSCX_EXIR));
117 }
118
119 void
120 avm_a1_report(struct IsdnCardState *sp)
121 {
122 printk(KERN_DEBUG "ISAC\n");
123 printk(KERN_DEBUG "ISTA %x\n", readreg(sp->isac, ISAC_ISTA));
124 printk(KERN_DEBUG "STAR %x\n", readreg(sp->isac, ISAC_STAR));
125 printk(KERN_DEBUG "EXIR %x\n", readreg(sp->isac, ISAC_EXIR));
126 hscxreport(sp, 0);
127 hscxreport(sp, 1);
128 }
129
130 /*
131 * HSCX stuff goes here
132 */
133
134 static void
135 hscx_empty_fifo(struct HscxState *hsp, int count)
136 {
137 u_char *ptr;
138 struct IsdnCardState *sp = hsp->sp;
139 long flags;
140
141 if ((sp->debug & L1_DEB_HSCX) && !(sp->debug & L1_DEB_HSCX_FIFO))
142 debugl1(sp, "hscx_empty_fifo");
143
144 if (hsp->rcvidx + count > HSCX_BUFMAX) {
145 if (sp->debug & L1_DEB_WARN)
146 debugl1(sp, "hscx_empty_fifo: incoming packet too large");
147 writehscxCMDR(sp->hscx[hsp->hscx], 0x80);
148 hsp->rcvidx = 0;
149 return;
150 }
151 ptr = hsp->rcvbuf + hsp->rcvidx;
152 hsp->rcvidx += count;
153 save_flags(flags);
154 cli();
155 read_fifo(sp->hscx[hsp->hscx], ptr, count);
156 writehscxCMDR(sp->hscx[hsp->hscx], 0x80);
157 restore_flags(flags);
158 if (sp->debug & L1_DEB_HSCX_FIFO) {
159 char tmp[128];
160 char *t = tmp;
161
162 t += sprintf(t, "hscx_empty_fifo %c cnt %d",
163 hsp->hscx ? 'B' : 'A', count);
164 QuickHex(t, ptr, count);
165 debugl1(sp, tmp);
166 }
167 }
168
169 static void
170 hscx_fill_fifo(struct HscxState *hsp)
171 {
172 struct IsdnCardState *sp = hsp->sp;
173 int more, count;
174 u_char *ptr;
175 long flags;
176
177 if ((sp->debug & L1_DEB_HSCX) && !(sp->debug & L1_DEB_HSCX_FIFO))
178 debugl1(sp, "hscx_fill_fifo");
179
180 if (!hsp->tx_skb)
181 return;
182 if (hsp->tx_skb->len <= 0)
183 return;
184
185 more = (hsp->mode == 1) ? 1 : 0;
186 if (hsp->tx_skb->len > 32) {
187 more = !0;
188 count = 32;
189 } else
190 count = hsp->tx_skb->len;
191
192 waitforXFW(sp->hscx[hsp->hscx]);
193 save_flags(flags);
194 cli();
195 ptr = hsp->tx_skb->data;
196 skb_pull(hsp->tx_skb, count);
197 hsp->tx_cnt -= count;
198 hsp->count += count;
199 write_fifo(sp->hscx[hsp->hscx], ptr, count);
200 writehscxCMDR(sp->hscx[hsp->hscx], more ? 0x8 : 0xa);
201 restore_flags(flags);
202 if (sp->debug & L1_DEB_HSCX_FIFO) {
203 char tmp[128];
204 char *t = tmp;
205
206 t += sprintf(t, "hscx_fill_fifo %c cnt %d",
207 hsp->hscx ? 'B' : 'A', count);
208 QuickHex(t, ptr, count);
209 debugl1(sp, tmp);
210 }
211 }
212
213 static inline void
214 hscx_interrupt(struct IsdnCardState *sp, u_char val, u_char hscx)
215 {
216 u_char r;
217 struct HscxState *hsp = sp->hs + hscx;
218 struct sk_buff *skb;
219 int count;
220 char tmp[32];
221
222 if (!hsp->init)
223 return;
224
225 if (val & 0x80) { /* RME */
226
227 r = readreg(sp->hscx[hsp->hscx], HSCX_RSTA);
228 if ((r & 0xf0) != 0xa0) {
229 if (!r & 0x80)
230 if (sp->debug & L1_DEB_WARN)
231 debugl1(sp, "HSCX invalid frame");
232 if ((r & 0x40) && hsp->mode)
233 if (sp->debug & L1_DEB_WARN) {
234 sprintf(tmp, "HSCX RDO mode=%d",
235 hsp->mode);
236 debugl1(sp, tmp);
237 }
238 if (!r & 0x20)
239 if (sp->debug & L1_DEB_WARN)
240 debugl1(sp, "HSCX CRC error");
241 writehscxCMDR(sp->hscx[hsp->hscx], 0x80);
242 } else {
243 count = readreg(sp->hscx[hsp->hscx], HSCX_RBCL) & 0x1f;
244 if (count == 0)
245 count = 32;
246 hscx_empty_fifo(hsp, count);
247 if ((count = hsp->rcvidx - 1) > 0) {
248 if (!(skb = dev_alloc_skb(count)))
249 printk(KERN_WARNING "AVM: receive out of memory\n");
250 else {
251 memcpy(skb_put(skb, count), hsp->rcvbuf, count);
252 skb_queue_tail(&hsp->rqueue, skb);
253 }
254 }
255 }
256 hsp->rcvidx = 0;
257 hscx_sched_event(hsp, HSCX_RCVBUFREADY);
258 }
259 if (val & 0x40) { /* RPF */
260 hscx_empty_fifo(hsp, 32);
261 if (hsp->mode == 1) {
262 /* receive audio data */
263 if (!(skb = dev_alloc_skb(32)))
264 printk(KERN_WARNING "AVM: receive out of memory\n");
265 else {
266 memcpy(skb_put(skb, 32), hsp->rcvbuf, 32);
267 skb_queue_tail(&hsp->rqueue, skb);
268 }
269 hsp->rcvidx = 0;
270 hscx_sched_event(hsp, HSCX_RCVBUFREADY);
271 }
272 }
273 if (val & 0x10) { /* XPR */
274 if (hsp->tx_skb)
275 if (hsp->tx_skb->len) {
276 hscx_fill_fifo(hsp);
277 return;
278 } else {
279 SET_SKB_FREE(hsp->tx_skb);
280 dev_kfree_skb(hsp->tx_skb, FREE_WRITE);
281 hsp->count = 0;
282 if (hsp->st->l4.l1writewakeup)
283 hsp->st->l4.l1writewakeup(hsp->st);
284 hsp->tx_skb = NULL;
285 }
286 if ((hsp->tx_skb = skb_dequeue(&hsp->squeue))) {
287 hsp->count = 0;
288 hscx_fill_fifo(hsp);
289 } else
290 hscx_sched_event(hsp, HSCX_XMTBUFREADY);
291 }
292 }
293
294 /*
295 * ISAC stuff goes here
296 */
297
298 static void
299 isac_empty_fifo(struct IsdnCardState *sp, int count)
300 {
301 u_char *ptr;
302 long flags;
303
304 if ((sp->debug & L1_DEB_ISAC) && !(sp->debug & L1_DEB_ISAC_FIFO))
305 if (sp->debug & L1_DEB_ISAC)
306 debugl1(sp, "isac_empty_fifo");
307
308 if ((sp->rcvidx + count) >= MAX_DFRAME_LEN) {
309 if (sp->debug & L1_DEB_WARN) {
310 char tmp[40];
311 sprintf(tmp, "isac_empty_fifo overrun %d",
312 sp->rcvidx + count);
313 debugl1(sp, tmp);
314 }
315 writereg(sp->isac, ISAC_CMDR, 0x80);
316 sp->rcvidx = 0;
317 return;
318 }
319 ptr = sp->rcvbuf + sp->rcvidx;
320 sp->rcvidx += count;
321 save_flags(flags);
322 cli();
323 read_fifo(sp->isac, ptr, count);
324 writereg(sp->isac, ISAC_CMDR, 0x80);
325 restore_flags(flags);
326 if (sp->debug & L1_DEB_ISAC_FIFO) {
327 char tmp[128];
328 char *t = tmp;
329
330 t += sprintf(t, "isac_empty_fifo cnt %d", count);
331 QuickHex(t, ptr, count);
332 debugl1(sp, tmp);
333 }
334 }
335
336 static void
337 isac_fill_fifo(struct IsdnCardState *sp)
338 {
339 int count, more;
340 u_char *ptr;
341 long flags;
342
343 if ((sp->debug & L1_DEB_ISAC) && !(sp->debug & L1_DEB_ISAC_FIFO))
344 debugl1(sp, "isac_fill_fifo");
345
346 if (!sp->tx_skb)
347 return;
348
349 count = sp->tx_skb->len;
350 if (count <= 0)
351 return;
352
353 more = 0;
354 if (count > 32) {
355 more = !0;
356 count = 32;
357 }
358 save_flags(flags);
359 cli();
360 ptr = sp->tx_skb->data;
361 skb_pull(sp->tx_skb, count);
362 sp->tx_cnt += count;
363 write_fifo(sp->isac, ptr, count);
364 writereg(sp->isac, ISAC_CMDR, more ? 0x8 : 0xa);
365 restore_flags(flags);
366 if (sp->debug & L1_DEB_ISAC_FIFO) {
367 char tmp[128];
368 char *t = tmp;
369
370 t += sprintf(t, "isac_fill_fifo cnt %d", count);
371 QuickHex(t, ptr, count);
372 debugl1(sp, tmp);
373 }
374 }
375
376 static void
377 ph_command(struct IsdnCardState *sp, unsigned int command)
378 {
379 if (sp->debug & L1_DEB_ISAC) {
380 char tmp[32];
381 sprintf(tmp, "ph_command %d", command);
382 debugl1(sp, tmp);
383 }
384 writereg(sp->isac, ISAC_CIX0, (command << 2) | 3);
385 }
386
387
388 static inline void
389 isac_interrupt(struct IsdnCardState *sp, u_char val)
390 {
391 u_char exval;
392 struct sk_buff *skb;
393 unsigned int count;
394 char tmp[32];
395
396 if (sp->debug & L1_DEB_ISAC) {
397 sprintf(tmp, "ISAC interrupt %x", val);
398 debugl1(sp, tmp);
399 }
400 if (val & 0x80) { /* RME */
401 exval = readreg(sp->isac, ISAC_RSTA);
402 if ((exval & 0x70) != 0x20) {
403 if (exval & 0x40)
404 if (sp->debug & L1_DEB_WARN)
405 debugl1(sp, "ISAC RDO");
406 if (!exval & 0x20)
407 if (sp->debug & L1_DEB_WARN)
408 debugl1(sp, "ISAC CRC error");
409 writereg(sp->isac, ISAC_CMDR, 0x80);
410 } else {
411 count = readreg(sp->isac, ISAC_RBCL) & 0x1f;
412 if (count == 0)
413 count = 32;
414 isac_empty_fifo(sp, count);
415 if ((count = sp->rcvidx) > 0) {
416 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
417 printk(KERN_WARNING "AVM: D receive out of memory\n");
418 else {
419 memcpy(skb_put(skb, count), sp->rcvbuf, count);
420 skb_queue_tail(&sp->rq, skb);
421 }
422 }
423 }
424 sp->rcvidx = 0;
425 isac_sched_event(sp, ISAC_RCVBUFREADY);
426 }
427 if (val & 0x40) { /* RPF */
428 isac_empty_fifo(sp, 32);
429 }
430 if (val & 0x20) { /* RSC */
431 /* never */
432 if (sp->debug & L1_DEB_WARN)
433 debugl1(sp, "ISAC RSC interrupt");
434 }
435 if (val & 0x10) { /* XPR */
436 if (sp->tx_skb)
437 if (sp->tx_skb->len) {
438 isac_fill_fifo(sp);
439 goto afterXPR;
440 } else {
441 SET_SKB_FREE(sp->tx_skb);
442 dev_kfree_skb(sp->tx_skb, FREE_WRITE);
443 sp->tx_cnt = 0;
444 sp->tx_skb = NULL;
445 }
446 if ((sp->tx_skb = skb_dequeue(&sp->sq))) {
447 sp->tx_cnt = 0;
448 isac_fill_fifo(sp);
449 } else
450 isac_sched_event(sp, ISAC_XMTBUFREADY);
451 }
452 afterXPR:
453 if (val & 0x04) { /* CISQ */
454 sp->ph_state = (readreg(sp->isac, ISAC_CIX0) >> 2)
455 & 0xf;
456 if (sp->debug & L1_DEB_ISAC) {
457 sprintf(tmp, "l1state %d", sp->ph_state);
458 debugl1(sp, tmp);
459 }
460 isac_new_ph(sp);
461 }
462 if (val & 0x02) { /* SIN */
463 /* never */
464 if (sp->debug & L1_DEB_WARN)
465 debugl1(sp, "ISAC SIN interrupt");
466 }
467 if (val & 0x01) { /* EXI */
468 exval = readreg(sp->isac, ISAC_EXIR);
469 if (sp->debug & L1_DEB_WARN) {
470 sprintf(tmp, "ISAC EXIR %02x", exval);
471 debugl1(sp, tmp);
472 }
473 }
474 }
475
476 static inline void
477 hscx_int_main(struct IsdnCardState *sp, u_char val)
478 {
479
480 u_char exval;
481 struct HscxState *hsp;
482 char tmp[32];
483
484
485 if (val & 0x01) {
486 hsp = sp->hs + 1;
487 exval = readreg(sp->hscx[1], HSCX_EXIR);
488 if (exval == 0x40) {
489 if (hsp->mode == 1)
490 hscx_fill_fifo(hsp);
491 else {
492 /* Here we lost an TX interrupt, so
493 * restart transmitting the whole frame.
494 */
495 if (hsp->tx_skb) {
496 skb_push(hsp->tx_skb, hsp->count);
497 hsp->tx_cnt += hsp->count;
498 hsp->count = 0;
499 }
500 writehscxCMDR(sp->hscx[hsp->hscx], 0x01);
501 if (sp->debug & L1_DEB_WARN) {
502 sprintf(tmp, "HSCX B EXIR %x Lost TX", exval);
503 debugl1(sp, tmp);
504 }
505 }
506 } else if (sp->debug & L1_DEB_HSCX) {
507 sprintf(tmp, "HSCX B EXIR %x", exval);
508 debugl1(sp, tmp);
509 }
510 }
511 if (val & 0xf8) {
512 if (sp->debug & L1_DEB_HSCX) {
513 sprintf(tmp, "HSCX B interrupt %x", val);
514 debugl1(sp, tmp);
515 }
516 hscx_interrupt(sp, val, 1);
517 }
518 if (val & 0x02) {
519 hsp = sp->hs;
520 exval = readreg(sp->hscx[0], HSCX_EXIR);
521 if (exval == 0x40) {
522 if (hsp->mode == 1)
523 hscx_fill_fifo(hsp);
524 else {
525 /* Here we lost an TX interrupt, so
526 * restart transmitting the whole frame.
527 */
528 if (hsp->tx_skb) {
529 skb_push(hsp->tx_skb, hsp->count);
530 hsp->tx_cnt += hsp->count;
531 hsp->count = 0;
532 }
533 writehscxCMDR(sp->hscx[hsp->hscx], 0x01);
534 if (sp->debug & L1_DEB_WARN) {
535 sprintf(tmp, "HSCX A EXIR %x Lost TX", exval);
536 debugl1(sp, tmp);
537 }
538 }
539 } else if (sp->debug & L1_DEB_HSCX) {
540 sprintf(tmp, "HSCX A EXIR %x", exval);
541 debugl1(sp, tmp);
542 }
543 }
544 if (val & 0x04) {
545 exval = readreg(sp->hscx[0], HSCX_ISTA);
546 if (sp->debug & L1_DEB_HSCX) {
547 sprintf(tmp, "HSCX A interrupt %x", exval);
548 debugl1(sp, tmp);
549 }
550 hscx_interrupt(sp, exval, 0);
551 }
552 }
553
554 static void
555 avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
556 {
557 struct IsdnCardState *sp;
558 u_char val, sval, stat = 0;
559 char tmp[32];
560
561 sp = (struct IsdnCardState *) dev_id;
562
563 if (!sp) {
564 printk(KERN_WARNING "AVM A1: Spurious interrupt!\n");
565 return;
566 }
567 while (((sval = bytein(sp->cfg_reg)) & 0xf) != 0x7) {
568 if (!(sval & AVM_A1_STAT_TIMER)) {
569 byteout(sp->cfg_reg, 0x14);
570 byteout(sp->cfg_reg, 0x18);
571 sval = bytein(sp->cfg_reg);
572 } else if (sp->debug & L1_DEB_INTSTAT) {
573 sprintf(tmp, "avm IntStatus %x", sval);
574 debugl1(sp, tmp);
575 }
576 if (!(sval & AVM_A1_STAT_HSCX)) {
577 val = readreg(sp->hscx[1], HSCX_ISTA);
578 if (val) {
579 hscx_int_main(sp, val);
580 stat |= 1;
581 }
582 }
583 if (!(sval & AVM_A1_STAT_ISAC)) {
584 val = readreg(sp->isac, ISAC_ISTA);
585 if (val) {
586 isac_interrupt(sp, val);
587 stat |= 2;
588 }
589 }
590 }
591 if (stat & 1) {
592 writereg(sp->hscx[0], HSCX_MASK, 0xFF);
593 writereg(sp->hscx[1], HSCX_MASK, 0xFF);
594 writereg(sp->hscx[0], HSCX_MASK, 0x0);
595 writereg(sp->hscx[1], HSCX_MASK, 0x0);
596 }
597 if (stat & 2) {
598 writereg(sp->isac, ISAC_MASK, 0xFF);
599 writereg(sp->isac, ISAC_MASK, 0x0);
600 }
601 }
602
603
604 static void
605 initisac(struct IsdnCardState *sp)
606 {
607 unsigned int adr = sp->isac;
608
609 /* 16.3 IOM 2 Mode */
610 writereg(adr, ISAC_MASK, 0xff);
611 writereg(adr, ISAC_ADF2, 0x80);
612 writereg(adr, ISAC_SQXR, 0x2f);
613 writereg(adr, ISAC_SPCR, 0x0);
614 writereg(adr, ISAC_ADF1, 0x2);
615 writereg(adr, ISAC_STCR, 0x70);
616 writereg(adr, ISAC_MODE, 0xc9);
617 writereg(adr, ISAC_TIMR, 0x0);
618 writereg(adr, ISAC_ADF1, 0x0);
619 writereg(adr, ISAC_CMDR, 0x41);
620 writereg(adr, ISAC_CIX0, (1 << 2) | 3);
621 writereg(adr, ISAC_MASK, 0xff);
622 writereg(adr, ISAC_MASK, 0x0);
623 }
624
625 static void
626 modehscx(struct HscxState *hs, int mode, int ichan)
627 {
628 struct IsdnCardState *sp = hs->sp;
629 int hscx = hs->hscx;
630
631 if (sp->debug & L1_DEB_HSCX) {
632 char tmp[40];
633 sprintf(tmp, "hscx %c mode %d ichan %d",
634 'A' + hscx, mode, ichan);
635 debugl1(sp, tmp);
636 }
637 hs->mode = mode;
638 writereg(sp->hscx[hscx], HSCX_CCR1, 0x85);
639 writereg(sp->hscx[hscx], HSCX_XAD1, 0xFF);
640 writereg(sp->hscx[hscx], HSCX_XAD2, 0xFF);
641 writereg(sp->hscx[hscx], HSCX_RAH2, 0xFF);
642 writereg(sp->hscx[hscx], HSCX_XBCH, 0x0);
643 writereg(sp->hscx[hscx], HSCX_RLCR, 0x0);
644
645 switch (mode) {
646 case (0):
647 writereg(sp->hscx[hscx], HSCX_CCR2, 0x30);
648 writereg(sp->hscx[hscx], HSCX_TSAX, 0xff);
649 writereg(sp->hscx[hscx], HSCX_TSAR, 0xff);
650 writereg(sp->hscx[hscx], HSCX_XCCR, 7);
651 writereg(sp->hscx[hscx], HSCX_RCCR, 7);
652 writereg(sp->hscx[hscx], HSCX_MODE, 0x84);
653 break;
654 case (1):
655 if (ichan == 0) {
656 writereg(sp->hscx[hscx], HSCX_CCR2, 0x30);
657 writereg(sp->hscx[hscx], HSCX_TSAX, 0x2f);
658 writereg(sp->hscx[hscx], HSCX_TSAR, 0x2f);
659 writereg(sp->hscx[hscx], HSCX_XCCR, 7);
660 writereg(sp->hscx[hscx], HSCX_RCCR, 7);
661 } else {
662 writereg(sp->hscx[hscx], HSCX_CCR2, 0x30);
663 writereg(sp->hscx[hscx], HSCX_TSAX, 0x3);
664 writereg(sp->hscx[hscx], HSCX_TSAR, 0x3);
665 writereg(sp->hscx[hscx], HSCX_XCCR, 7);
666 writereg(sp->hscx[hscx], HSCX_RCCR, 7);
667 }
668 writereg(sp->hscx[hscx], HSCX_MODE, 0xe4);
669 writereg(sp->hscx[hscx], HSCX_CMDR, 0x41);
670 break;
671 case (2):
672 if (ichan == 0) {
673 writereg(sp->hscx[hscx], HSCX_CCR2, 0x30);
674 writereg(sp->hscx[hscx], HSCX_TSAX, 0x2f);
675 writereg(sp->hscx[hscx], HSCX_TSAR, 0x2f);
676 writereg(sp->hscx[hscx], HSCX_XCCR, 7);
677 writereg(sp->hscx[hscx], HSCX_RCCR, 7);
678 } else {
679 writereg(sp->hscx[hscx], HSCX_CCR2, 0x30);
680 writereg(sp->hscx[hscx], HSCX_TSAX, 0x3);
681 writereg(sp->hscx[hscx], HSCX_TSAR, 0x3);
682 writereg(sp->hscx[hscx], HSCX_XCCR, 7);
683 writereg(sp->hscx[hscx], HSCX_RCCR, 7);
684 }
685 writereg(sp->hscx[hscx], HSCX_MODE, 0x8c);
686 writereg(sp->hscx[hscx], HSCX_CMDR, 0x41);
687 break;
688 }
689 writereg(sp->hscx[hscx], HSCX_ISTA, 0x00);
690 }
691
692 inline static void
693 release_ioregs(struct IsdnCard *card, int mask)
694 {
695 release_region(card->sp->cfg_reg, 8);
696 if (mask & 1)
697 release_region(card->sp->isac, 32);
698 if (mask & 2)
699 release_region(card->sp->isac - 0x400, 1);
700 if (mask & 4)
701 release_region(card->sp->hscx[0], 32);
702 if (mask & 8)
703 release_region(card->sp->hscx[0] - 0x400, 1);
704 if (mask & 0x10)
705 release_region(card->sp->hscx[1], 32);
706 if (mask & 0x20)
707 release_region(card->sp->hscx[1] - 0x400, 1);
708 }
709
710 void
711 release_io_avm_a1(struct IsdnCard *card)
712 {
713 release_ioregs(card, 0x3f);
714 }
715
716 static void
717 clear_pending_ints(struct IsdnCardState *sp)
718 {
719 int val;
720 char tmp[64];
721
722 val = readreg(sp->hscx[1], HSCX_ISTA);
723 sprintf(tmp, "HSCX B ISTA %x", val);
724 debugl1(sp, tmp);
725 if (val & 0x01) {
726 val = readreg(sp->hscx[1], HSCX_EXIR);
727 sprintf(tmp, "HSCX B EXIR %x", val);
728 debugl1(sp, tmp);
729 } else if (val & 0x02) {
730 val = readreg(sp->hscx[0], HSCX_EXIR);
731 sprintf(tmp, "HSCX A EXIR %x", val);
732 debugl1(sp, tmp);
733 }
734 val = readreg(sp->hscx[0], HSCX_ISTA);
735 sprintf(tmp, "HSCX A ISTA %x", val);
736 debugl1(sp, tmp);
737 val = readreg(sp->hscx[1], HSCX_STAR);
738 sprintf(tmp, "HSCX B STAR %x", val);
739 debugl1(sp, tmp);
740 val = readreg(sp->hscx[0], HSCX_STAR);
741 sprintf(tmp, "HSCX A STAR %x", val);
742 debugl1(sp, tmp);
743 val = readreg(sp->isac, ISAC_STAR);
744 sprintf(tmp, "ISAC STAR %x", val);
745 debugl1(sp, tmp);
746 val = readreg(sp->isac, ISAC_MODE);
747 sprintf(tmp, "ISAC MODE %x", val);
748 debugl1(sp, tmp);
749 val = readreg(sp->isac, ISAC_ADF2);
750 sprintf(tmp, "ISAC ADF2 %x", val);
751 debugl1(sp, tmp);
752 val = readreg(sp->isac, ISAC_ISTA);
753 sprintf(tmp, "ISAC ISTA %x", val);
754 debugl1(sp, tmp);
755 if (val & 0x01) {
756 val = readreg(sp->isac, ISAC_EXIR);
757 sprintf(tmp, "ISAC EXIR %x", val);
758 debugl1(sp, tmp);
759 } else if (val & 0x04) {
760 val = readreg(sp->isac, ISAC_CIR0);
761 sprintf(tmp, "ISAC CIR0 %x", val);
762 debugl1(sp, tmp);
763 }
764 writereg(sp->isac, ISAC_MASK, 0);
765 writereg(sp->isac, ISAC_CMDR, 0x41);
766 }
767
768 int
769 initavm_a1(struct IsdnCardState *sp)
770 {
771 int ret;
772 int loop = 0;
773 char tmp[40];
774
775 sp->counter = kstat_irqs(sp->irq);
776 sprintf(tmp, "IRQ %d count %d", sp->irq, sp->counter);
777 debugl1(sp, tmp);
778 clear_pending_ints(sp);
779 ret = get_irq(sp->cardnr, &avm_a1_interrupt);
780 if (ret) {
781 initisac(sp);
782 sp->modehscx(sp->hs, 0, 0);
783 sp->modehscx(sp->hs + 1, 0, 0);
784 while (loop++ < 10) {
785 /* At least 1-3 irqs must happen
786 * (one from HSCX A, one from HSCX B, 3rd from ISAC)
787 */
788 if (kstat_irqs(sp->irq) > sp->counter)
789 break;
790 current->state = TASK_INTERRUPTIBLE;
791 current->timeout = jiffies + 1;
792 schedule();
793 }
794 sprintf(tmp, "IRQ %d count %d", sp->irq,
795 kstat_irqs(sp->irq));
796 debugl1(sp, tmp);
797 if (kstat_irqs(sp->irq) == sp->counter) {
798 printk(KERN_WARNING
799 "AVM A1: IRQ(%d) getting no interrupts during init\n",
800 sp->irq);
801 free_irq(sp->irq, sp);
802 return (0);
803 }
804 }
805 return (ret);
806 }
807
808 int
809 setup_avm_a1(struct IsdnCard *card)
810 {
811 u_char val, verA, verB;
812 struct IsdnCardState *sp = card->sp;
813 long flags;
814 char tmp[64];
815
816 strcpy(tmp, avm_revision);
817 printk(KERN_NOTICE "HiSax: AVM driver Rev. %s\n", HiSax_getrev(tmp));
818 if (sp->typ != ISDN_CTYPE_A1)
819 return (0);
820
821 sp->cfg_reg = card->para[1] + 0x1800;
822 sp->isac = card->para[1] + 0x1400;
823 sp->hscx[0] = card->para[1] + 0x400;
824 sp->hscx[1] = card->para[1] + 0xc00;
825 sp->irq = card->para[0];
826 if (check_region((sp->cfg_reg), 8)) {
827 printk(KERN_WARNING
828 "HiSax: %s config port %x-%x already in use\n",
829 CardType[card->typ],
830 sp->cfg_reg,
831 sp->cfg_reg + 8);
832 return (0);
833 } else {
834 request_region(sp->cfg_reg, 8, "avm cfg");
835 }
836 if (check_region((sp->isac), 32)) {
837 printk(KERN_WARNING
838 "HiSax: %s isac ports %x-%x already in use\n",
839 CardType[sp->typ],
840 sp->isac,
841 sp->isac + 32);
842 release_ioregs(card, 0);
843 return (0);
844 } else {
845 request_region(sp->isac, 32, "HiSax isac");
846 }
847 if (check_region((sp->isac - 0x400), 1)) {
848 printk(KERN_WARNING
849 "HiSax: %s isac fifo port %x already in use\n",
850 CardType[sp->typ],
851 sp->isac - 0x400);
852 release_ioregs(card, 1);
853 return (0);
854 } else {
855 request_region(sp->isac - 0x400, 1, "HiSax isac fifo");
856 }
857 if (check_region((sp->hscx[0]), 32)) {
858 printk(KERN_WARNING
859 "HiSax: %s hscx A ports %x-%x already in use\n",
860 CardType[sp->typ],
861 sp->hscx[0],
862 sp->hscx[0] + 32);
863 release_ioregs(card, 3);
864 return (0);
865 } else {
866 request_region(sp->hscx[0], 32, "HiSax hscx A");
867 }
868 if (check_region((sp->hscx[0] - 0x400), 1)) {
869 printk(KERN_WARNING
870 "HiSax: %s hscx A fifo port %x already in use\n",
871 CardType[sp->typ],
872 sp->hscx[0] - 0x400);
873 release_ioregs(card, 7);
874 return (0);
875 } else {
876 request_region(sp->hscx[0] - 0x400, 1, "HiSax hscx A fifo");
877 }
878 if (check_region((sp->hscx[1]), 32)) {
879 printk(KERN_WARNING
880 "HiSax: %s hscx B ports %x-%x already in use\n",
881 CardType[sp->typ],
882 sp->hscx[1],
883 sp->hscx[1] + 32);
884 release_ioregs(card, 0xf);
885 return (0);
886 } else {
887 request_region(sp->hscx[1], 32, "HiSax hscx B");
888 }
889 if (check_region((sp->hscx[1] - 0x400), 1)) {
890 printk(KERN_WARNING
891 "HiSax: %s hscx B fifo port %x already in use\n",
892 CardType[sp->typ],
893 sp->hscx[1] - 0x400);
894 release_ioregs(card, 0x1f);
895 return (0);
896 } else {
897 request_region(sp->hscx[1] - 0x400, 1, "HiSax hscx B fifo");
898 }
899 save_flags(flags);
900 byteout(sp->cfg_reg, 0x0);
901 sti();
902 HZDELAY(HZ / 5 + 1);
903 byteout(sp->cfg_reg, 0x1);
904 HZDELAY(HZ / 5 + 1);
905 byteout(sp->cfg_reg, 0x0);
906 HZDELAY(HZ / 5 + 1);
907 val = sp->irq;
908 if (val == 9)
909 val = 2;
910 byteout(sp->cfg_reg + 1, val);
911 HZDELAY(HZ / 5 + 1);
912 byteout(sp->cfg_reg, 0x0);
913 HZDELAY(HZ / 5 + 1);
914 restore_flags(flags);
915
916 val = bytein(sp->cfg_reg);
917 printk(KERN_INFO "AVM A1: Byte at %x is %x\n",
918 sp->cfg_reg, val);
919 val = bytein(sp->cfg_reg + 3);
920 printk(KERN_INFO "AVM A1: Byte at %x is %x\n",
921 sp->cfg_reg + 3, val);
922 val = bytein(sp->cfg_reg + 2);
923 printk(KERN_INFO "AVM A1: Byte at %x is %x\n",
924 sp->cfg_reg + 2, val);
925 byteout(sp->cfg_reg, 0x14);
926 byteout(sp->cfg_reg, 0x18);
927 val = bytein(sp->cfg_reg);
928 printk(KERN_INFO "AVM A1: Byte at %x is %x\n",
929 sp->cfg_reg, val);
930
931 printk(KERN_NOTICE
932 "HiSax: %s config irq:%d cfg:%x\n",
933 CardType[sp->typ], sp->irq,
934 sp->cfg_reg);
935 printk(KERN_NOTICE
936 "HiSax: isac:%x/%x\n",
937 sp->isac, sp->isac - 0x400);
938 printk(KERN_NOTICE
939 "HiSax: hscx A:%x/%x hscx B:%x/%x\n",
940 sp->hscx[0], sp->hscx[0] - 0x400,
941 sp->hscx[1], sp->hscx[1] - 0x400);
942 verA = readreg(sp->hscx[0], HSCX_VSTR) & 0xf;
943 verB = readreg(sp->hscx[1], HSCX_VSTR) & 0xf;
944 printk(KERN_INFO "AVM A1: HSCX version A: %s B: %s\n",
945 HscxVersion(verA), HscxVersion(verB));
946 val = readreg(sp->isac, ISAC_RBCH);
947 printk(KERN_INFO "AVM A1: ISAC %s\n",
948 ISACVersion(val));
949 if ((verA == 0) | (verA == 0xf) | (verB == 0) | (verB == 0xf)) {
950 printk(KERN_WARNING
951 "AVM A1: wrong HSCX versions check IO address\n");
952 release_io_avm_a1(card);
953 return (0);
954 }
955 sp->modehscx = &modehscx;
956 sp->ph_command = &ph_command;
957 sp->hscx_fill_fifo = &hscx_fill_fifo;
958 sp->isac_fill_fifo = &isac_fill_fifo;
959 return (1);
960 }
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