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- Peter Anvin: more P4 configuration parsing
[davej-history.git] / drivers / net / irda / nsc-ircc.c
bloba63e865b78a3c93b9c99017676147803d17b0ed5
1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * All Rights Reserved
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * Neither Dag Brattli nor University of Tromsø admit liability nor
23 * provide warranty for any of this software. This material is
24 * provided "AS-IS" and at no charge.
25 *
26 * Notice that all functions that needs to access the chip in _any_
27 * way, must save BSR register on entry, and restore it on exit.
28 * It is _very_ important to follow this policy!
29 *
30 * __u8 bank;
31 *
32 * bank = inb(iobase+BSR);
33 *
34 * do_your_stuff_here();
35 *
36 * outb(bank, iobase+BSR);
37 *
38 * If you find bugs in this file, its very likely that the same bug
39 * will also be in w83977af_ir.c since the implementations are quite
40 * similar.
41 *
42 ********************************************************************/
43
44 #include <linux/module.h>
45
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/skbuff.h>
49 #include <linux/netdevice.h>
50 #include <linux/ioport.h>
51 #include <linux/delay.h>
52 #include <linux/malloc.h>
53 #include <linux/init.h>
54 #include <linux/rtnetlink.h>
55
56 #include <asm/io.h>
57 #include <asm/dma.h>
58 #include <asm/byteorder.h>
59
60 #include <linux/pm.h>
61
62 #include <net/irda/wrapper.h>
63 #include <net/irda/irda.h>
64 #include <net/irda/irmod.h>
65 #include <net/irda/irlap_frame.h>
66 #include <net/irda/irda_device.h>
67
68 #include <net/irda/nsc-ircc.h>
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Module parameters */
76 static int qos_mtt_bits = 0x07; /* 1 ms or more */
77 static int dongle_id;
78
79 /* Use BIOS settions by default, but user may supply module parameters */
80 static unsigned int io[] = { ~0, ~0, ~0, ~0 };
81 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
82 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
83
84 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
85 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
86 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
87 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
88
89 /* These are the known NSC chips */
90 static nsc_chip_t chips[] = {
91 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
92 nsc_ircc_probe_108, nsc_ircc_init_108 },
93 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf0,
94 nsc_ircc_probe_338, nsc_ircc_init_338 },
95 { NULL }
96 };
97
98 /* Max 4 instances for now */
99 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
100
101 static char *dongle_types[] = {
102 "Differential serial interface",
103 "Differential serial interface",
104 "Reserved",
105 "Reserved",
106 "Sharp RY5HD01",
107 "Reserved",
108 "Single-ended serial interface",
109 "Consumer-IR only",
110 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
111 "IBM31T1100 or Temic TFDS6000/TFDS6500",
112 "Reserved",
113 "Reserved",
114 "HP HSDL-1100/HSDL-2100",
115 "HP HSDL-1100/HSDL-2100"
116 "Supports SIR Mode only",
117 "No dongle connected",
118 };
119
120 /* Some prototypes */
121 static int nsc_ircc_open(int i, chipio_t *info);
122 #ifdef MODULE
123 static int nsc_ircc_close(struct nsc_ircc_cb *self);
124 #endif /* MODULE */
125 static int nsc_ircc_setup(chipio_t *info);
126 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
127 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
128 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
129 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
130 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
131 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
132 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
133 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
134 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
135 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
136 static int nsc_ircc_read_dongle_id (int iobase);
137 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
138
139 static int nsc_ircc_net_init(struct net_device *dev);
140 static int nsc_ircc_net_open(struct net_device *dev);
141 static int nsc_ircc_net_close(struct net_device *dev);
142 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
143 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
144 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
145
146 /*
147 * Function nsc_ircc_init ()
148 *
149 * Initialize chip. Just try to find out how many chips we are dealing with
150 * and where they are
151 */
152 int __init nsc_ircc_init(void)
153 {
154 chipio_t info;
155 nsc_chip_t *chip;
156 int ret = -ENODEV;
157 int cfg_base;
158 int cfg, id;
159 int reg;
160 int i = 0;
161
162 /* Probe for all the NSC chipsets we know about */
163 for (chip=chips; chip->name ; chip++,i++) {
164 IRDA_DEBUG(2, __FUNCTION__"(), Probing for %s ...\n",
165 chip->name);
166
167 /* Try all config registers for this chip */
168 for (cfg=0; cfg<3; cfg++) {
169 cfg_base = chip->cfg[cfg];
170 if (!cfg_base)
171 continue;
172
173 memset(&info, 0, sizeof(chipio_t));
174 info.cfg_base = cfg_base;
175 info.fir_base = io[i];
176 info.dma = dma[i];
177 info.irq = irq[i];
178
179 /* Read index register */
180 reg = inb(cfg_base);
181 if (reg == 0xff) {
182 IRDA_DEBUG(2, __FUNCTION__
183 "() no chip at 0x%03x\n", cfg_base);
184 continue;
185 }
186
187 /* Read chip identification register */
188 outb(chip->cid_index, cfg_base);
189 id = inb(cfg_base+1);
190 if ((id & chip->cid_mask) == chip->cid_value) {
191 IRDA_DEBUG(2, __FUNCTION__
192 "() Found %s chip, revision=%d\n",
193 chip->name, id & ~chip->cid_mask);
194 /*
195 * If the user supplies the base address, then
196 * we init the chip, if not we probe the values
197 * set by the BIOS
198 */
199 if (io[i] < 2000) {
200 chip->init(chip, &info);
201 } else
202 chip->probe(chip, &info);
203
204 if (nsc_ircc_open(i, &info) == 0)
205 ret = 0;
206 i++;
207 } else {
208 IRDA_DEBUG(2, __FUNCTION__
209 "(), Wrong chip id=0x%02x\n", id);
210 }
211 }
212
213 }
214
215 return ret;
216 }
217
218 /*
219 * Function nsc_ircc_cleanup ()
220 *
221 * Close all configured chips
222 *
223 */
224 #ifdef MODULE
225 static void nsc_ircc_cleanup(void)
226 {
227 int i;
228
229 pm_unregister_all(nsc_ircc_pmproc);
230
231 for (i=0; i < 4; i++) {
232 if (dev_self[i])
233 nsc_ircc_close(dev_self[i]);
234 }
235 }
236 #endif /* MODULE */
237
238 /*
239 * Function nsc_ircc_open (iobase, irq)
240 *
241 * Open driver instance
242 *
243 */
244 static int nsc_ircc_open(int i, chipio_t *info)
245 {
246 struct net_device *dev;
247 struct nsc_ircc_cb *self;
248 struct pm_dev *pmdev;
249 int ret;
250 int err;
251
252 IRDA_DEBUG(2, __FUNCTION__ "()\n");
253
254 if ((nsc_ircc_setup(info)) == -1)
255 return -1;
256
257 /* Allocate new instance of the driver */
258 self = kmalloc(sizeof(struct nsc_ircc_cb), GFP_KERNEL);
259 if (self == NULL) {
260 ERROR(__FUNCTION__ "(), can't allocate memory for "
261 "control block!\n");
262 return -ENOMEM;
263 }
264 memset(self, 0, sizeof(struct nsc_ircc_cb));
265 spin_lock_init(&self->lock);
266
267 /* Need to store self somewhere */
268 dev_self[i] = self;
269 self->index = i;
270
271 /* Initialize IO */
272 self->io.cfg_base = info->cfg_base;
273 self->io.fir_base = info->fir_base;
274 self->io.irq = info->irq;
275 self->io.fir_ext = CHIP_IO_EXTENT;
276 self->io.dma = info->dma;
277 self->io.fifo_size = 32;
278
279 /* Reserve the ioports that we need */
280 ret = check_region(self->io.fir_base, self->io.fir_ext);
281 if (ret < 0) {
282 WARNING(__FUNCTION__ "(), can't get iobase of 0x%03x\n",
283 self->io.fir_base);
284 dev_self[i] = NULL;
285 kfree(self);
286 return -ENODEV;
287 }
288 request_region(self->io.fir_base, self->io.fir_ext, driver_name);
289
290 /* Initialize QoS for this device */
291 irda_init_max_qos_capabilies(&self->qos);
292
293 /* The only value we must override it the baudrate */
294 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
295 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
296
297 self->qos.min_turn_time.bits = qos_mtt_bits;
298 irda_qos_bits_to_value(&self->qos);
299
300 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO|IFF_DONGLE;
301
302 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
303 self->rx_buff.truesize = 14384;
304 self->tx_buff.truesize = 14384;
305
306 /* Allocate memory if needed */
307 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
308 GFP_KERNEL|GFP_DMA);
309 if (self->rx_buff.head == NULL) {
310 kfree(self);
311 return -ENOMEM;
312 }
313 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
314
315 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
316 GFP_KERNEL|GFP_DMA);
317 if (self->tx_buff.head == NULL) {
318 kfree(self);
319 kfree(self->rx_buff.head);
320 return -ENOMEM;
321 }
322 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
323
324 self->rx_buff.in_frame = FALSE;
325 self->rx_buff.state = OUTSIDE_FRAME;
326 self->tx_buff.data = self->tx_buff.head;
327 self->rx_buff.data = self->rx_buff.head;
328
329 /* Reset Tx queue info */
330 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
331 self->tx_fifo.tail = self->tx_buff.head;
332
333 if (!(dev = dev_alloc("irda%d", &err))) {
334 ERROR(__FUNCTION__ "(), dev_alloc() failed!\n");
335 return -ENOMEM;
336 }
337
338 dev->priv = (void *) self;
339 self->netdev = dev;
340
341 /* Override the network functions we need to use */
342 dev->init = nsc_ircc_net_init;
343 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
344 dev->open = nsc_ircc_net_open;
345 dev->stop = nsc_ircc_net_close;
346 dev->do_ioctl = nsc_ircc_net_ioctl;
347 dev->get_stats = nsc_ircc_net_get_stats;
348
349 rtnl_lock();
350 err = register_netdevice(dev);
351 rtnl_unlock();
352 if (err) {
353 ERROR(__FUNCTION__ "(), register_netdev() failed!\n");
354 return -1;
355 }
356 MESSAGE("IrDA: Registered device %s\n", dev->name);
357
358 /* Check if user has supplied the dongle id or not */
359 if (!dongle_id) {
360 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
361
362 MESSAGE("%s, Found dongle: %s\n", driver_name,
363 dongle_types[dongle_id]);
364 } else {
365 MESSAGE("%s, Using dongle: %s\n", driver_name,
366 dongle_types[dongle_id]);
367 }
368
369 self->io.dongle_id = dongle_id;
370 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
371
372 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
373 if (pmdev)
374 pmdev->data = self;
375
376 return 0;
377 }
378
379 #ifdef MODULE
380 /*
381 * Function nsc_ircc_close (self)
382 *
383 * Close driver instance
384 *
385 */
386 static int nsc_ircc_close(struct nsc_ircc_cb *self)
387 {
388 int iobase;
389
390 IRDA_DEBUG(4, __FUNCTION__ "()\n");
391
392 ASSERT(self != NULL, return -1;);
393
394 iobase = self->io.fir_base;
395
396 /* Remove netdevice */
397 if (self->netdev) {
398 rtnl_lock();
399 unregister_netdevice(self->netdev);
400 rtnl_unlock();
401 }
402
403 /* Release the PORT that this driver is using */
404 IRDA_DEBUG(4, __FUNCTION__ "(), Releasing Region %03x\n",
405 self->io.fir_base);
406 release_region(self->io.fir_base, self->io.fir_ext);
407
408 if (self->tx_buff.head)
409 kfree(self->tx_buff.head);
410
411 if (self->rx_buff.head)
412 kfree(self->rx_buff.head);
413
414 dev_self[self->index] = NULL;
415 kfree(self);
416
417 return 0;
418 }
419 #endif /* MODULE */
420
421 /*
422 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
423 *
424 * Initialize the NSC '108 chip
425 *
426 */
427 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
428 {
429 int cfg_base = info->cfg_base;
430 __u8 temp=0;
431
432 outb(2, cfg_base); /* Mode Control Register (MCTL) */
433 outb(0x00, cfg_base+1); /* Disable device */
434
435 /* Base Address and Interrupt Control Register (BAIC) */
436 outb(0, cfg_base);
437 switch (info->fir_base) {
438 case 0x3e8: outb(0x14, cfg_base+1); break;
439 case 0x2e8: outb(0x15, cfg_base+1); break;
440 case 0x3f8: outb(0x16, cfg_base+1); break;
441 case 0x2f8: outb(0x17, cfg_base+1); break;
442 default: ERROR(__FUNCTION__ "(), invalid base_address");
443 }
444
445 /* Control Signal Routing Register (CSRT) */
446 switch (info->irq) {
447 case 3: temp = 0x01; break;
448 case 4: temp = 0x02; break;
449 case 5: temp = 0x03; break;
450 case 7: temp = 0x04; break;
451 case 9: temp = 0x05; break;
452 case 11: temp = 0x06; break;
453 case 15: temp = 0x07; break;
454 default: ERROR(__FUNCTION__ "(), invalid irq");
455 }
456 outb(1, cfg_base);
457
458 switch (info->dma) {
459 case 0: outb(0x08+temp, cfg_base+1); break;
460 case 1: outb(0x10+temp, cfg_base+1); break;
461 case 3: outb(0x18+temp, cfg_base+1); break;
462 default: ERROR(__FUNCTION__ "(), invalid dma");
463 }
464
465 outb(2, cfg_base); /* Mode Control Register (MCTL) */
466 outb(0x03, cfg_base+1); /* Enable device */
467
468 return 0;
469 }
470
471 /*
472 * Function nsc_ircc_probe_108 (chip, info)
473 *
474 *
475 *
476 */
477 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
478 {
479 int cfg_base = info->cfg_base;
480 int reg;
481
482 /* Read address and interrupt control register (BAIC) */
483 outb(CFG_BAIC, cfg_base);
484 reg = inb(cfg_base+1);
485
486 switch (reg & 0x03) {
487 case 0:
488 info->fir_base = 0x3e8;
489 break;
490 case 1:
491 info->fir_base = 0x2e8;
492 break;
493 case 2:
494 info->fir_base = 0x3f8;
495 break;
496 case 3:
497 info->fir_base = 0x2f8;
498 break;
499 }
500 info->sir_base = info->fir_base;
501 IRDA_DEBUG(2, __FUNCTION__ "(), probing fir_base=0x%03x\n",
502 info->fir_base);
503
504 /* Read control signals routing register (CSRT) */
505 outb(CFG_CSRT, cfg_base);
506 reg = inb(cfg_base+1);
507
508 switch (reg & 0x07) {
509 case 0:
510 info->irq = -1;
511 break;
512 case 1:
513 info->irq = 3;
514 break;
515 case 2:
516 info->irq = 4;
517 break;
518 case 3:
519 info->irq = 5;
520 break;
521 case 4:
522 info->irq = 7;
523 break;
524 case 5:
525 info->irq = 9;
526 break;
527 case 6:
528 info->irq = 11;
529 break;
530 case 7:
531 info->irq = 15;
532 break;
533 }
534 IRDA_DEBUG(2, __FUNCTION__ "(), probing irq=%d\n", info->irq);
535
536 /* Currently we only read Rx DMA but it will also be used for Tx */
537 switch ((reg >> 3) & 0x03) {
538 case 0:
539 info->dma = -1;
540 break;
541 case 1:
542 info->dma = 0;
543 break;
544 case 2:
545 info->dma = 1;
546 break;
547 case 3:
548 info->dma = 3;
549 break;
550 }
551 IRDA_DEBUG(2, __FUNCTION__ "(), probing dma=%d\n", info->dma);
552
553 /* Read mode control register (MCTL) */
554 outb(CFG_MCTL, cfg_base);
555 reg = inb(cfg_base+1);
556
557 info->enabled = reg & 0x01;
558 info->suspended = !((reg >> 1) & 0x01);
559
560 return 0;
561 }
562
563 /*
564 * Function nsc_ircc_init_338 (chip, info)
565 *
566 * Initialize the NSC '338 chip. Remember that the 87338 needs two
567 * consecutive writes to the data registers while CPU interrupts are
568 * disabled. The 97338 does not require this, but shouldn't be any
569 * harm if we do it anyway.
570 */
571 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
572 {
573 /* No init yet */
574
575 return 0;
576 }
577
578 /*
579 * Function nsc_ircc_probe_338 (chip, info)
580 *
581 *
582 *
583 */
584 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
585 {
586 int cfg_base = info->cfg_base;
587 int reg, com = 0;
588 int pnp;
589
590 /* Read funtion enable register (FER) */
591 outb(CFG_FER, cfg_base);
592 reg = inb(cfg_base+1);
593
594 info->enabled = (reg >> 2) & 0x01;
595
596 /* Check if we are in Legacy or PnP mode */
597 outb(CFG_PNP0, cfg_base);
598 reg = inb(cfg_base+1);
599
600 pnp = (reg >> 4) & 0x01;
601 if (pnp) {
602 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
603 outb(0x46, cfg_base);
604 reg = (inb(cfg_base+1) & 0xfe) << 2;
605
606 outb(0x47, cfg_base);
607 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
608
609 info->fir_base = reg;
610 } else {
611 /* Read function address register (FAR) */
612 outb(CFG_FAR, cfg_base);
613 reg = inb(cfg_base+1);
614
615 switch ((reg >> 4) & 0x03) {
616 case 0:
617 info->fir_base = 0x3f8;
618 break;
619 case 1:
620 info->fir_base = 0x2f8;
621 break;
622 case 2:
623 com = 3;
624 break;
625 case 3:
626 com = 4;
627 break;
628 }
629
630 if (com) {
631 switch ((reg >> 6) & 0x03) {
632 case 0:
633 if (com == 3)
634 info->fir_base = 0x3e8;
635 else
636 info->fir_base = 0x2e8;
637 break;
638 case 1:
639 if (com == 3)
640 info->fir_base = 0x338;
641 else
642 info->fir_base = 0x238;
643 break;
644 case 2:
645 if (com == 3)
646 info->fir_base = 0x2e8;
647 else
648 info->fir_base = 0x2e0;
649 break;
650 case 3:
651 if (com == 3)
652 info->fir_base = 0x220;
653 else
654 info->fir_base = 0x228;
655 break;
656 }
657 }
658 }
659 info->sir_base = info->fir_base;
660
661 /* Read PnP register 1 (PNP1) */
662 outb(CFG_PNP1, cfg_base);
663 reg = inb(cfg_base+1);
664
665 info->irq = reg >> 4;
666
667 /* Read PnP register 3 (PNP3) */
668 outb(CFG_PNP3, cfg_base);
669 reg = inb(cfg_base+1);
670
671 info->dma = (reg & 0x07) - 1;
672
673 /* Read power and test register (PTR) */
674 outb(CFG_PTR, cfg_base);
675 reg = inb(cfg_base+1);
676
677 info->suspended = reg & 0x01;
678
679 return 0;
680 }
681
682 /*
683 * Function nsc_ircc_setup (info)
684 *
685 * Returns non-negative on success.
686 *
687 */
688 static int nsc_ircc_setup(chipio_t *info)
689 {
690 int version;
691 int iobase = info->fir_base;
692
693 /* Read the Module ID */
694 switch_bank(iobase, BANK3);
695 version = inb(iobase+MID);
696
697 /* Should be 0x2? */
698 if (0x20 != (version & 0xf0)) {
699 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
700 return -1;
701 }
702 MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
703 info->cfg_base);
704
705 /* Switch to advanced mode */
706 switch_bank(iobase, BANK2);
707 outb(ECR1_EXT_SL, iobase+ECR1);
708 switch_bank(iobase, BANK0);
709
710 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
711 switch_bank(iobase, BANK0);
712 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
713
714 outb(0x03, iobase+LCR); /* 8 bit word length */
715 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
716
717 /* Set FIFO size to 32 */
718 switch_bank(iobase, BANK2);
719 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
720
721 /* IRCR2: FEND_MD is not set */
722 switch_bank(iobase, BANK5);
723 outb(0x02, iobase+4);
724
725 /* Make sure that some defaults are OK */
726 switch_bank(iobase, BANK6);
727 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
728 outb(0x0a, iobase+1); /* Set MIR pulse width */
729 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
730 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
731
732 MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
733
734 /* Enable receive interrupts */
735 switch_bank(iobase, BANK0);
736 outb(IER_RXHDL_IE, iobase+IER);
737
738 return 0;
739 }
740
741 /*
742 * Function nsc_ircc_read_dongle_id (void)
743 *
744 * Try to read dongle indentification. This procedure needs to be executed
745 * once after power-on/reset. It also needs to be used whenever you suspect
746 * that the user may have plugged/unplugged the IrDA Dongle.
747 */
748 static int nsc_ircc_read_dongle_id (int iobase)
749 {
750 int dongle_id;
751 __u8 bank;
752
753 bank = inb(iobase+BSR);
754
755 /* Select Bank 7 */
756 switch_bank(iobase, BANK7);
757
758 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
759 outb(0x00, iobase+7);
760
761 /* ID0, 1, and 2 are pulled up/down very slowly */
762 udelay(50);
763
764 /* IRCFG1: read the ID bits */
765 dongle_id = inb(iobase+4) & 0x0f;
766
767 #ifdef BROKEN_DONGLE_ID
768 if (dongle_id == 0x0a)
769 dongle_id = 0x09;
770 #endif
771 /* Go back to bank 0 before returning */
772 switch_bank(iobase, BANK0);
773
774 outb(bank, iobase+BSR);
775
776 return dongle_id;
777 }
778
779 /*
780 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
781 *
782 * This function initializes the dongle for the transceiver that is
783 * used. This procedure needs to be executed once after
784 * power-on/reset. It also needs to be used whenever you suspect that
785 * the dongle is changed.
786 */
787 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
788 {
789 int bank;
790
791 /* Save current bank */
792 bank = inb(iobase+BSR);
793
794 /* Select Bank 7 */
795 switch_bank(iobase, BANK7);
796
797 /* IRCFG4: set according to dongle_id */
798 switch (dongle_id) {
799 case 0x00: /* same as */
800 case 0x01: /* Differential serial interface */
801 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
802 dongle_types[dongle_id]);
803 break;
804 case 0x02: /* same as */
805 case 0x03: /* Reserved */
806 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
807 dongle_types[dongle_id]);
808 break;
809 case 0x04: /* Sharp RY5HD01 */
810 break;
811 case 0x05: /* Reserved, but this is what the Thinkpad reports */
812 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
813 dongle_types[dongle_id]);
814 break;
815 case 0x06: /* Single-ended serial interface */
816 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
817 dongle_types[dongle_id]);
818 break;
819 case 0x07: /* Consumer-IR only */
820 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
821 dongle_types[dongle_id]);
822 break;
823 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
824 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
825 dongle_types[dongle_id]);
826 break;
827 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
828 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
829 break;
830 case 0x0A: /* same as */
831 case 0x0B: /* Reserved */
832 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
833 dongle_types[dongle_id]);
834 break;
835 case 0x0C: /* same as */
836 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
837 /*
838 * Set irsl0 as input, irsl[1-2] as output, and separate
839 * inputs are used for SIR and MIR/FIR
840 */
841 outb(0x48, iobase+7);
842 break;
843 case 0x0E: /* Supports SIR Mode only */
844 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
845 break;
846 case 0x0F: /* No dongle connected */
847 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
848 dongle_types[dongle_id]);
849
850 switch_bank(iobase, BANK0);
851 outb(0x62, iobase+MCR);
852 break;
853 default:
854 IRDA_DEBUG(0, __FUNCTION__ "(), invalid dongle_id %#x",
855 dongle_id);
856 }
857
858 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
859 outb(0x00, iobase+4);
860
861 /* Restore bank register */
862 outb(bank, iobase+BSR);
863
864 } /* set_up_dongle_interface */
865
866 /*
867 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
868 *
869 * Change speed of the attach dongle
870 *
871 */
872 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
873 {
874 unsigned long flags;
875 __u8 bank;
876
877 /* Save current bank */
878 bank = inb(iobase+BSR);
879
880 /* Select Bank 7 */
881 switch_bank(iobase, BANK7);
882
883 /* IRCFG1: set according to dongle_id */
884 switch (dongle_id) {
885 case 0x00: /* same as */
886 case 0x01: /* Differential serial interface */
887 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
888 dongle_types[dongle_id]);
889 break;
890 case 0x02: /* same as */
891 case 0x03: /* Reserved */
892 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
893 dongle_types[dongle_id]);
894 break;
895 case 0x04: /* Sharp RY5HD01 */
896 break;
897 case 0x05: /* Reserved */
898 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
899 dongle_types[dongle_id]);
900 break;
901 case 0x06: /* Single-ended serial interface */
902 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
903 dongle_types[dongle_id]);
904 break;
905 case 0x07: /* Consumer-IR only */
906 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
907 dongle_types[dongle_id]);
908 break;
909 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
910 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
911 dongle_types[dongle_id]);
912 outb(0x00, iobase+4);
913 if (speed > 115200)
914 outb(0x01, iobase+4);
915 break;
916 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
917 outb(0x01, iobase+4);
918
919 if (speed == 4000000) {
920 save_flags(flags);
921 cli();
922 outb(0x81, iobase+4);
923 outb(0x80, iobase+4);
924 restore_flags(flags);
925 } else
926 outb(0x00, iobase+4);
927 break;
928 case 0x0A: /* same as */
929 case 0x0B: /* Reserved */
930 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
931 dongle_types[dongle_id]);
932 break;
933 case 0x0C: /* same as */
934 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
935 break;
936 case 0x0E: /* Supports SIR Mode only */
937 break;
938 case 0x0F: /* No dongle connected */
939 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
940 dongle_types[dongle_id]);
941
942 switch_bank(iobase, BANK0);
943 outb(0x62, iobase+MCR);
944 break;
945 default:
946 IRDA_DEBUG(0, __FUNCTION__ "(), invalid data_rate\n");
947 }
948 /* Restore bank register */
949 outb(bank, iobase+BSR);
950 }
951
952 /*
953 * Function nsc_ircc_change_speed (self, baud)
954 *
955 * Change the speed of the device
956 *
957 */
958 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
959 {
960 struct net_device *dev = self->netdev;
961 __u8 mcr = MCR_SIR;
962 int iobase;
963 __u8 bank;
964
965 IRDA_DEBUG(2, __FUNCTION__ "(), speed=%d\n", speed);
966
967 ASSERT(self != NULL, return;);
968
969 iobase = self->io.fir_base;
970
971 /* Update accounting for new speed */
972 self->io.speed = speed;
973
974 /* Save current bank */
975 bank = inb(iobase+BSR);
976
977 /* Disable interrupts */
978 switch_bank(iobase, BANK0);
979 outb(0, iobase+IER);
980
981 /* Select Bank 2 */
982 switch_bank(iobase, BANK2);
983
984 outb(0x00, iobase+BGDH);
985 switch (speed) {
986 case 9600: outb(0x0c, iobase+BGDL); break;
987 case 19200: outb(0x06, iobase+BGDL); break;
988 case 38400: outb(0x03, iobase+BGDL); break;
989 case 57600: outb(0x02, iobase+BGDL); break;
990 case 115200: outb(0x01, iobase+BGDL); break;
991 case 576000:
992 switch_bank(iobase, BANK5);
993
994 /* IRCR2: MDRS is set */
995 outb(inb(iobase+4) | 0x04, iobase+4);
996
997 mcr = MCR_MIR;
998 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
999 break;
1000 case 1152000:
1001 mcr = MCR_MIR;
1002 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
1003 break;
1004 case 4000000:
1005 mcr = MCR_FIR;
1006 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
1007 break;
1008 default:
1009 mcr = MCR_FIR;
1010 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n",
1011 speed);
1012 break;
1013 }
1014
1015 /* Set appropriate speed mode */
1016 switch_bank(iobase, BANK0);
1017 outb(mcr | MCR_TX_DFR, iobase+MCR);
1018
1019 /* Give some hits to the transceiver */
1020 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1021
1022 /* Set FIFO threshold to TX17, RX16 */
1023 switch_bank(iobase, BANK0);
1024 outb(0x00, iobase+FCR);
1025 outb(FCR_FIFO_EN, iobase+FCR);
1026 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1027 FCR_TXTH| /* Set Tx FIFO threshold */
1028 FCR_TXSR| /* Reset Tx FIFO */
1029 FCR_RXSR| /* Reset Rx FIFO */
1030 FCR_FIFO_EN, /* Enable FIFOs */
1031 iobase+FCR);
1032
1033 /* Set FIFO size to 32 */
1034 switch_bank(iobase, BANK2);
1035 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1036
1037 /* Enable some interrupts so we can receive frames */
1038 switch_bank(iobase, BANK0);
1039 if (speed > 115200) {
1040 /* Install FIR xmit handler */
1041 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1042 outb(IER_SFIF_IE, iobase+IER);
1043 nsc_ircc_dma_receive(self);
1044 } else {
1045 /* Install SIR xmit handler */
1046 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1047 outb(IER_RXHDL_IE, iobase+IER);
1048 }
1049
1050 /* Restore BSR */
1051 outb(bank, iobase+BSR);
1052 netif_wake_queue(dev);
1053
1054 }
1055
1056 /*
1057 * Function nsc_ircc_hard_xmit (skb, dev)
1058 *
1059 * Transmit the frame!
1060 *
1061 */
1062 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1063 {
1064 struct nsc_ircc_cb *self;
1065 unsigned long flags;
1066 int iobase;
1067 __u32 speed;
1068 __u8 bank;
1069
1070 self = (struct nsc_ircc_cb *) dev->priv;
1071
1072 ASSERT(self != NULL, return 0;);
1073
1074 iobase = self->io.fir_base;
1075
1076 netif_stop_queue(dev);
1077
1078 /* Check if we need to change the speed */
1079 if ((speed = irda_get_speed(skb)) != self->io.speed) {
1080 /* Check for empty frame */
1081 if (!skb->len) {
1082 nsc_ircc_change_speed(self, speed);
1083 return 0;
1084 } else
1085 self->new_speed = speed;
1086 }
1087
1088 spin_lock_irqsave(&self->lock, flags);
1089
1090 /* Save current bank */
1091 bank = inb(iobase+BSR);
1092
1093 self->tx_buff.data = self->tx_buff.head;
1094
1095 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1096 self->tx_buff.truesize);
1097
1098 self->stats.tx_bytes += self->tx_buff.len;
1099
1100 /* Add interrupt on tx low level (will fire immediately) */
1101 switch_bank(iobase, BANK0);
1102 outb(IER_TXLDL_IE, iobase+IER);
1103
1104 /* Restore bank register */
1105 outb(bank, iobase+BSR);
1106
1107 spin_unlock_irqrestore(&self->lock, flags);
1108
1109 dev_kfree_skb(skb);
1110
1111 return 0;
1112 }
1113
1114 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1115 {
1116 struct nsc_ircc_cb *self;
1117 unsigned long flags;
1118 int iobase;
1119 __u32 speed;
1120 __u8 bank;
1121 int mtt, diff;
1122
1123 self = (struct nsc_ircc_cb *) dev->priv;
1124 iobase = self->io.fir_base;
1125
1126 netif_stop_queue(dev);
1127
1128 /* Check if we need to change the speed */
1129 if ((speed = irda_get_speed(skb)) != self->io.speed) {
1130 /* Check for empty frame */
1131 if (!skb->len) {
1132 nsc_ircc_change_speed(self, speed);
1133 return 0;
1134 } else
1135 self->new_speed = speed;
1136 }
1137
1138 spin_lock_irqsave(&self->lock, flags);
1139
1140 /* Save current bank */
1141 bank = inb(iobase+BSR);
1142
1143 /* Register and copy this frame to DMA memory */
1144 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1145 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1146 self->tx_fifo.tail += skb->len;
1147
1148 self->stats.tx_bytes += skb->len;
1149
1150 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1151 skb->len);
1152
1153 self->tx_fifo.len++;
1154 self->tx_fifo.free++;
1155
1156 /* Start transmit only if there is currently no transmit going on */
1157 if (self->tx_fifo.len == 1) {
1158 /* Check if we must wait the min turn time or not */
1159 mtt = irda_get_mtt(skb);
1160 if (mtt) {
1161 /* Check how much time we have used already */
1162 get_fast_time(&self->now);
1163 diff = self->now.tv_usec - self->stamp.tv_usec;
1164 if (diff < 0)
1165 diff += 1000000;
1166
1167 /* Check if the mtt is larger than the time we have
1168 * already used by all the protocol processing
1169 */
1170 if (mtt > diff) {
1171 mtt -= diff;
1172
1173 /*
1174 * Use timer if delay larger than 125 us, and
1175 * use udelay for smaller values which should
1176 * be acceptable
1177 */
1178 if (mtt > 125) {
1179 /* Adjust for timer resolution */
1180 mtt = mtt / 125;
1181
1182 /* Setup timer */
1183 switch_bank(iobase, BANK4);
1184 outb(mtt & 0xff, iobase+TMRL);
1185 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1186
1187 /* Start timer */
1188 outb(IRCR1_TMR_EN, iobase+IRCR1);
1189 self->io.direction = IO_XMIT;
1190
1191 /* Enable timer interrupt */
1192 switch_bank(iobase, BANK0);
1193 outb(IER_TMR_IE, iobase+IER);
1194
1195 /* Timer will take care of the rest */
1196 goto out;
1197 } else
1198 udelay(mtt);
1199 }
1200 }
1201 /* Enable DMA interrupt */
1202 switch_bank(iobase, BANK0);
1203 outb(IER_DMA_IE, iobase+IER);
1204
1205 /* Transmit frame */
1206 nsc_ircc_dma_xmit(self, iobase);
1207 }
1208 out:
1209 /* Not busy transmitting anymore if window is not full */
1210 if (self->tx_fifo.free < MAX_TX_WINDOW)
1211 netif_wake_queue(self->netdev);
1212
1213 /* Restore bank register */
1214 outb(bank, iobase+BSR);
1215
1216 spin_unlock_irqrestore(&self->lock, flags);
1217 dev_kfree_skb(skb);
1218
1219 return 0;
1220 }
1221
1222 /*
1223 * Function nsc_ircc_dma_xmit (self, iobase)
1224 *
1225 * Transmit data using DMA
1226 *
1227 */
1228 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1229 {
1230 int bsr;
1231
1232 /* Save current bank */
1233 bsr = inb(iobase+BSR);
1234
1235 /* Disable DMA */
1236 switch_bank(iobase, BANK0);
1237 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1238
1239 self->io.direction = IO_XMIT;
1240
1241 /* Choose transmit DMA channel */
1242 switch_bank(iobase, BANK2);
1243 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1244
1245 setup_dma(self->io.dma,
1246 self->tx_fifo.queue[self->tx_fifo.ptr].start,
1247 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1248 DMA_TX_MODE);
1249
1250 /* Enable DMA and SIR interaction pulse */
1251 switch_bank(iobase, BANK0);
1252 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1253
1254 /* Restore bank register */
1255 outb(bsr, iobase+BSR);
1256 }
1257
1258 /*
1259 * Function nsc_ircc_pio_xmit (self, iobase)
1260 *
1261 * Transmit data using PIO. Returns the number of bytes that actually
1262 * got transfered
1263 *
1264 */
1265 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1266 {
1267 int actual = 0;
1268 __u8 bank;
1269
1270 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1271
1272 /* Save current bank */
1273 bank = inb(iobase+BSR);
1274
1275 switch_bank(iobase, BANK0);
1276 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1277 IRDA_DEBUG(4, __FUNCTION__
1278 "(), warning, FIFO not empty yet!\n");
1279
1280 /* FIFO may still be filled to the Tx interrupt threshold */
1281 fifo_size -= 17;
1282 }
1283
1284 /* Fill FIFO with current frame */
1285 while ((fifo_size-- > 0) && (actual < len)) {
1286 /* Transmit next byte */
1287 outb(buf[actual++], iobase+TXD);
1288 }
1289
1290 IRDA_DEBUG(4, __FUNCTION__ "(), fifo_size %d ; %d sent of %d\n",
1291 fifo_size, actual, len);
1292
1293 /* Restore bank */
1294 outb(bank, iobase+BSR);
1295
1296 return actual;
1297 }
1298
1299 /*
1300 * Function nsc_ircc_dma_xmit_complete (self)
1301 *
1302 * The transfer of a frame in finished. This function will only be called
1303 * by the interrupt handler
1304 *
1305 */
1306 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1307 {
1308 int iobase;
1309 __u8 bank;
1310 int ret = TRUE;
1311
1312 IRDA_DEBUG(2, __FUNCTION__ "()\n");
1313
1314 iobase = self->io.fir_base;
1315
1316 /* Save current bank */
1317 bank = inb(iobase+BSR);
1318
1319 /* Disable DMA */
1320 switch_bank(iobase, BANK0);
1321 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1322
1323 /* Check for underrrun! */
1324 if (inb(iobase+ASCR) & ASCR_TXUR) {
1325 self->stats.tx_errors++;
1326 self->stats.tx_fifo_errors++;
1327
1328 /* Clear bit, by writing 1 into it */
1329 outb(ASCR_TXUR, iobase+ASCR);
1330 } else {
1331 self->stats.tx_packets++;
1332 }
1333
1334 /* Check if we need to change the speed */
1335 if (self->new_speed) {
1336 nsc_ircc_change_speed(self, self->new_speed);
1337 self->new_speed = 0;
1338 }
1339
1340 /* Finished with this frame, so prepare for next */
1341 self->tx_fifo.ptr++;
1342 self->tx_fifo.len--;
1343
1344 /* Any frames to be sent back-to-back? */
1345 if (self->tx_fifo.len) {
1346 nsc_ircc_dma_xmit(self, iobase);
1347
1348 /* Not finished yet! */
1349 ret = FALSE;
1350 } else {
1351 /* Reset Tx FIFO info */
1352 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1353 self->tx_fifo.tail = self->tx_buff.head;
1354 }
1355
1356 /* Make sure we have room for more frames */
1357 if (self->tx_fifo.free < MAX_TX_WINDOW) {
1358 /* Not busy transmitting anymore */
1359 /* Tell the network layer, that we can accept more frames */
1360 netif_wake_queue(self->netdev);
1361 }
1362
1363 /* Restore bank */
1364 outb(bank, iobase+BSR);
1365
1366 return ret;
1367 }
1368
1369 /*
1370 * Function nsc_ircc_dma_receive (self)
1371 *
1372 * Get ready for receiving a frame. The device will initiate a DMA
1373 * if it starts to receive a frame.
1374 *
1375 */
1376 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1377 {
1378 int iobase;
1379 __u8 bsr;
1380
1381 iobase = self->io.fir_base;
1382
1383 /* Reset Tx FIFO info */
1384 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1385 self->tx_fifo.tail = self->tx_buff.head;
1386
1387 /* Save current bank */
1388 bsr = inb(iobase+BSR);
1389
1390 /* Disable DMA */
1391 switch_bank(iobase, BANK0);
1392 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1393
1394 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1395 switch_bank(iobase, BANK2);
1396 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1397
1398 self->io.direction = IO_RECV;
1399 self->rx_buff.data = self->rx_buff.head;
1400
1401 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1402 switch_bank(iobase, BANK0);
1403 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1404
1405 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1406 self->st_fifo.tail = self->st_fifo.head = 0;
1407
1408 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
1409 DMA_RX_MODE);
1410
1411 /* Enable DMA */
1412 switch_bank(iobase, BANK0);
1413 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1414
1415 /* Restore bank register */
1416 outb(bsr, iobase+BSR);
1417
1418 return 0;
1419 }
1420
1421 /*
1422 * Function nsc_ircc_dma_receive_complete (self)
1423 *
1424 * Finished with receiving frames
1425 *
1426 *
1427 */
1428 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1429 {
1430 struct st_fifo *st_fifo;
1431 struct sk_buff *skb;
1432 __u8 status;
1433 __u8 bank;
1434 int len;
1435
1436 st_fifo = &self->st_fifo;
1437
1438 /* Save current bank */
1439 bank = inb(iobase+BSR);
1440
1441 /* Read all entries in status FIFO */
1442 switch_bank(iobase, BANK5);
1443 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1444 /* We must empty the status FIFO no matter what */
1445 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1446
1447 if (st_fifo->tail >= MAX_RX_WINDOW) {
1448 IRDA_DEBUG(0, __FUNCTION__ "(), window is full!\n");
1449 continue;
1450 }
1451
1452 st_fifo->entries[st_fifo->tail].status = status;
1453 st_fifo->entries[st_fifo->tail].len = len;
1454 st_fifo->pending_bytes += len;
1455 st_fifo->tail++;
1456 st_fifo->len++;
1457 }
1458 /* Try to process all entries in status FIFO */
1459 while (st_fifo->len > 0) {
1460 /* Get first entry */
1461 status = st_fifo->entries[st_fifo->head].status;
1462 len = st_fifo->entries[st_fifo->head].len;
1463 st_fifo->pending_bytes -= len;
1464 st_fifo->head++;
1465 st_fifo->len--;
1466
1467 /* Check for errors */
1468 if (status & FRM_ST_ERR_MSK) {
1469 if (status & FRM_ST_LOST_FR) {
1470 /* Add number of lost frames to stats */
1471 self->stats.rx_errors += len;
1472 } else {
1473 /* Skip frame */
1474 self->stats.rx_errors++;
1475
1476 self->rx_buff.data += len;
1477
1478 if (status & FRM_ST_MAX_LEN)
1479 self->stats.rx_length_errors++;
1480
1481 if (status & FRM_ST_PHY_ERR)
1482 self->stats.rx_frame_errors++;
1483
1484 if (status & FRM_ST_BAD_CRC)
1485 self->stats.rx_crc_errors++;
1486 }
1487 /* The errors below can be reported in both cases */
1488 if (status & FRM_ST_OVR1)
1489 self->stats.rx_fifo_errors++;
1490
1491 if (status & FRM_ST_OVR2)
1492 self->stats.rx_fifo_errors++;
1493 } else {
1494 /*
1495 * First we must make sure that the frame we
1496 * want to deliver is all in main memory. If we
1497 * cannot tell, then we check if the Rx FIFO is
1498 * empty. If not then we will have to take a nap
1499 * and try again later.
1500 */
1501 if (st_fifo->pending_bytes < self->io.fifo_size) {
1502 switch_bank(iobase, BANK0);
1503 if (inb(iobase+LSR) & LSR_RXDA) {
1504 /* Put this entry back in fifo */
1505 st_fifo->head--;
1506 st_fifo->len++;
1507 st_fifo->pending_bytes += len;
1508 st_fifo->entries[st_fifo->head].status = status;
1509 st_fifo->entries[st_fifo->head].len = len;
1510 /*
1511 * DMA not finished yet, so try again
1512 * later, set timer value, resolution
1513 * 125 us
1514 */
1515 switch_bank(iobase, BANK4);
1516 outb(0x02, iobase+TMRL); /* x 125 us */
1517 outb(0x00, iobase+TMRH);
1518
1519 /* Start timer */
1520 outb(IRCR1_TMR_EN, iobase+IRCR1);
1521
1522 /* Restore bank register */
1523 outb(bank, iobase+BSR);
1524
1525 return FALSE; /* I'll be back! */
1526 }
1527 }
1528
1529 /*
1530 * Remember the time we received this frame, so we can
1531 * reduce the min turn time a bit since we will know
1532 * how much time we have used for protocol processing
1533 */
1534 get_fast_time(&self->stamp);
1535
1536 skb = dev_alloc_skb(len+1);
1537 if (skb == NULL) {
1538 WARNING(__FUNCTION__ "(), memory squeeze, "
1539 "dropping frame.\n");
1540 self->stats.rx_dropped++;
1541
1542 /* Restore bank register */
1543 outb(bank, iobase+BSR);
1544
1545 return FALSE;
1546 }
1547
1548 /* Make sure IP header gets aligned */
1549 skb_reserve(skb, 1);
1550
1551 /* Copy frame without CRC */
1552 if (self->io.speed < 4000000) {
1553 skb_put(skb, len-2);
1554 memcpy(skb->data, self->rx_buff.data, len-2);
1555 } else {
1556 skb_put(skb, len-4);
1557 memcpy(skb->data, self->rx_buff.data, len-4);
1558 }
1559
1560 /* Move to next frame */
1561 self->rx_buff.data += len;
1562 self->stats.rx_bytes += len;
1563 self->stats.rx_packets++;
1564
1565 skb->dev = self->netdev;
1566 skb->mac.raw = skb->data;
1567 skb->protocol = htons(ETH_P_IRDA);
1568 netif_rx(skb);
1569 }
1570 }
1571 /* Restore bank register */
1572 outb(bank, iobase+BSR);
1573
1574 return TRUE;
1575 }
1576
1577 /*
1578 * Function nsc_ircc_pio_receive (self)
1579 *
1580 * Receive all data in receiver FIFO
1581 *
1582 */
1583 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1584 {
1585 __u8 byte;
1586 int iobase;
1587
1588 iobase = self->io.fir_base;
1589
1590 /* Receive all characters in Rx FIFO */
1591 do {
1592 byte = inb(iobase+RXD);
1593 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1594 byte);
1595 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1596 }
1597
1598 /*
1599 * Function nsc_ircc_sir_interrupt (self, eir)
1600 *
1601 * Handle SIR interrupt
1602 *
1603 */
1604 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1605 {
1606 int actual;
1607
1608 /* Check if transmit FIFO is low on data */
1609 if (eir & EIR_TXLDL_EV) {
1610 /* Write data left in transmit buffer */
1611 actual = nsc_ircc_pio_write(self->io.fir_base,
1612 self->tx_buff.data,
1613 self->tx_buff.len,
1614 self->io.fifo_size);
1615 self->tx_buff.data += actual;
1616 self->tx_buff.len -= actual;
1617
1618 self->io.direction = IO_XMIT;
1619
1620 /* Check if finished */
1621 if (self->tx_buff.len > 0)
1622 self->ier = IER_TXLDL_IE;
1623 else {
1624
1625 self->stats.tx_packets++;
1626 netif_wake_queue(self->netdev);
1627 self->ier = IER_TXEMP_IE;
1628 }
1629
1630 }
1631 /* Check if transmission has completed */
1632 if (eir & EIR_TXEMP_EV) {
1633 /* Check if we need to change the speed? */
1634 if (self->new_speed) {
1635 IRDA_DEBUG(2, __FUNCTION__ "(), Changing speed!\n");
1636 nsc_ircc_change_speed(self, self->new_speed);
1637 self->new_speed = 0;
1638
1639 /* Check if we are going to FIR */
1640 if (self->io.speed > 115200) {
1641 /* Should wait for status FIFO interrupt */
1642 self->ier = IER_SFIF_IE;
1643
1644 /* No need to do anymore SIR stuff */
1645 return;
1646 }
1647 }
1648 /* Turn around and get ready to receive some data */
1649 self->io.direction = IO_RECV;
1650 self->ier = IER_RXHDL_IE;
1651 }
1652
1653 /* Rx FIFO threshold or timeout */
1654 if (eir & EIR_RXHDL_EV) {
1655 nsc_ircc_pio_receive(self);
1656
1657 /* Keep receiving */
1658 self->ier = IER_RXHDL_IE;
1659 }
1660 }
1661
1662 /*
1663 * Function nsc_ircc_fir_interrupt (self, eir)
1664 *
1665 * Handle MIR/FIR interrupt
1666 *
1667 */
1668 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1669 int eir)
1670 {
1671 __u8 bank;
1672
1673 bank = inb(iobase+BSR);
1674
1675 /* Status FIFO event*/
1676 if (eir & EIR_SFIF_EV) {
1677 /* Check if DMA has finished */
1678 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1679 /* Wait for next status FIFO interrupt */
1680 self->ier = IER_SFIF_IE;
1681 } else {
1682 self->ier = IER_SFIF_IE | IER_TMR_IE;
1683 }
1684 } else if (eir & EIR_TMR_EV) { /* Timer finished */
1685 /* Disable timer */
1686 switch_bank(iobase, BANK4);
1687 outb(0, iobase+IRCR1);
1688
1689 /* Clear timer event */
1690 switch_bank(iobase, BANK0);
1691 outb(ASCR_CTE, iobase+ASCR);
1692
1693 /* Check if this is a Tx timer interrupt */
1694 if (self->io.direction == IO_XMIT) {
1695 nsc_ircc_dma_xmit(self, iobase);
1696
1697 /* Interrupt on DMA */
1698 self->ier = IER_DMA_IE;
1699 } else {
1700 /* Check (again) if DMA has finished */
1701 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1702 self->ier = IER_SFIF_IE;
1703 } else {
1704 self->ier = IER_SFIF_IE | IER_TMR_IE;
1705 }
1706 }
1707 } else if (eir & EIR_DMA_EV) {
1708 /* Finished with all transmissions? */
1709 if (nsc_ircc_dma_xmit_complete(self)) {
1710 /* Check if there are more frames to be transmitted */
1711 if (irda_device_txqueue_empty(self->netdev)) {
1712 /* Prepare for receive */
1713 nsc_ircc_dma_receive(self);
1714
1715 self->ier = IER_SFIF_IE;
1716 }
1717 } else {
1718 /* Not finished yet, so interrupt on DMA again */
1719 self->ier = IER_DMA_IE;
1720 }
1721 }
1722 outb(bank, iobase+BSR);
1723 }
1724
1725 /*
1726 * Function nsc_ircc_interrupt (irq, dev_id, regs)
1727 *
1728 * An interrupt from the chip has arrived. Time to do some work
1729 *
1730 */
1731 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1732 {
1733 struct net_device *dev = (struct net_device *) dev_id;
1734 struct nsc_ircc_cb *self;
1735 __u8 bsr, eir;
1736 int iobase;
1737
1738 if (!dev) {
1739 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1740 return;
1741 }
1742 self = (struct nsc_ircc_cb *) dev->priv;
1743
1744 spin_lock(&self->lock);
1745
1746 iobase = self->io.fir_base;
1747
1748 bsr = inb(iobase+BSR); /* Save current bank */
1749
1750 switch_bank(iobase, BANK0);
1751 self->ier = inb(iobase+IER);
1752 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1753
1754 outb(0, iobase+IER); /* Disable interrupts */
1755
1756 if (eir) {
1757 /* Dispatch interrupt handler for the current speed */
1758 if (self->io.speed > 115200)
1759 nsc_ircc_fir_interrupt(self, iobase, eir);
1760 else
1761 nsc_ircc_sir_interrupt(self, eir);
1762 }
1763
1764 outb(self->ier, iobase+IER); /* Restore interrupts */
1765 outb(bsr, iobase+BSR); /* Restore bank register */
1766
1767 spin_unlock(&self->lock);
1768 }
1769
1770 /*
1771 * Function nsc_ircc_is_receiving (self)
1772 *
1773 * Return TRUE is we are currently receiving a frame
1774 *
1775 */
1776 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1777 {
1778 unsigned long flags;
1779 int status = FALSE;
1780 int iobase;
1781 __u8 bank;
1782
1783 ASSERT(self != NULL, return FALSE;);
1784
1785 spin_lock_irqsave(&self->lock, flags);
1786
1787 if (self->io.speed > 115200) {
1788 iobase = self->io.fir_base;
1789
1790 /* Check if rx FIFO is not empty */
1791 bank = inb(iobase+BSR);
1792 switch_bank(iobase, BANK2);
1793 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1794 /* We are receiving something */
1795 status = TRUE;
1796 }
1797 outb(bank, iobase+BSR);
1798 } else
1799 status = (self->rx_buff.state != OUTSIDE_FRAME);
1800
1801 spin_unlock_irqrestore(&self->lock, flags);
1802
1803 return status;
1804 }
1805
1806 /*
1807 * Function nsc_ircc_net_init (dev)
1808 *
1809 * Initialize network device
1810 *
1811 */
1812 static int nsc_ircc_net_init(struct net_device *dev)
1813 {
1814 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1815
1816 /* Setup to be a normal IrDA network device driver */
1817 irda_device_setup(dev);
1818
1819 /* Insert overrides below this line! */
1820
1821 return 0;
1822 }
1823
1824 /*
1825 * Function nsc_ircc_net_open (dev)
1826 *
1827 * Start the device
1828 *
1829 */
1830 static int nsc_ircc_net_open(struct net_device *dev)
1831 {
1832 struct nsc_ircc_cb *self;
1833 int iobase;
1834 __u8 bank;
1835
1836 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1837
1838 ASSERT(dev != NULL, return -1;);
1839 self = (struct nsc_ircc_cb *) dev->priv;
1840
1841 ASSERT(self != NULL, return 0;);
1842
1843 iobase = self->io.fir_base;
1844
1845 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
1846 WARNING("%s, unable to allocate irq=%d\n", driver_name,
1847 self->io.irq);
1848 return -EAGAIN;
1849 }
1850 /*
1851 * Always allocate the DMA channel after the IRQ, and clean up on
1852 * failure.
1853 */
1854 if (request_dma(self->io.dma, dev->name)) {
1855 WARNING("%s, unable to allocate dma=%d\n", driver_name,
1856 self->io.dma);
1857 free_irq(self->io.irq, self);
1858 return -EAGAIN;
1859 }
1860
1861 /* Save current bank */
1862 bank = inb(iobase+BSR);
1863
1864 /* turn on interrupts */
1865 switch_bank(iobase, BANK0);
1866 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
1867
1868 /* Restore bank register */
1869 outb(bank, iobase+BSR);
1870
1871 /* Ready to play! */
1872
1873 netif_start_queue(dev);
1874
1875 /*
1876 * Open new IrLAP layer instance, now that everything should be
1877 * initialized properly
1878 */
1879 self->irlap = irlap_open(dev, &self->qos);
1880
1881 MOD_INC_USE_COUNT;
1882
1883 return 0;
1884 }
1885
1886 /*
1887 * Function nsc_ircc_net_close (dev)
1888 *
1889 * Stop the device
1890 *
1891 */
1892 static int nsc_ircc_net_close(struct net_device *dev)
1893 {
1894 struct nsc_ircc_cb *self;
1895 int iobase;
1896 __u8 bank;
1897
1898 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1899
1900 ASSERT(dev != NULL, return -1;);
1901
1902 self = (struct nsc_ircc_cb *) dev->priv;
1903 ASSERT(self != NULL, return 0;);
1904
1905 /* Stop device */
1906 netif_stop_queue(dev);
1907
1908 /* Stop and remove instance of IrLAP */
1909 if (self->irlap)
1910 irlap_close(self->irlap);
1911 self->irlap = NULL;
1912
1913 iobase = self->io.fir_base;
1914
1915 disable_dma(self->io.dma);
1916
1917 /* Save current bank */
1918 bank = inb(iobase+BSR);
1919
1920 /* Disable interrupts */
1921 switch_bank(iobase, BANK0);
1922 outb(0, iobase+IER);
1923
1924 free_irq(self->io.irq, dev);
1925 free_dma(self->io.dma);
1926
1927 /* Restore bank register */
1928 outb(bank, iobase+BSR);
1929
1930 MOD_DEC_USE_COUNT;
1931
1932 return 0;
1933 }
1934
1935 /*
1936 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
1937 *
1938 * Process IOCTL commands for this device
1939 *
1940 */
1941 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1942 {
1943 struct if_irda_req *irq = (struct if_irda_req *) rq;
1944 struct nsc_ircc_cb *self;
1945 unsigned long flags;
1946 int ret = 0;
1947
1948 ASSERT(dev != NULL, return -1;);
1949
1950 self = dev->priv;
1951
1952 ASSERT(self != NULL, return -1;);
1953
1954 IRDA_DEBUG(2, __FUNCTION__ "(), %s, (cmd=0x%X)\n", dev->name, cmd);
1955
1956 /* Disable interrupts & save flags */
1957 save_flags(flags);
1958 cli();
1959
1960 switch (cmd) {
1961 case SIOCSBANDWIDTH: /* Set bandwidth */
1962 if (!capable(CAP_NET_ADMIN))
1963 return -EPERM;
1964 nsc_ircc_change_speed(self, irq->ifr_baudrate);
1965 break;
1966 case SIOCSMEDIABUSY: /* Set media busy */
1967 if (!capable(CAP_NET_ADMIN))
1968 return -EPERM;
1969 irda_device_set_media_busy(self->netdev, TRUE);
1970 break;
1971 case SIOCGRECEIVING: /* Check if we are receiving right now */
1972 irq->ifr_receiving = nsc_ircc_is_receiving(self);
1973 break;
1974 default:
1975 ret = -EOPNOTSUPP;
1976 }
1977
1978 restore_flags(flags);
1979
1980 return ret;
1981 }
1982
1983 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
1984 {
1985 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
1986
1987 return &self->stats;
1988 }
1989
1990 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
1991 {
1992 MESSAGE("%s, Suspending\n", driver_name);
1993
1994 if (self->io.suspended)
1995 return;
1996
1997 nsc_ircc_net_close(self->netdev);
1998
1999 self->io.suspended = 1;
2000 }
2001
2002 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2003 {
2004 int iobase;
2005
2006 if (!self->io.suspended)
2007 return;
2008
2009 iobase = self->io.fir_base;
2010
2011 /* Switch to advanced mode */
2012 switch_bank(iobase, BANK2);
2013 outb(ECR1_EXT_SL, iobase+ECR1);
2014 switch_bank(iobase, BANK0);
2015
2016 nsc_ircc_net_open(self->netdev);
2017
2018 MESSAGE("%s, Waking up\n", driver_name);
2019
2020 self->io.suspended = 0;
2021 }
2022
2023 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2024 {
2025 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2026 if (self) {
2027 switch (rqst) {
2028 case PM_SUSPEND:
2029 nsc_ircc_suspend(self);
2030 break;
2031 case PM_RESUME:
2032 nsc_ircc_wakeup(self);
2033 break;
2034 }
2035 }
2036 return 0;
2037 }
2038
2039 #ifdef MODULE
2040 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2041 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2042
2043 MODULE_PARM(qos_mtt_bits, "i");
2044 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2045 MODULE_PARM(io, "1-4i");
2046 MODULE_PARM_DESC(io, "Base I/O addresses");
2047 MODULE_PARM(irq, "1-4i");
2048 MODULE_PARM_DESC(irq, "IRQ lines");
2049 MODULE_PARM(dma, "1-4i");
2050 MODULE_PARM_DESC(dma, "DMA channels");
2051 MODULE_PARM(dongle_id, "i");
2052 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2053
2054 int init_module(void)
2055 {
2056 return nsc_ircc_init();
2057 }
2058
2059 void cleanup_module(void)
2060 {
2061 nsc_ircc_cleanup();
2062 }
2063 #endif /* MODULE */
2064
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