arch/i386/kernel/pci-irq.c

   1 /*
   2  *      Low-Level PCI Support for PC -- Routing of Interrupts
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@suse.cz>
   5  */
   6
   7 #include <linux/config.h>
   8 #include <linux/types.h>
   9 #include <linux/kernel.h>
  10 #include <linux/pci.h>
  11 #include <linux/init.h>
  12 #include <linux/malloc.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/irq.h>
  15
  16 #include <asm/io.h>
  17 #include <asm/smp.h>
  18 #include <asm/io_apic.h>
  19
  20 #include "pci-i386.h"
  21
  22 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  23 #define PIRQ_VERSION 0x0100
  24
  25 static struct irq_routing_table *pirq_table;
  26
  27 /*
  28  * Never use: 0, 1, 2 (timer, keyboard, and cascade)
  29  * Avoid using: 13, 14 and 15 (FP error and IDE).
  30  * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
  31  */
  32 unsigned int pcibios_irq_mask = 0xfff8;
  33
  34 static int pirq_penalty[16] = {
  35         1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
  36         0, 0, 0, 0, 1000, 100000, 100000, 100000
  37 };
  38
  39 struct irq_router {
  40         char *name;
  41         u16 vendor, device;
  42         int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
  43         int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
  44 };
  45
  46 /*
  47  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
  48  */
  49
  50 static struct irq_routing_table * __init pirq_find_routing_table(void)
  51 {
  52         u8 *addr;
  53         struct irq_routing_table *rt;
  54         int i;
  55         u8 sum;
  56
  57         for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
  58                 rt = (struct irq_routing_table *) addr;
  59                 if (rt->signature != PIRQ_SIGNATURE ||
  60                     rt->version != PIRQ_VERSION ||
  61                     rt->size % 16 ||
  62                     rt->size < sizeof(struct irq_routing_table))
  63                         continue;
  64                 sum = 0;
  65                 for(i=0; i<rt->size; i++)
  66                         sum += addr[i];
  67                 if (!sum) {
  68                         DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
  69                         return rt;
  70                 }
  71         }
  72         return NULL;
  73 }
  74
  75 /*
  76  *  If we have a IRQ routing table, use it to search for peer host
  77  *  bridges.  It's a gross hack, but since there are no other known
  78  *  ways how to get a list of buses, we have to go this way.
  79  */
  80
  81 static void __init pirq_peer_trick(void)
  82 {
  83         struct irq_routing_table *rt = pirq_table;
  84         u8 busmap[256];
  85         int i;
  86         struct irq_info *e;
  87
  88         memset(busmap, 0, sizeof(busmap));
  89         for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
  90                 e = &rt->slots[i];
  91 #ifdef DEBUG
  92                 {
  93                         int j;
  94                         DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
  95                         for(j=0; j<4; j++)
  96                                 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
  97                         DBG("\n");
  98                 }
  99 #endif
 100                 busmap[e->bus] = 1;
 101         }
 102         for(i=1; i<256; i++)
 103                 /*
 104                  *  It might be a secondary bus, but in this case its parent is already
 105                  *  known (ascending bus order) and therefore pci_scan_bus returns immediately.
 106                  */
 107                 if (busmap[i] && pci_scan_bus(i, pci_root_bus->ops, NULL))
 108                         printk("PCI: Discovered primary peer bus %02x [IRQ]\n", i);
 109         pcibios_last_bus = -1;
 110 }
 111
 112 /*
 113  *  Code for querying and setting of IRQ routes on various interrupt routers.
 114  */
 115
 116 static void eisa_set_level_irq(unsigned int irq)
 117 {
 118         unsigned char mask = 1 << (irq & 7);
 119         unsigned int port = 0x4d0 + (irq >> 3);
 120         unsigned char val = inb(port);
 121
 122         if (!(val & mask)) {
 123                 DBG(" -> edge");
 124                 outb(val | mask, port);
 125         }
 126 }
 127
 128 /*
 129  * Common IRQ routing practice: nybbles in config space,
 130  * offset by some magic constant.
 131  */
 132 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
 133 {
 134         u8 x;
 135         unsigned reg = offset + (nr >> 1);
 136
 137         pci_read_config_byte(router, reg, &x);
 138         return (nr & 1) ? (x >> 4) : (x & 0xf);
 139 }
 140
 141 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
 142 {
 143         u8 x;
 144         unsigned reg = offset + (nr >> 1);
 145
 146         pci_read_config_byte(router, reg, &x);
 147         x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
 148         pci_write_config_byte(router, reg, x);
 149 }
 150
 151 /*
 152  * ALI pirq entries are damn ugly, and completely undocumented.
 153  * This has been figured out from pirq tables, and it's not a pretty
 154  * picture.
 155  */
 156 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 157 {
 158         static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
 159
 160         switch (pirq) {
 161         case 0x00:
 162                 return 0;
 163         default:
 164                 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
 165         case 0xfe:
 166                 return irqmap[read_config_nybble(router, 0x44, 0)];
 167         case 0xff:
 168                 return irqmap[read_config_nybble(router, 0x75, 0)];
 169         }
 170 }
 171
 172 static void pirq_ali_ide_interrupt(struct pci_dev *router, unsigned reg, unsigned val, unsigned irq)
 173 {
 174         u8 x;
 175
 176         pci_read_config_byte(router, reg, &x);
 177         x = (x & 0xe0) | val;   /* clear the level->edge transform */
 178         pci_write_config_byte(router, reg, x);
 179 }
 180
 181 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 182 {
 183         static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
 184         unsigned int val = irqmap[irq];
 185
 186         if (val) {
 187                 switch (pirq) {
 188                 default:
 189                         write_config_nybble(router, 0x48, pirq-1, val);
 190                         break;
 191                 case 0xfe:
 192                         pirq_ali_ide_interrupt(router, 0x44, val, irq);
 193                         break;
 194                 case 0xff:
 195                         pirq_ali_ide_interrupt(router, 0x75, val, irq);
 196                         break;
 197                 }
 198                 return 1;
 199         }
 200         return 0;
 201 }
 202
 203 /*
 204  * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
 205  * just a pointer to the config space. However, something
 206  * funny is going on with 0xfe/0xff, and apparently they
 207  * should handle IDE irq routing. Ignore them for now.
 208  */
 209 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 210 {
 211         u8 x;
 212
 213         switch (pirq) {
 214         case 0xfe:
 215         case 0xff:
 216                 return 0;
 217         default:
 218                 pci_read_config_byte(router, pirq, &x);
 219                 return (x < 16) ? x : 0;
 220         }
 221 }
 222
 223 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 224 {
 225         switch (pirq) {
 226         case 0xfe:
 227         case 0xff:
 228                 return 0;
 229         default:
 230                 pci_write_config_byte(router, pirq, irq);
 231                 return 1;
 232         }
 233 }
 234
 235 /*
 236  * The VIA pirq rules are nibble-based, like ALI,
 237  * but without the ugly irq number munging or the
 238  * strange special cases..
 239  */
 240 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 241 {
 242         return read_config_nybble(router, 0x55, pirq);
 243 }
 244
 245 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 246 {
 247         write_config_nybble(router, 0x55, pirq, irq);
 248         return 1;
 249 }
 250
 251 /*
 252  * OPTI: high four bits are nibble pointer..
 253  * I wonder what the low bits do?
 254  */
 255 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 256 {
 257         return read_config_nybble(router, 0xb8, pirq >> 4);
 258 }
 259
 260 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 261 {
 262         write_config_nybble(router, 0xb8, pirq >> 4, irq);
 263         return 1;
 264 }
 265
 266 /*
 267  * Cyrix: nibble offset 0x5C
 268  */
 269 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 270 {
 271         return read_config_nybble(router, 0x5C, pirq-1);
 272 }
 273
 274 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 275 {
 276         write_config_nybble(router, 0x5C, pirq-1, irq);
 277         return 1;
 278 }
 279
 280 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 281 {
 282         u8 x;
 283         int reg = 0x41 + (pirq - 'A') ;
 284
 285         pci_read_config_byte(router, reg, &x);
 286         return (x & 0x80) ? 0 : (x & 0x0f);
 287 }
 288
 289 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 290 {
 291         u8 x;
 292         int reg = 0x41 + (pirq - 'A') ;
 293
 294         pci_read_config_byte(router, reg, &x);
 295         x = (pirq & 0x20) ? 0 : (irq & 0x0f);
 296         pci_write_config_byte(router, reg, x);
 297
 298         return 1;
 299 }
 300
 301 #ifdef CONFIG_PCI_BIOS
 302
 303 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 304 {
 305         struct pci_dev *bridge;
 306         int pin = pci_get_interrupt_pin(dev, &bridge);
 307         return pcibios_set_irq_routing(bridge, pin, irq);
 308 }
 309
 310 static struct irq_router pirq_bios_router =
 311         { "BIOS", 0, 0, NULL, pirq_bios_set };
 312
 313 #endif
 314
 315 static struct irq_router pirq_routers[] = {
 316         { "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_0, pirq_piix_get, pirq_piix_set },
 317         { "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, pirq_piix_get, pirq_piix_set },
 318         { "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, pirq_piix_get, pirq_piix_set },
 319         { "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371MX,   pirq_piix_get, pirq_piix_set },
 320         { "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_0, pirq_piix_get, pirq_piix_set },
 321
 322         { "ALI", PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pirq_ali_get, pirq_ali_set },
 323
 324         { "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, pirq_via_get, pirq_via_set },
 325         { "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596, pirq_via_get, pirq_via_set },
 326         { "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, pirq_via_get, pirq_via_set },
 327
 328         { "OPTI", PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C700, pirq_opti_get, pirq_opti_set },
 329
 330         { "NatSemi", PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, pirq_cyrix_get, pirq_cyrix_set },
 331         { "SIS", PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, pirq_sis_get, pirq_sis_set },
 332         { "default", 0, 0, NULL, NULL }
 333 };
 334
 335 static struct irq_router *pirq_router;
 336 static struct pci_dev *pirq_router_dev;
 337
 338 static void __init pirq_find_router(void)
 339 {
 340         struct irq_routing_table *rt = pirq_table;
 341         struct irq_router *r;
 342
 343 #ifdef CONFIG_PCI_BIOS
 344         if (!rt->signature) {
 345                 printk("PCI: Using BIOS for IRQ routing\n");
 346                 pirq_router = &pirq_bios_router;
 347                 return;
 348         }
 349 #endif
 350         /* fall back to default router if nothing else found */
 351         pirq_router = pirq_routers + sizeof(pirq_routers) / sizeof(pirq_routers[0]) - 1;
 352
 353         pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
 354         if (!pirq_router_dev) {
 355                 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
 356                 return;
 357         }
 358
 359         for(r=pirq_routers; r->vendor; r++) {
 360                 /* Exact match against router table entry? Use it! */
 361                 if (r->vendor == rt->rtr_vendor && r->device == rt->rtr_device) {
 362                         pirq_router = r;
 363                         break;
 364                 }
 365                 /* Match against router device entry? Use it as a fallback */
 366                 if (r->vendor == pirq_router_dev->vendor && r->device == pirq_router_dev->device) {
 367                         pirq_router = r;
 368                 }
 369         }
 370         printk("PCI: Using IRQ router %s [%04x/%04x] at %s\n",
 371                 pirq_router->name,
 372                 pirq_router_dev->vendor,
 373                 pirq_router_dev->device,
 374                 pirq_router_dev->slot_name);
 375 }
 376
 377 static struct irq_info *pirq_get_info(struct pci_dev *dev, int pin)
 378 {
 379         struct irq_routing_table *rt = pirq_table;
 380         int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 381         struct irq_info *info;
 382
 383         for (info = rt->slots; entries--; info++)
 384                 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
 385                         return info;
 386         return NULL;
 387 }
 388
 389 static void pcibios_test_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 390 {
 391 }
 392
 393 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
 394 {
 395         struct irq_info *info;
 396         int i, pirq, pin, newirq;
 397         int irq = 0;
 398         u32 mask;
 399         struct irq_router *r = pirq_router;
 400         struct pci_dev *dev2, *d;
 401         char *msg = NULL;
 402
 403         if (!pirq_table)
 404                 return 0;
 405
 406         /* Find IRQ routing entry */
 407         pin = pci_get_interrupt_pin(dev, &d);
 408         if (pin < 0) {
 409                 DBG(" -> no interrupt pin\n");
 410                 return 0;
 411         }
 412         DBG("IRQ for %s(%d) via %s", dev->slot_name, pin, d->slot_name);
 413         info = pirq_get_info(d, pin);
 414         if (!info) {
 415                 DBG(" -> not found in routing table\n");
 416                 return 0;
 417         }
 418         pirq = info->irq[pin].link;
 419         mask = info->irq[pin].bitmap;
 420         if (!pirq) {
 421                 DBG(" -> not routed\n");
 422                 return 0;
 423         }
 424         DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
 425         mask &= pcibios_irq_mask;
 426
 427         /* Find the best IRQ to assign */
 428         newirq = 0;
 429         if (assign) {
 430                 for (i = 0; i < 16; i++) {
 431                         if (!(mask & (1 << i)))
 432                                 continue;
 433                         if (pirq_penalty[i] < pirq_penalty[newirq] &&
 434                             !request_irq(i, pcibios_test_irq_handler, SA_SHIRQ, "pci-test", dev)) {
 435                                 free_irq(i, dev);
 436                                 newirq = i;
 437                         }
 438                 }
 439                 DBG(" -> newirq=%d", newirq);
 440         }
 441
 442         /* Try to get current IRQ */
 443         if (r->get && (irq = r->get(pirq_router_dev, d, pirq))) {
 444                 DBG(" -> got IRQ %d\n", irq);
 445                 msg = "Found";
 446         } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
 447                 DBG(" -> assigning IRQ %d", newirq);
 448                 if (r->set(pirq_router_dev, d, pirq, newirq)) {
 449                         eisa_set_level_irq(newirq);
 450                         DBG(" ... OK\n");
 451                         msg = "Assigned";
 452                         irq = newirq;
 453                 }
 454         }
 455
 456         if (!irq) {
 457                 DBG(" ... failed\n");
 458                 if (newirq && mask == (1 << newirq)) {
 459                         msg = "Guessed";
 460                         irq = newirq;
 461                 } else
 462                         return 0;
 463         }
 464         printk("PCI: %s IRQ %d for device %s\n", msg, irq, dev->slot_name);
 465
 466         /* Update IRQ for all devices with the same pirq value */
 467         pci_for_each_dev(dev2) {
 468                 if ((pin = pci_get_interrupt_pin(dev2, &d)) >= 0 &&
 469                     (info = pirq_get_info(d, pin)) &&
 470                     info->irq[pin].link == pirq) {
 471                         dev2->irq = irq;
 472                         pirq_penalty[irq]++;
 473                         if (dev != dev2)
 474                                 printk("PCI: The same IRQ used for device %s\n", dev2->slot_name);
 475                 }
 476         }
 477         return 1;
 478 }
 479
 480 void __init pcibios_irq_init(void)
 481 {
 482         DBG("PCI: IRQ init\n");
 483         pirq_table = pirq_find_routing_table();
 484 #ifdef CONFIG_PCI_BIOS
 485         if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
 486                 pirq_table = pcibios_get_irq_routing_table();
 487 #endif
 488         if (pirq_table) {
 489                 pirq_peer_trick();
 490                 pirq_find_router();
 491                 if (pirq_table->exclusive_irqs) {
 492                         int i;
 493                         for (i=0; i<16; i++)
 494                                 if (!(pirq_table->exclusive_irqs & (1 << i)))
 495                                         pirq_penalty[i] += 100;
 496                 }
 497                 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
 498                 if (io_apic_assign_pci_irqs)
 499                         pirq_table = NULL;
 500         }
 501 }
 502
 503 void __init pcibios_fixup_irqs(void)
 504 {
 505         struct pci_dev *dev;
 506         u8 pin;
 507
 508         DBG("PCI: IRQ fixup\n");
 509         pci_for_each_dev(dev) {
 510                 /*
 511                  * If the BIOS has set an out of range IRQ number, just ignore it.
 512                  * Also keep track of which IRQ's are already in use.
 513                  */
 514                 if (dev->irq >= 16) {
 515                         DBG("%s: ignoring bogus IRQ %d\n", dev->slot_name, dev->irq);
 516                         dev->irq = 0;
 517                 }
 518                 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
 519                 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
 520                         pirq_penalty[dev->irq] = 0;
 521                 pirq_penalty[dev->irq]++;
 522         }
 523
 524         pci_for_each_dev(dev) {
 525                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 526 #ifdef CONFIG_X86_IO_APIC
 527                 /*
 528                  * Recalculate IRQ numbers if we use the I/O APIC.
 529                  */
 530                 if (io_apic_assign_pci_irqs)
 531                 {
 532                         int irq;
 533
 534                         if (pin) {
 535                                 pin--;          /* interrupt pins are numbered starting from 1 */
 536                                 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
 537 /*
 538  * Will be removed completely if things work out well with fuzzy parsing
 539  */
 540 #if 0
 541                                 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
 542                                         struct pci_dev * bridge = dev->bus->self;
 543
 544                                         pin = (pin + PCI_SLOT(dev->devfn)) % 4;
 545                                         irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
 546                                                         PCI_SLOT(bridge->devfn), pin);
 547                                         if (irq >= 0)
 548                                                 printk(KERN_WARNING "PCI: using PPB(B%d,I%d,P%d) to get irq %d\n",
 549                                                         bridge->bus->number, PCI_SLOT(bridge->devfn), pin, irq);
 550                                 }
 551 #endif
 552                                 if (irq >= 0) {
 553                                         printk("PCI->APIC IRQ transform: (B%d,I%d,P%d) -> %d\n",
 554                                                 dev->bus->number, PCI_SLOT(dev->devfn), pin, irq);
 555                                         dev->irq = irq;
 556                                 }
 557                         }
 558                 }
 559 #endif
 560                 /*
 561                  * Still no IRQ? Try to lookup one...
 562                  */
 563                 if (pin && !dev->irq)
 564                         pcibios_lookup_irq(dev, 0);
 565         }
 566 }
 567
 568 void pcibios_penalize_isa_irq(int irq)
 569 {
 570         /*
 571          *  If any ISAPnP device reports an IRQ in its list of possible
 572          *  IRQ's, we try to avoid assigning it to PCI devices.
 573          */
 574         pirq_penalty[irq] += 100;
 575 }
 576
 577 void pcibios_enable_irq(struct pci_dev *dev)
 578 {
 579         if (!dev->irq) {
 580                 u8 pin;
 581                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 582                 if (pin && !pcibios_lookup_irq(dev, 1)) {
 583                         char *msg;
 584                         if (io_apic_assign_pci_irqs)
 585                                 msg = " Probably buggy MP table.";
 586                         else if (pci_probe & PCI_BIOS_IRQ_SCAN)
 587                                 msg = "";
 588                         else
 589                                 msg = " Please try using pci=biosirq.";
 590                         printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
 591                                'A' + pin - 1, dev->slot_name, msg);
 592                 }
 593         }
 594 }