include/asm-mips64/sn/sn0/ip27.h

   1 /* $Id$
   2  *
   3  * This file is subject to the terms and conditions of the GNU General Public
   4  * License.  See the file "COPYING" in the main directory of this archive
   5  * for more details.
   6  *
   7  * Derived from IRIX <sys/SN/SN0/IP27.h>.
   8  *
   9  * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
  10  * Copyright (C) 1999 by Ralf Baechle
  11  */
  12 #ifndef _ASM_SN_SN0_IP27_H
  13 #define _ASM_SN_SN0_IP27_H
  14
  15 #include <asm/mipsregs.h>
  16
  17 /*
  18  * Simple definitions for the masks which remove SW bits from pte.
  19  */
  20
  21 #define TLBLO_HWBITSHIFT        0               /* Shift value, for masking */
  22
  23 #if !_LANGUAGE_ASSEMBLY
  24
  25 #define CAUSE_BERRINTR          IE_IRQ5
  26
  27 #define ECCF_CACHE_ERR  0
  28 #define ECCF_TAGLO      1
  29 #define ECCF_ECC        2
  30 #define ECCF_ERROREPC   3
  31 #define ECCF_PADDR      4
  32 #define ECCF_SIZE       (5 * sizeof(long))
  33
  34 #endif /* !_LANGUAGE_ASSEMBLY */
  35
  36 #if _LANGUAGE_ASSEMBLY
  37
  38 /*
  39  * KL_GET_CPUNUM (similar to EV_GET_SPNUM for EVEREST platform) reads
  40  * the processor number of the calling processor.  The proc parameters
  41  * must be a register.
  42  */
  43 #define KL_GET_CPUNUM(proc)                             \
  44         dli     proc, LOCAL_HUB(0);                     \
  45         ld      proc, PI_CPU_NUM(proc)
  46
  47 #endif /* _LANGUAGE_ASSEMBLY */
  48
  49 /*
  50  * R10000 status register interrupt bit mask usage for IP27.
  51  */
  52 #define SRB_SWTIMO      IE_SW0          /* 0x0100 */
  53 #define SRB_NET         IE_SW1          /* 0x0200 */
  54 #define SRB_DEV0        IE_IRQ0         /* 0x0400 */
  55 #define SRB_DEV1        IE_IRQ1         /* 0x0800 */
  56 #define SRB_TIMOCLK     IE_IRQ2         /* 0x1000 */
  57 #define SRB_PROFCLK     IE_IRQ3         /* 0x2000 */
  58 #define SRB_ERR         IE_IRQ4         /* 0x4000 */
  59 #define SRB_SCHEDCLK    IE_IRQ5         /* 0x8000 */
  60
  61 #define SR_IBIT_HI      SRB_DEV0
  62 #define SR_IBIT_PROF    SRB_PROFCLK
  63
  64 #define SRB_SWTIMO_IDX          0
  65 #define SRB_NET_IDX             1
  66 #define SRB_DEV0_IDX            2
  67 #define SRB_DEV1_IDX            3
  68 #define SRB_TIMOCLK_IDX         4
  69 #define SRB_PROFCLK_IDX         5
  70 #define SRB_ERR_IDX             6
  71 #define SRB_SCHEDCLK_IDX        7
  72
  73 #define NUM_CAUSE_INTRS         8
  74
  75 #define SCACHE_LINESIZE 128
  76 #define SCACHE_LINEMASK (SCACHE_LINESIZE - 1)
  77
  78 #include <asm/sn/addrs.h>
  79
  80 #define LED_CYCLE_MASK  0x0f
  81 #define LED_CYCLE_SHFT  4
  82
  83 #define SEND_NMI(_nasid, _slice)        \
  84           REMOTE_HUB_S((_nasid),  (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
  85
  86 /* Sanity hazzard ...  Below all the Origin hacks are following.  */
  87
  88 #define CPU_RESCHED_A_IRQ       0
  89 #define CPU_RESCHED_B_IRQ       1
  90 #define CPU_CALL_A_IRQ          2
  91 #define CPU_CALL_B_IRQ          3
  92 #define BASE_PCI_IRQ            4
  93
  94 #define SN00_BRIDGE             0x9200000008000000
  95 #define SN00I_BRIDGE0           0x920000000b000000
  96 #define SN00I_BRIDGE1           0x920000000e000000
  97 #define SN00I_BRIDGE2           0x920000000f000000
  98 #endif /* _ASM_SN_SN0_IP27_H */