arch/mips64/kernel/setup.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1995 Linus Torvalds
   7  * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
   8  * Copyright (C) 1996 Stoned Elipot
   9  * Copyright (C) 1999 Silicon Graphics, Inc.
  10  */
  11 #include <linux/config.h>
  12 #include <linux/errno.h>
  13 #include <linux/init.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/mm.h>
  17 #include <linux/stddef.h>
  18 #include <linux/string.h>
  19 #include <linux/unistd.h>
  20 #include <linux/ptrace.h>
  21 #include <linux/malloc.h>
  22 #include <linux/user.h>
  23 #include <linux/utsname.h>
  24 #include <linux/a.out.h>
  25 #include <linux/tty.h>
  26 #ifdef CONFIG_BLK_DEV_RAM
  27 #include <linux/blk.h>
  28 #endif
  29
  30 #include <asm/asm.h>
  31 #include <asm/bootinfo.h>
  32 #include <asm/cachectl.h>
  33 #include <asm/cpu.h>
  34 #include <asm/io.h>
  35 #include <asm/stackframe.h>
  36 #include <asm/system.h>
  37 #include <asm/pgalloc.h>
  38
  39 #ifndef CONFIG_SMP
  40 struct cpuinfo_mips cpu_data[1];
  41 #endif
  42
  43 #ifdef CONFIG_VT
  44 struct screen_info screen_info;
  45 #endif
  46
  47 /*
  48  * Not all of the MIPS CPUs have the "wait" instruction available.  This
  49  * is set to true if it is available.  The wait instruction stops the
  50  * pipeline and reduces the power consumption of the CPU very much.
  51  */
  52 char wait_available;
  53
  54 /*
  55  * Do we have a cyclecounter available?
  56  */
  57 char cyclecounter_available;
  58
  59 /*
  60  * Set if box has EISA slots.
  61  */
  62 int EISA_bus = 0;
  63
  64 #ifdef CONFIG_BLK_DEV_FD
  65 extern struct fd_ops no_fd_ops;
  66 struct fd_ops *fd_ops;
  67 #endif
  68
  69 #ifdef CONFIG_BLK_DEV_IDE
  70 extern struct ide_ops no_ide_ops;
  71 struct ide_ops *ide_ops;
  72 #endif
  73
  74 extern struct rtc_ops no_rtc_ops;
  75 struct rtc_ops *rtc_ops;
  76
  77 extern struct kbd_ops no_kbd_ops;
  78 struct kbd_ops *kbd_ops;
  79
  80 /*
  81  * Setup information
  82  *
  83  * These are initialized so they are in the .data section
  84  */
  85 unsigned long mips_memory_upper = KSEG0;
  86 unsigned long mips_cputype = CPU_UNKNOWN;
  87 unsigned long mips_machtype = MACH_UNKNOWN;
  88 unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
  89
  90 unsigned char aux_device_present;
  91 extern int _end;
  92
  93 extern void load_mmu(void);
  94
  95 static char command_line[CL_SIZE] = { 0, };
  96        char saved_command_line[CL_SIZE];
  97 extern char arcs_cmdline[CL_SIZE];
  98
  99 /*
 100  * mips_io_port_base is the begin of the address space to which x86 style
 101  * I/O ports are mapped.
 102  */
 103 #ifdef CONFIG_SGI_IP27
 104 /* XXX Origin garbage has no business in this file  */
 105 unsigned long mips_io_port_base = IO_BASE;
 106 #endif
 107
 108 extern void ip22_setup(void);
 109 extern void ip27_setup(void);
 110
 111 static inline void cpu_probe(void)
 112 {
 113         unsigned int prid = read_32bit_cp0_register(CP0_PRID);
 114
 115         switch(prid & 0xff00) {
 116         case PRID_IMP_R4000:
 117                 if((prid & 0xff) == PRID_REV_R4400)
 118                         mips_cputype = CPU_R4400SC;
 119                 else
 120                         mips_cputype = CPU_R4000SC;
 121                 break;
 122         case PRID_IMP_R4600:
 123                 mips_cputype = CPU_R4600;
 124                 break;
 125         case PRID_IMP_R4700:
 126                 mips_cputype = CPU_R4700;
 127                 break;
 128         case PRID_IMP_R5000:
 129                 mips_cputype = CPU_R5000;
 130                 break;
 131         case PRID_IMP_NEVADA:
 132                 mips_cputype = CPU_NEVADA;
 133                 break;
 134         case PRID_IMP_R8000:
 135                 mips_cputype = CPU_R8000;
 136                 break;
 137         case PRID_IMP_R10000:
 138                 mips_cputype = CPU_R10000;
 139                 break;
 140         default:
 141                 mips_cputype = CPU_UNKNOWN;
 142         }
 143 }
 144
 145 void __init setup_arch(char **cmdline_p)
 146 {
 147 #ifdef CONFIG_BLK_DEV_INITRD
 148         unsigned long tmp;
 149         unsigned long *initrd_header;
 150 #endif
 151         int i;
 152         pmd_t *pmd = kpmdtbl;
 153         pte_t *pte = kptbl;
 154
 155         cpu_probe();
 156         load_mmu();
 157
 158 #ifdef CONFIG_SGI_IP22
 159         ip22_setup();
 160 #endif
 161 #ifdef CONFIG_SGI_IP27
 162         ip27_setup();
 163 #endif
 164
 165         strncpy (command_line, arcs_cmdline, CL_SIZE);
 166         memcpy(saved_command_line, command_line, CL_SIZE);
 167         saved_command_line[CL_SIZE-1] = '\0';
 168
 169         *cmdline_p = command_line;
 170
 171 #ifdef CONFIG_BLK_DEV_INITRD
 172 #error "Initrd is broken, please fit it."
 173         tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
 174         if (tmp < (unsigned long)&_end)
 175                 tmp += PAGE_SIZE;
 176         initrd_header = (unsigned long *)tmp;
 177         if (initrd_header[0] == 0x494E5244) {
 178                 initrd_start = (unsigned long)&initrd_header[2];
 179                 initrd_end = initrd_start + initrd_header[1];
 180                 initrd_below_start_ok = 1;
 181                 if (initrd_end > memory_end) {
 182                         printk("initrd extends beyond end of memory "
 183                                "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 184                                initrd_end,memory_end);
 185                         initrd_start = 0;
 186                 } else
 187                         *memory_start_p = initrd_end;
 188         }
 189 #endif
 190
 191         paging_init();
 192
 193         memset((void *)kptbl, 0, PAGE_SIZE << KPTBL_PAGE_ORDER);
 194         memset((void *)kpmdtbl, 0, PAGE_SIZE);
 195         pgd_set(swapper_pg_dir, kpmdtbl);
 196         for (i = 0; i < (1 << KPTBL_PAGE_ORDER); pmd++,i++,pte+=PTRS_PER_PTE)
 197                 pmd_val(*pmd) = (unsigned long)pte;
 198 }