include/asm-ppc/io.h

   1 #ifndef _PPC_IO_H
   2 #define _PPC_IO_H
   3
   4 #include <linux/config.h>
   5 #include <asm/page.h>
   6 #include <asm/byteorder.h>
   7
   8 #define SIO_CONFIG_RA   0x398
   9 #define SIO_CONFIG_RD   0x399
  10
  11 #define SLOW_DOWN_IO
  12
  13 #define PMAC_ISA_MEM_BASE       0
  14 #define PMAC_PCI_DRAM_OFFSET    0
  15 #define CHRP_ISA_IO_BASE        0xf8000000
  16 #define CHRP_ISA_MEM_BASE       0xf7000000
  17 #define CHRP_PCI_DRAM_OFFSET    0
  18 #define PREP_ISA_IO_BASE        0x80000000
  19 #define PREP_ISA_MEM_BASE       0xc0000000
  20 #define PREP_PCI_DRAM_OFFSET    0x80000000
  21
  22 #ifdef CONFIG_MBX
  23 #define _IO_BASE        0x80000000
  24 #define _ISA_MEM_BASE   0
  25 #define PCI_DRAM_OFFSET 0x80000000
  26 #else /* CONFIG_MBX8xx */
  27 #ifdef CONFIG_APUS
  28 #define _IO_BASE 0
  29 #define _ISA_MEM_BASE 0
  30 #define PCI_DRAM_OFFSET 0
  31 #else
  32 extern unsigned long isa_io_base;
  33 extern unsigned long isa_mem_base;
  34 extern unsigned long pci_dram_offset;
  35 #define _IO_BASE        isa_io_base
  36 #define _ISA_MEM_BASE   isa_mem_base
  37 #define PCI_DRAM_OFFSET pci_dram_offset
  38 #endif /* CONFIG_APUS */
  39 #endif /* CONFIG_MBX8xx */
  40
  41 #define readb(addr) in_8((volatile unsigned char *)(addr))
  42 #define writeb(b,addr) out_8((volatile unsigned char *)(addr), (b))
  43 #if defined(CONFIG_APUS)
  44 #define readw(addr) (*(volatile unsigned short *) (addr))
  45 #define readl(addr) (*(volatile unsigned int *) (addr))
  46 #define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b))
  47 #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
  48 #else
  49 #define readw(addr) in_le16((volatile unsigned short *)(addr))
  50 #define readl(addr) in_le32((volatile unsigned *)(addr))
  51 #define writew(b,addr) out_le16((volatile unsigned short *)(addr),(b))
  52 #define writel(b,addr) out_le32((volatile unsigned *)(addr),(b))
  53 #endif
  54
  55 #define insb(port, buf, ns)     _insb((unsigned char *)((port)+_IO_BASE), (buf), (ns))
  56 #define outsb(port, buf, ns)    _outsb((unsigned char *)((port)+_IO_BASE), (buf), (ns))
  57 #define insw(port, buf, ns)     _insw((unsigned short *)((port)+_IO_BASE), (buf), (ns))
  58 #define outsw(port, buf, ns)    _outsw((unsigned short *)((port)+_IO_BASE), (buf), (ns))
  59 #define insl(port, buf, nl)     _insl((unsigned long *)((port)+_IO_BASE), (buf), (nl))
  60 #define outsl(port, buf, nl)    _outsl((unsigned long *)((port)+_IO_BASE), (buf), (nl))
  61
  62 #define inb(port)               in_8((unsigned char *)((port)+_IO_BASE))
  63 #define outb(val, port)         out_8((unsigned char *)((port)+_IO_BASE), (val))
  64 #if defined(CONFIG_APUS)
  65 #define inw(port)               in_be16((unsigned short *)((port)+_IO_BASE))
  66 #define outw(val, port)         out_be16((unsigned short *)((port)+_IO_BASE), (val))
  67 #define inl(port)               in_be32((unsigned *)((port)+_IO_BASE))
  68 #define outl(val, port)         out_be32((unsigned *)((port)+_IO_BASE), (val))
  69 #else
  70 #define inw(port)               in_le16((unsigned short *)((port)+_IO_BASE))
  71 #define outw(val, port)         out_le16((unsigned short *)((port)+_IO_BASE), (val))
  72 #define inl(port)               in_le32((unsigned *)((port)+_IO_BASE))
  73 #define outl(val, port)         out_le32((unsigned *)((port)+_IO_BASE), (val))
  74 #endif
  75
  76 #define inb_p(port)             in_8((unsigned char *)((port)+_IO_BASE))
  77 #define outb_p(val, port)       out_8((unsigned char *)((port)+_IO_BASE), (val))
  78 #define inw_p(port)             in_le16((unsigned short *)((port)+_IO_BASE))
  79 #define outw_p(val, port)       out_le16((unsigned short *)((port)+_IO_BASE), (val))
  80 #define inl_p(port)             in_le32((unsigned *)((port)+_IO_BASE))
  81 #define outl_p(val, port)       out_le32((unsigned *)((port)+_IO_BASE), (val))
  82
  83 extern void _insb(volatile unsigned char *port, void *buf, int ns);
  84 extern void _outsb(volatile unsigned char *port, const void *buf, int ns);
  85 extern void _insw(volatile unsigned short *port, void *buf, int ns);
  86 extern void _outsw(volatile unsigned short *port, const void *buf, int ns);
  87 extern void _insl(volatile unsigned long *port, void *buf, int nl);
  88 extern void _outsl(volatile unsigned long *port, const void *buf, int nl);
  89
  90 /*
  91  * The *_ns versions below don't do byte-swapping.
  92  */
  93 #define insw_ns(port, buf, ns)  _insw_ns((unsigned short *)((port)+_IO_BASE), (buf), (ns))
  94 #define outsw_ns(port, buf, ns) _outsw_ns((unsigned short *)((port)+_IO_BASE), (buf), (ns))
  95 #define insl_ns(port, buf, nl)  _insl_ns((unsigned long *)((port)+_IO_BASE), (buf), (nl))
  96 #define outsl_ns(port, buf, nl) _outsl_ns((unsigned long *)((port)+_IO_BASE), (buf), (nl))
  97
  98 extern void _insw_ns(volatile unsigned short *port, void *buf, int ns);
  99 extern void _outsw_ns(volatile unsigned short *port, const void *buf, int ns);
 100 extern void _insl_ns(volatile unsigned long *port, void *buf, int nl);
 101 extern void _outsl_ns(volatile unsigned long *port, const void *buf, int nl);
 102
 103 #define memset_io(a,b,c)        memset((a),(b),(c))
 104 #define memcpy_fromio(a,b,c)    memcpy((a),(b),(c))
 105 #define memcpy_toio(a,b,c)      memcpy((a),(b),(c))
 106
 107 #ifdef __KERNEL__
 108 /*
 109  * Map in an area of physical address space, for accessing
 110  * I/O devices etc.
 111  */
 112 extern void *__ioremap(unsigned long address, unsigned long size,
 113                        unsigned long flags);
 114 extern void *ioremap(unsigned long address, unsigned long size);
 115 #define ioremap_nocache(addr, size)     ioremap((addr), (size))
 116 extern void iounmap(void *addr);
 117 extern unsigned long iopa(unsigned long addr);
 118 #ifdef CONFIG_APUS
 119 extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
 120 #endif
 121
 122 /*
 123  * The PCI bus is inherently Little-Endian.  The PowerPC is being
 124  * run Big-Endian.  Thus all values which cross the [PCI] barrier
 125  * must be endian-adjusted.  Also, the local DRAM has a different
 126  * address from the PCI point of view, thus buffer addresses also
 127  * have to be modified [mapped] appropriately.
 128  */
 129 extern inline unsigned long virt_to_bus(volatile void * address)
 130 {
 131 #ifndef CONFIG_APUS
 132         if (address == (void *)0)
 133                 return 0;
 134         return (unsigned long)address - KERNELBASE + PCI_DRAM_OFFSET;
 135 #else
 136         return iopa ((unsigned long) address);
 137 #endif
 138 }
 139
 140 extern inline void * bus_to_virt(unsigned long address)
 141 {
 142 #ifndef CONFIG_APUS
 143         if (address == 0)
 144                 return 0;
 145         return (void *)(address - PCI_DRAM_OFFSET + KERNELBASE);
 146 #else
 147         return (void*) mm_ptov (address);
 148 #endif
 149 }
 150
 151 /*
 152  * Change virtual addresses to physical addresses and vv, for
 153  * addresses in the area where the kernel has the RAM mapped.
 154  */
 155 extern inline unsigned long virt_to_phys(volatile void * address)
 156 {
 157 #ifndef CONFIG_APUS
 158         return (unsigned long) address - KERNELBASE;
 159 #else
 160         return iopa ((unsigned long) address);
 161 #endif
 162 }
 163
 164 extern inline void * phys_to_virt(unsigned long address)
 165 {
 166 #ifndef CONFIG_APUS
 167         return (void *) (address + KERNELBASE);
 168 #else
 169         return (void*) mm_ptov (address);
 170 #endif
 171 }
 172
 173 #endif /* __KERNEL__ */
 174
 175 /*
 176  * Enforce In-order Execution of I/O:
 177  * Acts as a barrier to ensure all previous I/O accesses have
 178  * completed before any further ones are issued.
 179  */
 180 extern inline void eieio(void)
 181 {
 182         __asm__ __volatile__ ("eieio" : : : "memory");
 183 }
 184
 185 /* Enforce in-order execution of data I/O.
 186  * No distinction between read/write on PPC; use eieio for all three.
 187  */
 188 #define iobarrier_rw() eieio()
 189 #define iobarrier_r()  eieio()
 190 #define iobarrier_w()  eieio()
 191
 192 /*
 193  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
 194  */
 195 extern inline int in_8(volatile unsigned char *addr)
 196 {
 197         int ret;
 198
 199         __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 200         return ret;
 201 }
 202
 203 extern inline void out_8(volatile unsigned char *addr, int val)
 204 {
 205         __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 206 }
 207
 208 extern inline int in_le16(volatile unsigned short *addr)
 209 {
 210         int ret;
 211
 212         __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
 213                               "r" (addr), "m" (*addr));
 214         return ret;
 215 }
 216
 217 extern inline int in_be16(volatile unsigned short *addr)
 218 {
 219         int ret;
 220
 221         __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 222         return ret;
 223 }
 224
 225 extern inline void out_le16(volatile unsigned short *addr, int val)
 226 {
 227         __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
 228                               "r" (val), "r" (addr));
 229 }
 230
 231 extern inline void out_be16(volatile unsigned short *addr, int val)
 232 {
 233         __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 234 }
 235
 236 extern inline unsigned in_le32(volatile unsigned *addr)
 237 {
 238         unsigned ret;
 239
 240         __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
 241                              "r" (addr), "m" (*addr));
 242         return ret;
 243 }
 244
 245 extern inline unsigned in_be32(volatile unsigned *addr)
 246 {
 247         unsigned ret;
 248
 249         __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 250         return ret;
 251 }
 252
 253 extern inline void out_le32(volatile unsigned *addr, int val)
 254 {
 255         __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
 256                              "r" (val), "r" (addr));
 257 }
 258
 259 extern inline void out_be32(volatile unsigned *addr, int val)
 260 {
 261         __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 262 }
 263
 264 #ifdef __KERNEL__
 265 static inline int check_signature(unsigned long io_addr,
 266         const unsigned char *signature, int length)
 267 {
 268         int retval = 0;
 269         do {
 270                 if (readb(io_addr) != *signature)
 271                         goto out;
 272                 io_addr++;
 273                 signature++;
 274                 length--;
 275         } while (length);
 276         retval = 1;
 277 out:
 278         return retval;
 279 }
 280
 281 /* Nothing to do */
 282
 283 #define dma_cache_inv(_start,_size)             do { } while (0)
 284 #define dma_cache_wback(_start,_size)           do { } while (0)
 285 #define dma_cache_wback_inv(_start,_size)       do { } while (0)
 286
 287 #endif /* __KERNEL__ */
 288
 289 #endif