drivers/usb/ohci-hcd.h

   1  /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  *
   6  * The OHCI HCD layer is a simple but nearly complete implementation of what the
   7  * USB people would call a HCD  for the OHCI.
   8  * (ISO comming soon, Bulk, INT u. CTRL transfers enabled)
   9  * The layer on top of it, is for interfacing to the alternate-usb device-drivers.
  10  *
  11  * [ This is based on Linus' UHCI code and gregs OHCI fragments (0.03c source tree). ]
  12  * [ Open Host Controller Interface driver for USB. ]
  13  * [ (C) Copyright 1999 Linus Torvalds (uhci.c) ]
  14  * [ (C) Copyright 1999 Gregory P. Smith <greg@electricrain.com> ]
  15  * [ $Log: ohci.c,v $ ]
  16  * [ Revision 1.1  1999/04/05 08:32:30  greg ]
  17  *
  18  * v4.0 1999/08/18
  19  * v2.1 1999/05/09 ep_addr correction, code clean up
  20  * v2.0 1999/05/04
  21  * v1.0 1999/04/27
  22  * ohci-hcd.h
  23  */
  24
  25 #define OHCI_DBG    /* printk some debug information */
  26
  27
  28 #include <linux/config.h>
  29
  30 // #ifdef CONFIG_USB_OHCI_VROOTHUB
  31 #define VROOTHUB
  32 // #endif
  33 /* enables virtual root hub
  34  * (root hub will be managed by the hub controller
  35  *  hub.c of the alternate usb driver)
  36  *  must be on now
  37  */
  38
  39
  40
  41 #ifdef OHCI_DBG
  42 #define OHCI_DEBUG(X) X
  43 #else
  44 #define OHCI_DEBUG(X)
  45 #endif
  46
  47 /* for readl writel functions */
  48 #include <linux/list.h>
  49 #include <asm/io.h>
  50 struct usb_ohci_ed;
  51 /* for ED and TD structures */
  52
  53 typedef void * __OHCI_BAG;
  54 typedef int (*f_handler )(void * ohci, struct usb_ohci_ed *ed, void *data, int data_len, int status, __OHCI_BAG lw0, __OHCI_BAG lw1);
  55
  56
  57
  58 /* ED States */
  59
  60 #define ED_NEW          0x00
  61 #define ED_UNLINK       0x01
  62 #define ED_OPER         0x02
  63 #define ED_STOP     0x03
  64 #define ED_DEL          0x04
  65 #define ED_TD_DEL       0x05
  66 #define ED_RH           0x07 /* marker for RH ED */
  67
  68 #define ED_STATE(ed)                    (((ed)->hwINFO >> 29) & 0x7)
  69 #define ED_setSTATE(ed,state)   (ed)->hwINFO = ((ed)->hwINFO & ~(0x7 << 29)) | (((state)& 0x7) << 29)
  70 #define ED_TYPE(ed)                     (((ed)->hwINFO >> 27) & 0x3)
  71
  72 struct usb_ohci_ed {
  73         __u32 hwINFO;
  74         __u32 hwTailP;
  75         __u32 hwHeadP;
  76         __u32 hwNextED;
  77
  78         void * buffer_start;
  79         unsigned int len;
  80         struct usb_ohci_ed *ed_prev;
  81         __u8 int_period;
  82         __u8 int_branch;
  83         __u8 int_load;
  84         __u8 int_interval;
  85
  86 } __attribute((aligned(32)));
  87
  88 struct usb_hcd_ed {
  89         int endpoint;
  90         int function;
  91         int out;
  92         int type;
  93         int slow;
  94         int maxpack;
  95 };
  96
  97 struct ohci_state {
  98         int len;
  99         int status;
 100 };
 101
 102
 103
 104 /* TD info field */
 105 #define TD_CC       0xf0000000
 106 #define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
 107 #define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
 108 #define TD_EC       0x0C000000
 109 #define TD_T        0x03000000
 110 #define TD_T_DATA0  0x02000000
 111 #define TD_T_DATA1  0x03000000
 112 #define TD_T_TOGGLE 0x00000000
 113 #define TD_R        0x00040000
 114 #define TD_DI       0x00E00000
 115 #define TD_DI_SET(X) (((X) & 0x07)<< 21)
 116 #define TD_DP       0x00180000
 117 #define TD_DP_SETUP 0x00000000
 118 #define TD_DP_IN    0x00100000
 119 #define TD_DP_OUT   0x00080000
 120
 121 #define TD_ISO          0x00010000
 122 #define TD_DEL      0x00020000
 123
 124 /* CC Codes */
 125 #define TD_CC_NOERROR      0x00
 126 #define TD_CC_CRC          0x01
 127 #define TD_CC_BITSTUFFING  0x02
 128 #define TD_CC_DATATOGGLEM  0x03
 129 #define TD_CC_STALL        0x04
 130 #define TD_DEVNOTRESP      0x05
 131 #define TD_PIDCHECKFAIL    0x06
 132 #define TD_UNEXPECTEDPID   0x07
 133 #define TD_DATAOVERRUN     0x08
 134 #define TD_DATAUNDERRUN    0x09
 135 #define TD_BUFFEROVERRUN   0x0C
 136 #define TD_BUFFERUNDERRUN  0x0D
 137 #define TD_NOTACCESSED     0x0F
 138
 139
 140 #define MAXPSW 2
 141
 142 struct usb_ohci_td {
 143         __u32 hwINFO;
 144         __u32 hwCBP;            /* Current Buffer Pointer */
 145         __u32 hwNextTD;         /* Next TD Pointer */
 146         __u32 hwBE;             /* Memory Buffer End Pointer */
 147         __u16 hwPSW[MAXPSW];
 148
 149         __u32 type;
 150         void *  buffer_start;
 151         f_handler handler;
 152         struct usb_ohci_ed *ed;
 153         struct usb_ohci_td *next_dl_td;
 154         __OHCI_BAG lw0;
 155         __OHCI_BAG lw1;
 156 } __attribute((aligned(32)));
 157
 158
 159 /* TD types */
 160 #define BULK            0x03
 161 #define INT                     0x01
 162 #define CTRL            0x02
 163 #define ISO                     0x00
 164 /* TD types with direction */
 165 #define BULK_IN         0x07
 166 #define BULK_OUT        0x03
 167 #define INT_IN          0x05
 168 #define INT_OUT         0x01
 169 #define CTRL_IN         0x06
 170 #define CTRL_OUT        0x02
 171 #define ISO_IN          0x04
 172 #define ISO_OUT         0x00
 173
 174 #define CTRL_SETUP      0x102
 175 #define CTRL_DATA_IN    0x206
 176 #define CTRL_DATA_OUT   0x202
 177 #define CTRL_STATUS_IN  0x306
 178 #define CTRL_STATUS_OUT 0x302
 179
 180
 181 #define SEND            0x00001000
 182 #define ST_ADDR         0x00002000
 183 #define ADD_LEN         0x00004000
 184 #define DEL             0x00008000
 185 #define DEL_ED          0x00040000
 186 #define TD_RM                   0x00080000
 187
 188 #define OHCI_ED_SKIP    (1 << 14)
 189
 190
 191
 192 /*
 193  * The HCCA (Host Controller Communications Area) is a 256 byte
 194  * structure defined in the OHCI spec. that the host controller is
 195  * told the base address of.  It must be 256-byte aligned.
 196  */
 197 #define NUM_INTS 32     /* part of the OHCI standard */
 198 struct ohci_hcca {
 199     __u32       int_table[NUM_INTS];    /* Interrupt ED table */
 200         __u16   frame_no;               /* current frame number */
 201         __u16   pad1;                   /* set to 0 on each frame_no change */
 202         __u32   done_head;              /* info returned for an interrupt */
 203         u8              reserved_for_hc[116];
 204 } __attribute((aligned(256)));
 205
 206
 207 /*
 208  * This is the maximum number of root hub ports.  I don't think we'll
 209  * ever see more than two as that's the space available on an ATX
 210  * motherboard's case, but it could happen.  The OHCI spec allows for
 211  * up to 15... (which is insane!)
 212  *
 213  * Although I suppose several "ports" could be connected directly to
 214  * internal laptop devices such as a keyboard, mouse, camera and
 215  * serial/parallel ports.  hmm...  That'd be neat.
 216  */
 217 #define MAX_ROOT_PORTS  15      /* maximum OHCI root hub ports */
 218
 219 /*
 220  * This is the structure of the OHCI controller's memory mapped I/O
 221  * region.  This is Memory Mapped I/O.  You must use the readl() and
 222  * writel() macros defined in asm/io.h to access these!!
 223  */
 224 struct ohci_regs {
 225         /* control and status registers */
 226         __u32   revision;
 227         __u32   control;
 228         __u32   cmdstatus;
 229         __u32   intrstatus;
 230         __u32   intrenable;
 231         __u32   intrdisable;
 232         /* memory pointers */
 233         __u32   hcca;
 234         __u32   ed_periodcurrent;
 235         __u32   ed_controlhead;
 236         __u32   ed_controlcurrent;
 237         __u32   ed_bulkhead;
 238         __u32   ed_bulkcurrent;
 239         __u32   donehead;
 240         /* frame counters */
 241         __u32   fminterval;
 242         __u32   fmremaining;
 243         __u32   fmnumber;
 244         __u32   periodicstart;
 245         __u32   lsthresh;
 246         /* Root hub ports */
 247         struct  ohci_roothub_regs {
 248                 __u32   a;
 249                 __u32   b;
 250                 __u32   status;
 251                 __u32   portstatus[MAX_ROOT_PORTS];
 252         } roothub;
 253 } __attribute((aligned(32)));
 254
 255
 256 /*
 257  * Read a MMIO register and re-write it after ANDing with (m)
 258  */
 259 #define writel_mask(m, a) writel( (readl((__u32)(a))) & (__u32)(m), (__u32)(a) )
 260
 261 /*
 262  * Read a MMIO register and re-write it after ORing with (b)
 263  */
 264 #define writel_set(b, a) writel( (readl((__u32)(a))) | (__u32)(b), (__u32)(a) )
 265
 266 /*
 267  * cmdstatus register */
 268 #define OHCI_CLF  0x02
 269 #define OHCI_BLF  0x04
 270
 271 /*
 272  * Interrupt register masks
 273  */
 274 #define OHCI_INTR_SO    (1)
 275 #define OHCI_INTR_WDH   (1 << 1)
 276 #define OHCI_INTR_SF    (1 << 2)
 277 #define OHCI_INTR_RD    (1 << 3)
 278 #define OHCI_INTR_UE    (1 << 4)
 279 #define OHCI_INTR_FNO   (1 << 5)
 280 #define OHCI_INTR_RHSC  (1 << 6)
 281 #define OHCI_INTR_OC    (1 << 30)
 282 #define OHCI_INTR_MIE   (1 << 31)
 283
 284 /*
 285  * Control register masks
 286  */
 287 #define OHCI_USB_RESET          0
 288 #define OHCI_USB_OPER           (2 << 6)
 289 #define OHCI_USB_SUSPEND        (3 << 6)
 290
 291 struct virt_root_hub {
 292         int devnum; /* Address of Root Hub endpoint */
 293         usb_device_irq handler;
 294         void * dev_id;
 295         void * int_addr;
 296         int send;
 297         int interval;
 298         struct timer_list rh_int_timer;
 299 };
 300 /*
 301  * This is the full ohci controller description
 302  *
 303  * Note how the "proper" USB information is just
 304  * a subset of what the full implementation needs. (Linus)
 305  */
 306
 307
 308 struct ohci {
 309         int irq;
 310         struct ohci_regs *regs;                                 /* OHCI controller's memory */
 311         struct ohci_hc_area *hc_area;                   /* hcca, int ed-tree, ohci itself .. */
 312
 313         int ohci_int_load[32];                  /* load of the 32 Interrupt Chains (for load ballancing)*/
 314         struct usb_ohci_ed * ed_rm_list;        /* list of all endpoints to be removed */
 315         struct usb_ohci_ed * ed_bulktail;       /* last endpoint of bulk list */
 316         struct usb_ohci_ed * ed_controltail;    /* last endpoint of control list */
 317         struct usb_ohci_ed * ed_isotail;        /* last endpoint of iso list */
 318         int intrstatus;
 319         struct ohci_rep_td *repl_queue;                 /* for internal requests */
 320         int rh_int_interval;
 321         int rh_int_timer;
 322         struct usb_bus *bus;
 323         struct virt_root_hub rh;
 324 };
 325
 326
 327 #define NUM_TDS 0               /* num of preallocated transfer descriptors */
 328 #define NUM_EDS 32              /* num of preallocated endpoint descriptors */
 329
 330 struct ohci_hc_area {
 331         struct ohci_hcca        hcca;           /* OHCI mem. mapped IO area 256 Bytes*/
 332         struct ohci         ohci;
 333
 334 };
 335 struct ohci_device {
 336         struct usb_device       *usb;
 337         atomic_t                        refcnt;
 338         struct ohci                     *ohci;
 339         struct usb_ohci_ed      ed[NUM_EDS];
 340         unsigned long           data[16];
 341 };
 342
 343 #define ohci_to_usb(ohci)       ((ohci)->usb)
 344 #define usb_to_ohci(usb)        ((struct ohci_device *)(usb)->hcpriv)
 345
 346 /* hcd */
 347 struct usb_ohci_td * ohci_trans_req(struct ohci * ohci, struct usb_ohci_ed * ed, int cmd_len, void  *cmd, void * data, int data_len, __OHCI_BAG lw0, __OHCI_BAG lw1, unsigned int type, f_handler handler);
 348 struct usb_ohci_ed *usb_ohci_add_ep(struct usb_device * usb_dev, struct usb_hcd_ed * hcd_ed, int interval, int load);
 349 int usb_ohci_rm_function(struct usb_device * usb_dev, f_handler handler, __OHCI_BAG lw0, __OHCI_BAG lw1);
 350 int usb_ohci_rm_ep(struct usb_device * usb_dev, struct  usb_ohci_ed *ed, f_handler handler, __OHCI_BAG lw0, __OHCI_BAG lw1, int send);
 351 struct usb_ohci_ed * ohci_find_ep(struct usb_device * usb_dev, struct usb_hcd_ed *hcd_ed);
 352
 353 /* roothub */
 354
 355 int root_hub_control_msg(struct usb_device *usb_dev, unsigned int pipe, devrequest *cmd, void *data, int len);
 356 int root_hub_release_irq(struct usb_device *usb_dev, void * ed);
 357 void * root_hub_request_irq(struct usb_device *usb_dev, unsigned int pipe, usb_device_irq handler, int period, void *dev_id);
 358
 359 /* Root-Hub Register info */
 360
 361 #define RH_PS_CCS            0x00000001
 362 #define RH_PS_PES            0x00000002
 363 #define RH_PS_PSS            0x00000004
 364 #define RH_PS_POCI           0x00000008
 365 #define RH_PS_PRS            0x00000010
 366 #define RH_PS_PPS            0x00000100
 367 #define RH_PS_LSDA           0x00000200
 368 #define RH_PS_CSC            0x00010000
 369 #define RH_PS_PESC           0x00020000
 370 #define RH_PS_PSSC           0x00040000
 371 #define RH_PS_OCIC           0x00080000
 372 #define RH_PS_PRSC           0x00100000
 373
 374
 375 #ifdef OHCI_DBG
 376 #define OHCI_FREE(x) kfree(x); printk("OHCI FREE: %d: %4x\n", -- __ohci_free_cnt, (unsigned int) x)
 377 #define OHCI_ALLOC(x,size) (x) = kmalloc(size, GFP_KERNEL); printk("OHCI ALLO: %d: %4x\n", ++ __ohci_free_cnt,(unsigned int) x)
 378 #define USB_FREE(x) kfree(x); printk("USB FREE: %d: %4x\n", -- __ohci_free1_cnt, (unsigned int) x)
 379 #define USB_ALLOC(x,size) (x) = kmalloc(size, GFP_KERNEL); printk("USB ALLO: %d: %4x\n", ++ __ohci_free1_cnt, (unsigned int) x)
 380 static int __ohci_free_cnt = 0;
 381 static int __ohci_free1_cnt = 0;
 382 #else
 383 #define OHCI_FREE(x) kfree(x)
 384 #define OHCI_ALLOC(x,size) (x) = kmalloc(size, GFP_KERNEL)
 385 #define USB_FREE(x) kfree(x)
 386 #define USB_ALLOC(x,size) (x) = kmalloc(size, GFP_KERNEL)
 387 #endif
 388