drivers/scsi/cyberstorm.h

   1 /* cyberstorm.h: Defines and structures for the CyberStorm SCSI driver.
   2  *
   3  * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
   4  */
   5
   6 #include "NCR53C9x.h"
   7
   8 #ifndef CYBER_ESP_H
   9 #define CYBER_ESP_H
  10
  11 /* The controller registers can be found in the Z2 config area at these
  12  * offsets:
  13  */
  14 #define CYBER_ESP_ADDR 0xf400
  15 #define CYBER_DMA_ADDR 0xf800
  16
  17
  18 /* The CyberStorm DMA interface */
  19 struct cyber_dma_registers {
  20         volatile unsigned char dma_addr0;       /* DMA address (MSB) [0x000] */
  21         unsigned char dmapad1[1];
  22         volatile unsigned char dma_addr1;       /* DMA address       [0x002] */
  23         unsigned char dmapad2[1];
  24         volatile unsigned char dma_addr2;       /* DMA address       [0x004] */
  25         unsigned char dmapad3[1];
  26         volatile unsigned char dma_addr3;       /* DMA address (LSB) [0x006] */
  27         unsigned char dmapad4[0x3fb];
  28         volatile unsigned char cond_reg;        /* DMA cond    (ro)  [0x402] */
  29 #define ctrl_reg  cond_reg                      /* DMA control (wo)  [0x402] */
  30 };
  31
  32 /* DMA control bits */
  33 #define CYBER_DMA_LED    0x80   /* HD led control 1 = on */
  34 #define CYBER_DMA_WRITE  0x40   /* DMA direction. 1 = write */
  35 #define CYBER_DMA_Z3     0x20   /* 16 (Z2) or 32 (CHIP/Z3) bit DMA transfer */
  36
  37 /* DMA status bits */
  38 #define CYBER_DMA_HNDL_INTR 0x80        /* DMA IRQ pending? */
  39
  40 /* The bits below appears to be Phase5 Debug bits only; they were not
  41  * described by Phase5 so using them may seem a bit stupid...
  42  */
  43 #define CYBER_HOST_ID 0x02      /* If set, host ID should be 7, otherwise
  44                                  * it should be 6.
  45                                  */
  46 #define CYBER_SLOW_CABLE 0x08   /* If *not* set, assume SLOW_CABLE */
  47
  48 extern int cyber_esp_detect(struct SHT *);
  49 extern int cyber_esp_release(struct Scsi_Host *);
  50 extern const char *esp_info(struct Scsi_Host *);
  51 extern int esp_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
  52 extern int esp_command(Scsi_Cmnd *);
  53 extern int esp_abort(Scsi_Cmnd *);
  54 extern int esp_reset(Scsi_Cmnd *, unsigned int);
  55 extern int esp_proc_info(char *buffer, char **start, off_t offset, int length,
  56                          int hostno, int inout);
  57
  58
  59 #define SCSI_CYBERSTORM   { proc_dir:           &proc_scsi_esp, \
  60                             proc_info:          esp_proc_info, \
  61                             name:               "CyberStorm SCSI", \
  62                             detect:             cyber_esp_detect, \
  63                             release:            cyber_esp_release, \
  64                             queuecommand:       esp_queue, \
  65                             abort:              esp_abort, \
  66                             reset:              esp_reset, \
  67                             can_queue:          7, \
  68                             this_id:            7, \
  69                             sg_tablesize:       SG_ALL, \
  70                             cmd_per_lun:        1, \
  71                             use_clustering:     ENABLE_CLUSTERING }
  72
  73 #endif /* CYBER_ESP_H */