drivers/scsi/blz1230.c

   1 /* blz1230.c: Driver for Blizzard 1230 SCSI IV Controller.
   2  *
   3  * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
   4  *
   5  * This driver is based on the CyberStorm driver, hence the occasional
   6  * reference to CyberStorm.
   7  */
   8
   9 /* TODO:
  10  *
  11  * 1) Figure out how to make a cleaner merge with the sparc driver with regard
  12  *    to the caches and the Sparc MMU mapping.
  13  * 2) Make as few routines required outside the generic driver. A lot of the
  14  *    routines in this file used to be inline!
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/types.h>
  22 #include <linux/string.h>
  23 #include <linux/malloc.h>
  24 #include <linux/blk.h>
  25 #include <linux/proc_fs.h>
  26 #include <linux/stat.h>
  27
  28 #include "scsi.h"
  29 #include "hosts.h"
  30 #include "NCR53C9x.h"
  31 #include "blz1230.h"
  32
  33 #include <linux/zorro.h>
  34 #include <asm/irq.h>
  35 #include <asm/amigaints.h>
  36 #include <asm/amigahw.h>
  37
  38 #include <asm/pgtable.h>
  39
  40 #define MKIV 1
  41
  42 static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
  43 static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
  44 static void dma_dump_state(struct NCR_ESP *esp);
  45 static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length);
  46 static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length);
  47 static void dma_ints_off(struct NCR_ESP *esp);
  48 static void dma_ints_on(struct NCR_ESP *esp);
  49 static int  dma_irq_p(struct NCR_ESP *esp);
  50 static int  dma_ports_p(struct NCR_ESP *esp);
  51 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
  52
  53 volatile unsigned char cmd_buffer[16];
  54                                 /* This is where all commands are put
  55                                  * before they are transfered to the ESP chip
  56                                  * via PIO.
  57                                  */
  58
  59 /***************************************************************** Detection */
  60 int __init blz1230_esp_detect(Scsi_Host_Template *tpnt)
  61 {
  62         struct NCR_ESP *esp;
  63         const struct ConfigDev *esp_dev;
  64         unsigned int key;
  65         unsigned long address;
  66         struct ESP_regs *eregs;
  67
  68 #if MKIV
  69         if ((key = zorro_find(ZORRO_PROD_PHASE5_BLIZZARD_1230_IV_1260, 0, 0))){
  70 #else
  71         if ((key = zorro_find(ZORRO_PROD_PHASE5_BLIZZARD_1230_II_FASTLANE_Z3_CYBERSCSI_CYBERSTORM060, 0, 0))){
  72 #endif
  73                 esp_dev = zorro_get_board(key);
  74
  75                 /* Do some magic to figure out if the blizzard is
  76                  * equipped with a SCSI controller
  77                  */
  78                 address = (unsigned long)ZTWO_VADDR(esp_dev->cd_BoardAddr);
  79 #if MKIV
  80                 eregs = (struct ESP_regs *)(address + BLZ1230_ESP_ADDR);
  81 #else
  82                 eregs = (struct ESP_regs *)(address + BLZ1230II_ESP_ADDR);
  83 #endif
  84
  85                 esp = esp_allocate(tpnt, (void *) esp_dev);
  86
  87                 esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7));
  88                 udelay(5);
  89                 if(esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7)){
  90                         esp_deallocate(esp);
  91                         scsi_unregister(esp->ehost);
  92                         return 0; /* Bail out if address did not hold data */
  93                 }
  94
  95                 /* Do command transfer with programmed I/O */
  96                 esp->do_pio_cmds = 1;
  97
  98                 /* Required functions */
  99                 esp->dma_bytes_sent = &dma_bytes_sent;
 100                 esp->dma_can_transfer = &dma_can_transfer;
 101                 esp->dma_dump_state = &dma_dump_state;
 102                 esp->dma_init_read = &dma_init_read;
 103                 esp->dma_init_write = &dma_init_write;
 104                 esp->dma_ints_off = &dma_ints_off;
 105                 esp->dma_ints_on = &dma_ints_on;
 106                 esp->dma_irq_p = &dma_irq_p;
 107                 esp->dma_ports_p = &dma_ports_p;
 108                 esp->dma_setup = &dma_setup;
 109
 110                 /* Optional functions */
 111                 esp->dma_barrier = 0;
 112                 esp->dma_drain = 0;
 113                 esp->dma_invalidate = 0;
 114                 esp->dma_irq_entry = 0;
 115                 esp->dma_irq_exit = 0;
 116                 esp->dma_led_on = 0;
 117                 esp->dma_led_off = 0;
 118                 esp->dma_poll = 0;
 119                 esp->dma_reset = 0;
 120
 121                 /* SCSI chip speed */
 122                 esp->cfreq = 40000000;
 123
 124                 /* The DMA registers on the Blizzard are mapped
 125                  * relative to the device (i.e. in the same Zorro
 126                  * I/O block).
 127                  */
 128 #if MKIV
 129                 esp->dregs = (void *)(address + BLZ1230_DMA_ADDR);
 130 #else
 131                 esp->dregs = (void *)(address + BLZ1230II_DMA_ADDR);
 132 #endif
 133
 134                 /* ESP register base */
 135                 esp->eregs = eregs;
 136
 137                 /* Set the command buffer */
 138                 esp->esp_command = (volatile unsigned char*) cmd_buffer;
 139                 esp->esp_command_dvma = virt_to_bus(cmd_buffer);
 140
 141                 esp->irq = IRQ_AMIGA_PORTS;
 142                 esp->slot = key;
 143                 request_irq(IRQ_AMIGA_PORTS, esp_intr, SA_SHIRQ,
 144                             "Blizzard 1230 SCSI IV", esp_intr);
 145
 146                 /* Figure out our scsi ID on the bus */
 147                 esp->scsi_id = 7;
 148
 149                 /* We don't have a differential SCSI-bus. */
 150                 esp->diff = 0;
 151
 152                 esp_initialize(esp);
 153
 154                 zorro_config_board(key, 0);
 155
 156                 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
 157                 esps_running = esps_in_use;
 158                 return esps_in_use;
 159         }
 160         return 0;
 161 }
 162
 163 /************************************************************* DMA Functions */
 164 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
 165 {
 166         /* Since the Blizzard DMA is fully dedicated to the ESP chip,
 167          * the number of bytes sent (to the ESP chip) equals the number
 168          * of bytes in the FIFO - there is no buffering in the DMA controller.
 169          * XXXX Do I read this right? It is from host to ESP, right?
 170          */
 171         return fifo_count;
 172 }
 173
 174 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
 175 {
 176         /* I don't think there's any limit on the Blizzard DMA. So we use what
 177          * the ESP chip can handle (24 bit).
 178          */
 179         unsigned long sz = sp->SCp.this_residual;
 180         if(sz > 0x1000000)
 181                 sz = 0x1000000;
 182         return sz;
 183 }
 184
 185 static void dma_dump_state(struct NCR_ESP *esp)
 186 {
 187         ESPLOG(("intreq:<%04x>, intena:<%04x>\n",
 188                 custom.intreqr, custom.intenar));
 189 }
 190
 191 void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length)
 192 {
 193 #if MKIV
 194         struct blz1230_dma_registers *dregs =
 195                 (struct blz1230_dma_registers *) (esp->dregs);
 196 #else
 197         struct blz1230II_dma_registers *dregs =
 198                 (struct blz1230II_dma_registers *) (esp->dregs);
 199 #endif
 200
 201         cache_clear(addr, length);
 202
 203         addr >>= 1;
 204         addr &= ~(BLZ1230_DMA_WRITE);
 205
 206         /* First set latch */
 207         dregs->dma_latch = (addr >> 24) & 0xff;
 208
 209         /* Then pump the address to the DMA address register */
 210 #if MKIV
 211         dregs->dma_addr = (addr >> 24) & 0xff;
 212 #endif
 213         dregs->dma_addr = (addr >> 16) & 0xff;
 214         dregs->dma_addr = (addr >>  8) & 0xff;
 215         dregs->dma_addr = (addr      ) & 0xff;
 216 }
 217
 218 void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length)
 219 {
 220 #if MKIV
 221         struct blz1230_dma_registers *dregs =
 222                 (struct blz1230_dma_registers *) (esp->dregs);
 223 #else
 224         struct blz1230II_dma_registers *dregs =
 225                 (struct blz1230II_dma_registers *) (esp->dregs);
 226 #endif
 227
 228         cache_push(addr, length);
 229
 230         addr >>= 1;
 231         addr |= BLZ1230_DMA_WRITE;
 232
 233         /* First set latch */
 234         dregs->dma_latch = (addr >> 24) & 0xff;
 235
 236         /* Then pump the address to the DMA address register */
 237 #if MKIV
 238         dregs->dma_addr = (addr >> 24) & 0xff;
 239 #endif
 240         dregs->dma_addr = (addr >> 16) & 0xff;
 241         dregs->dma_addr = (addr >>  8) & 0xff;
 242         dregs->dma_addr = (addr      ) & 0xff;
 243 }
 244
 245 static void dma_ints_off(struct NCR_ESP *esp)
 246 {
 247         disable_irq(esp->irq);
 248 }
 249
 250 static void dma_ints_on(struct NCR_ESP *esp)
 251 {
 252         enable_irq(esp->irq);
 253 }
 254
 255 static int dma_irq_p(struct NCR_ESP *esp)
 256 {
 257         return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR);
 258 }
 259
 260 static int dma_ports_p(struct NCR_ESP *esp)
 261 {
 262         return ((custom.intenar) & IF_PORTS);
 263 }
 264
 265 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
 266 {
 267         /* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
 268          * so when (write) is true, it actually means READ!
 269          */
 270         if(write){
 271                 dma_init_read(esp, addr, count);
 272         } else {
 273                 dma_init_write(esp, addr, count);
 274         }
 275 }
 276
 277 #ifdef MODULE
 278
 279 #define HOSTS_C
 280
 281 #include "blz1230.h"
 282
 283 Scsi_Host_Template driver_template = SCSI_BLZ1230;
 284
 285 #include "scsi_module.c"
 286
 287 #endif
 288
 289 int blz1230_esp_release(struct Scsi_Host *instance)
 290 {
 291 #ifdef MODULE
 292         unsigned int key;
 293
 294         key = ((struct NCR_ESP *)instance->hostdata)->slot;
 295         esp_deallocate((struct NCR_ESP *)instance->hostdata);
 296         esp_release();
 297         zorro_unconfig_board(key, 0);
 298         free_irq(IRQ_AMIGA_PORTS, esp_intr);
 299 #endif
 300         return 1;
 301 }