drivers/scsi/aha152x.h

   1 #ifndef _AHA152X_H
   2 #define _AHA152X_H
   3
   4 /*
   5  * $Id: aha152x.h,v 1.7 1997/01/19 23:07:11 davem Exp $
   6  */
   7
   8 #if defined(__KERNEL__)
   9
  10 #include <linux/blk.h>
  11 #include "scsi.h"
  12 #include <asm/io.h>
  13
  14 int aha152x_detect(Scsi_Host_Template *);
  15 int aha152x_command(Scsi_Cmnd *);
  16 int aha152x_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
  17 int aha152x_abort(Scsi_Cmnd *);
  18 int aha152x_release(struct Scsi_Host *shpnt);
  19 int aha152x_reset(Scsi_Cmnd *, unsigned int);
  20 int aha152x_biosparam(Disk *, kdev_t, int*);
  21 int aha152x_proc_info(char *buffer, char **start, off_t offset, int length, int hostno, int inout);
  22
  23 /* number of queueable commands
  24    (unless we support more than 1 cmd_per_lun this should do) */
  25 #define AHA152X_MAXQUEUE 7
  26
  27 #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 1.7 $"
  28
  29 extern struct proc_dir_entry proc_scsi_aha152x;
  30
  31 /* Initial value of Scsi_Host entry */
  32 #define AHA152X { proc_dir:           &proc_scsi_aha152x, \
  33                   proc_info:          aha152x_proc_info,  \
  34                   name:               AHA152X_REVID,      \
  35                   detect:             aha152x_detect,     \
  36                   command:            aha152x_command,    \
  37                   queuecommand:       aha152x_queue,      \
  38                   abort:              aha152x_abort,      \
  39                   reset:              aha152x_reset,      \
  40                   release:            aha152x_release,    \
  41                   slave_attach:       0,                  \
  42                   bios_param:         aha152x_biosparam,  \
  43                   can_queue:          1,                  \
  44                   this_id:            7,                  \
  45                   sg_tablesize:       SG_ALL,             \
  46                   cmd_per_lun:        1,                  \
  47                   present:            0,                  \
  48                   unchecked_isa_dma:  0,                  \
  49                   use_clustering:     DISABLE_CLUSTERING }
  50 #endif
  51
  52
  53 /* port addresses */
  54 #define SCSISEQ      (shpnt->io_port+0x00)    /* SCSI sequence control */
  55 #define SXFRCTL0     (shpnt->io_port+0x01)    /* SCSI transfer control 0 */
  56 #define SXFRCTL1     (shpnt->io_port+0x02)    /* SCSI transfer control 1 */
  57 #define SCSISIG      (shpnt->io_port+0x03)    /* SCSI signal in/out */
  58 #define SCSIRATE     (shpnt->io_port+0x04)    /* SCSI rate control */
  59 #define SELID        (shpnt->io_port+0x05)    /* selection/reselection ID */
  60 #define SCSIID       SELID                    /* SCSI ID */
  61 #define SCSIDAT      (shpnt->io_port+0x06)    /* SCSI latched data */
  62 #define SCSIBUS      (shpnt->io_port+0x07)    /* SCSI data bus */
  63 #define STCNT0       (shpnt->io_port+0x08)    /* SCSI transfer count 0 */
  64 #define STCNT1       (shpnt->io_port+0x09)    /* SCSI transfer count 1 */
  65 #define STCNT2       (shpnt->io_port+0x0a)    /* SCSI transfer count 2 */
  66 #define SSTAT0       (shpnt->io_port+0x0b)    /* SCSI interrupt status 0 */
  67 #define SSTAT1       (shpnt->io_port+0x0c)    /* SCSI interrupt status 1 */
  68 #define SSTAT2       (shpnt->io_port+0x0d)    /* SCSI interrupt status 2 */
  69 #define SCSITEST     (shpnt->io_port+0x0e)    /* SCSI test control */
  70 #define SSTAT3       SCSITEST                 /* SCSI interrupt status 3 */
  71 #define SSTAT4       (shpnt->io_port+0x0f)    /* SCSI status 4 */
  72 #define SIMODE0      (shpnt->io_port+0x10)    /* SCSI interrupt mode 0 */
  73 #define SIMODE1      (shpnt->io_port+0x11)    /* SCSI interrupt mode 1 */
  74 #define DMACNTRL0    (shpnt->io_port+0x12)    /* DMA control 0 */
  75 #define DMACNTRL1    (shpnt->io_port+0x13)    /* DMA control 1 */
  76 #define DMASTAT      (shpnt->io_port+0x14)    /* DMA status */
  77 #define FIFOSTAT     (shpnt->io_port+0x15)    /* FIFO status */
  78 #define DATAPORT     (shpnt->io_port+0x16)    /* DATA port */
  79 #define BRSTCNTRL    (shpnt->io_port+0x18)    /* burst control */
  80 #define PORTA        (shpnt->io_port+0x1a)    /* PORT A */
  81 #define PORTB        (shpnt->io_port+0x1b)    /* PORT B */
  82 #define REV          (shpnt->io_port+0x1c)    /* revision */
  83 #define STACK        (shpnt->io_port+0x1d)    /* stack */
  84 #define TEST         (shpnt->io_port+0x1e)    /* test register */
  85
  86 /* used in aha152x_porttest */
  87 #define O_PORTA      0x1a                    /* PORT A */
  88 #define O_PORTB      0x1b                    /* PORT B */
  89 #define O_DMACNTRL1  0x13                    /* DMA control 1 */
  90 #define O_STACK      0x1d                    /* stack */
  91 #define IO_RANGE     0x20
  92
  93 /* bits and bitmasks to ports */
  94
  95 /* SCSI sequence control */
  96 #define TEMODEO      0x80
  97 #define ENSELO       0x40
  98 #define ENSELI       0x20
  99 #define ENRESELI     0x10
 100 #define ENAUTOATNO   0x08
 101 #define ENAUTOATNI   0x04
 102 #define ENAUTOATNP   0x02
 103 #define SCSIRSTO     0x01
 104
 105 /* SCSI transfer control 0 */
 106 #define SCSIEN       0x80
 107 #define DMAEN        0x40
 108 #define CH1          0x20
 109 #define CLRSTCNT     0x10
 110 #define SPIOEN       0x08
 111 #define CLRCH1       0x02
 112
 113 /* SCSI transfer control 1 */
 114 #define BITBUCKET    0x80
 115 #define SWRAPEN      0x40
 116 #define ENSPCHK      0x20
 117 #define STIMESEL     0x18    /* mask */
 118 #define STIMESEL_    3
 119 #define ENSTIMER     0x04
 120 #define BYTEALIGN    0x02
 121
 122 /* SCSI signal IN */
 123 #define CDI          0x80
 124 #define IOI          0x40
 125 #define MSGI         0x20
 126 #define ATNI         0x10
 127 #define SELI         0x08
 128 #define BSYI         0x04
 129 #define REQI         0x02
 130 #define ACKI         0x01
 131
 132 /* SCSI Phases */
 133 #define P_MASK       (MSGI|CDI|IOI)
 134 #define P_DATAO      (0)
 135 #define P_DATAI      (IOI)
 136 #define P_CMD        (CDI)
 137 #define P_STATUS     (CDI|IOI)
 138 #define P_MSGO       (MSGI|CDI)
 139 #define P_MSGI       (MSGI|CDI|IOI)
 140
 141 /* SCSI signal OUT */
 142 #define CDO          0x80
 143 #define IOO          0x40
 144 #define MSGO         0x20
 145 #define ATNO         0x10
 146 #define SELO         0x08
 147 #define BSYO         0x04
 148 #define REQO         0x02
 149 #define ACKO         0x01
 150
 151 /* SCSI rate control */
 152 #define SXFR         0x70    /* mask */
 153 #define SXFR_        4
 154 #define SOFS         0x0f    /* mask */
 155
 156 /* SCSI ID */
 157 #define OID          0x70
 158 #define OID_         4
 159 #define TID          0x07
 160
 161 /* SCSI transfer count */
 162 #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
 163                    + (GETPORT(STCNT1)<< 8) \
 164                    + GETPORT(STCNT0) )
 165
 166 #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
 167                       SETPORT(STCNT1, ((X) & 0x00FF00) >>  8); \
 168                       SETPORT(STCNT0, ((X) & 0x0000FF) ); }
 169
 170 /* SCSI interrupt status */
 171 #define TARGET       0x80
 172 #define SELDO        0x40
 173 #define SELDI        0x20
 174 #define SELINGO      0x10
 175 #define SWRAP        0x08
 176 #define SDONE        0x04
 177 #define SPIORDY      0x02
 178 #define DMADONE      0x01
 179
 180 #define SETSDONE     0x80
 181 #define CLRSELDO     0x40
 182 #define CLRSELDI     0x20
 183 #define CLRSELINGO   0x10
 184 #define CLRSWRAP     0x08
 185 #define CLRSDONE     0x04
 186 #define CLRSPIORDY   0x02
 187 #define CLRDMADONE   0x01
 188
 189 /* SCSI status 1 */
 190 #define SELTO        0x80
 191 #define ATNTARG      0x40
 192 #define SCSIRSTI     0x20
 193 #define PHASEMIS     0x10
 194 #define BUSFREE      0x08
 195 #define SCSIPERR     0x04
 196 #define PHASECHG     0x02
 197 #define REQINIT      0x01
 198
 199 #define CLRSELTIMO   0x80
 200 #define CLRATNO      0x40
 201 #define CLRSCSIRSTI  0x20
 202 #define CLRBUSFREE   0x08
 203 #define CLRSCSIPERR  0x04
 204 #define CLRPHASECHG  0x02
 205 #define CLRREQINIT   0x01
 206
 207 /* SCSI status 2 */
 208 #define SOFFSET      0x20
 209 #define SEMPTY       0x10
 210 #define SFULL        0x08
 211 #define SFCNT        0x07    /* mask */
 212
 213 /* SCSI status 3 */
 214 #define SCSICNT      0xf0    /* mask */
 215 #define SCSICNT_     4
 216 #define OFFCNT       0x0f    /* mask */
 217
 218 /* SCSI TEST control */
 219 #define SCTESTU      0x08
 220 #define SCTESTD      0x04
 221 #define STCTEST      0x01
 222
 223 /* SCSI status 4 */
 224 #define SYNCERR      0x04
 225 #define FWERR        0x02
 226 #define FRERR        0x01
 227
 228 #define CLRSYNCERR   0x04
 229 #define CLRFWERR     0x02
 230 #define CLRFRERR     0x01
 231
 232 /* SCSI interrupt mode 0 */
 233 #define ENSELDO      0x40
 234 #define ENSELDI      0x20
 235 #define ENSELINGO    0x10
 236 #define ENSWRAP      0x08
 237 #define ENSDONE      0x04
 238 #define ENSPIORDY    0x02
 239 #define ENDMADONE    0x01
 240
 241 /* SCSI interrupt mode 1 */
 242 #define ENSELTIMO    0x80
 243 #define ENATNTARG    0x40
 244 #define ENSCSIRST    0x20
 245 #define ENPHASEMIS   0x10
 246 #define ENBUSFREE    0x08
 247 #define ENSCSIPERR   0x04
 248 #define ENPHASECHG   0x02
 249 #define ENREQINIT    0x01
 250
 251 /* DMA control 0 */
 252 #define ENDMA        0x80
 253 #define _8BIT        0x40
 254 #define DMA          0x20
 255 #define WRITE_READ   0x08
 256 #define INTEN        0x04
 257 #define RSTFIFO      0x02
 258 #define SWINT        0x01
 259
 260 /* DMA control 1 */
 261 #define PWRDWN       0x80
 262 #define STK          0x07    /* mask */
 263
 264 /* DMA status */
 265 #define ATDONE       0x80
 266 #define WORDRDY      0x40
 267 #define INTSTAT      0x20
 268 #define DFIFOFULL    0x10
 269 #define DFIFOEMP     0x08
 270
 271 /* BURST control */
 272 #define BON          0xf0
 273 #define BOFF         0x0f
 274
 275 /* TEST REGISTER */
 276 #define BOFFTMR      0x40
 277 #define BONTMR       0x20
 278 #define STCNTH       0x10
 279 #define STCNTM       0x08
 280 #define STCNTL       0x04
 281 #define SCSIBLK      0x02
 282 #define DMABLK       0x01
 283
 284 /* On the AHA-152x board PORTA and PORTB contain
 285    some information about the board's configuration. */
 286 typedef union {
 287   struct {
 288     unsigned reserved:2;    /* reserved */
 289     unsigned tardisc:1;     /* Target disconnect: 0=disabled, 1=enabled */
 290     unsigned syncneg:1;     /* Initial sync neg: 0=disabled, 1=enabled */
 291     unsigned msgclasses:2;  /* Message classes
 292                                  0=#4
 293                                  1=#0, #1, #2, #3, #4
 294                                  2=#0, #3, #4
 295                                  3=#0, #4
 296                              */
 297     unsigned boot:1;        /* boot: 0=disabled, 1=enabled */
 298     unsigned dma:1;         /* Transfer mode: 0=PIO; 1=DMA */
 299     unsigned id:3;          /* SCSI-id */
 300     unsigned irq:2;         /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
 301     unsigned dmachan:2;     /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
 302     unsigned parity:1;      /* SCSI-parity: 1=enabled 0=disabled */
 303   } fields;
 304   unsigned short port;
 305 } aha152x_config ;
 306
 307 #define cf_parity     fields.parity
 308 #define cf_dmachan    fields.dmachan
 309 #define cf_irq        fields.irq
 310 #define cf_id         fields.id
 311 #define cf_dma        fields.dma
 312 #define cf_boot       fields.boot
 313 #define cf_msgclasses fields.msgclasses
 314 #define cf_syncneg    fields.syncneg
 315 #define cf_tardisc    fields.tardisc
 316 #define cf_port       port
 317
 318 /* Some macros to manipulate ports and their bits */
 319
 320 #define SETPORT(PORT, VAL)         outb( (VAL), (PORT) )
 321 #define SETPORTP(PORT, VAL)        outb_p( (VAL), (PORT) )
 322 #define SETPORTW(PORT, VAL)        outw( (VAL), (PORT) )
 323
 324 #define GETPORT(PORT)              inb( PORT )
 325 #define GETPORTW(PORT)             inw( PORT )
 326
 327 #define SETBITS(PORT, BITS)        outb( (inb(PORT) | (BITS)), (PORT) )
 328 #define CLRBITS(PORT, BITS)        outb( (inb(PORT) & ~(BITS)), (PORT) )
 329 #define CLRSETBITS(PORT, CLR, SET) outb( (inb(PORT) & ~(CLR)) | (SET) , (PORT) )
 330
 331 #define TESTHI(PORT, BITS)         ((inb(PORT) & (BITS)) == BITS)
 332 #define TESTLO(PORT, BITS)         ((inb(PORT) & (BITS)) == 0)
 333
 334 #ifdef DEBUG_AHA152X
 335 enum {
 336   debug_skipports = 0x0001,
 337   debug_queue     = 0x0002,
 338   debug_intr      = 0x0004,
 339   debug_selection = 0x0008,
 340   debug_msgo      = 0x0010,
 341   debug_msgi      = 0x0020,
 342   debug_status    = 0x0040,
 343   debug_cmd       = 0x0080,
 344   debug_datai     = 0x0100,
 345   debug_datao     = 0x0200,
 346   debug_abort     = 0x0400,
 347   debug_done      = 0x0800,
 348   debug_biosparam = 0x1000,
 349   debug_phases    = 0x2000,
 350   debug_queues    = 0x4000,
 351   debug_reset     = 0x8000,
 352 };
 353 #endif
 354
 355 #endif /* _AHA152X_H */