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Import 2.3.18pre1
[davej-history.git] / drivers / scsi / NCR53c406a.c
blob52a9196c6b47521446d7e6bb1b7e707c585c54fc
1 /*
2 * NCR53c406.c
3 * Low-level SCSI driver for NCR53c406a chip.
4 * Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
5 *
6 * LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 * Specify IRQ = 0 for non-interrupt driven mode.
8 * FASTPIO = 1 for fast pio mode, 0 for slow mode.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2, or (at your option) any
13 * later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 */
21
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
24
25 /* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
26 #define USE_PIO 1
27
28 #define USE_BIOS 0
29 /* #define BIOS_ADDR 0xD8000 */ /* define this if autoprobe fails */
30 /* #define PORT_BASE 0x330 */ /* define this if autoprobe fails */
31 /* #define IRQ_LEV 0 */ /* define this if autoprobe fails */
32 #define DMA_CHAN 5 /* this is ignored if DMA is disabled */
33
34 /* Set this to 0 if you encounter kernel lockups while transferring
35 * data in PIO mode */
36 #define USE_FAST_PIO 1
37
38 /* ============= End of user configurable parameters ============= */
39
40 #include <linux/module.h>
41
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/sched.h>
45 #include <linux/interrupt.h>
46 #include <linux/proc_fs.h>
47 #include <linux/stat.h>
48 #include <linux/init.h>
49 #include <asm/io.h>
50 #include <asm/dma.h>
51 #include <asm/bitops.h>
52 #include <asm/irq.h>
53
54 #include <linux/blk.h>
55 #include <linux/spinlock.h>
56 #include "scsi.h"
57 #include "hosts.h"
58 #include "sd.h"
59
60 #include "NCR53c406a.h"
61
62 /* ============================================================= */
63
64 #define WATCHDOG 5000000
65
66 #define SYNC_MODE 0 /* Synchronous transfer mode */
67
68 #if DEBUG
69 #undef NCR53C406A_DEBUG
70 #define NCR53C406A_DEBUG 1
71 #endif
72
73 #if USE_PIO
74 #define USE_DMA 0
75 #else
76 #define USE_DMA 1
77 #endif
78
79 /* Default configuration */
80 #define C1_IMG 0x07 /* ID=7 */
81 #define C2_IMG 0x48 /* FE SCSI2 */
82 #if USE_DMA
83 #define C3_IMG 0x21 /* CDB TE */
84 #else
85 #define C3_IMG 0x20 /* CDB */
86 #endif
87 #define C4_IMG 0x04 /* ANE */
88 #define C5_IMG 0xb6 /* AA PI SIE POL */
89
90 #define REG0 (outb(C4_IMG, CONFIG4))
91 #define REG1 (outb(C5_IMG, CONFIG5))
92
93 #if NCR53C406A_DEBUG
94 #define DEB(x) x
95 #else
96 #define DEB(x)
97 #endif
98
99 #if VERBOSE_NCR53C406A_DEBUG
100 #define VDEB(x) x
101 #else
102 #define VDEB(x)
103 #endif
104
105 #define LOAD_DMA_COUNT(count) \
106 outb(count & 0xff, TC_LSB); \
107 outb((count >> 8) & 0xff, TC_MSB); \
108 outb((count >> 16) & 0xff, TC_HIGH);
109
110 /* Chip commands */
111 #define DMA_OP 0x80
112
113 #define SCSI_NOP 0x00
114 #define FLUSH_FIFO 0x01
115 #define CHIP_RESET 0x02
116 #define SCSI_RESET 0x03
117 #define RESELECT 0x40
118 #define SELECT_NO_ATN 0x41
119 #define SELECT_ATN 0x42
120 #define SELECT_ATN_STOP 0x43
121 #define ENABLE_SEL 0x44
122 #define DISABLE_SEL 0x45
123 #define SELECT_ATN3 0x46
124 #define RESELECT3 0x47
125 #define TRANSFER_INFO 0x10
126 #define INIT_CMD_COMPLETE 0x11
127 #define MSG_ACCEPT 0x12
128 #define TRANSFER_PAD 0x18
129 #define SET_ATN 0x1a
130 #define RESET_ATN 0x1b
131 #define SEND_MSG 0x20
132 #define SEND_STATUS 0x21
133 #define SEND_DATA 0x22
134 #define DISCONN_SEQ 0x23
135 #define TERMINATE_SEQ 0x24
136 #define TARG_CMD_COMPLETE 0x25
137 #define DISCONN 0x27
138 #define RECV_MSG 0x28
139 #define RECV_CMD 0x29
140 #define RECV_DATA 0x2a
141 #define RECV_CMD_SEQ 0x2b
142 #define TARGET_ABORT_DMA 0x04
143
144 /*----------------------------------------------------------------*/
145 /* the following will set the monitor border color (useful to find
146 where something crashed or gets stuck at */
147 /* 1 = blue
148 2 = green
149 3 = cyan
150 4 = red
151 5 = magenta
152 6 = yellow
153 7 = white
154 */
155
156 #if NCR53C406A_DEBUG
157 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
158 #else
159 #define rtrc(i) {}
160 #endif
161 /*----------------------------------------------------------------*/
162
163 enum Phase {
164 idle,
165 data_out,
166 data_in,
167 command_ph,
168 status_ph,
169 message_out,
170 message_in
171 };
172
173 /* Static function prototypes */
174 static void NCR53c406a_intr(int, void *, struct pt_regs *);
175 static void do_NCR53c406a_intr(int, void *, struct pt_regs *);
176 static void internal_done(Scsi_Cmnd *);
177 static void wait_intr(void);
178 static void chip_init(void);
179 static void calc_port_addr(void);
180 #ifndef IRQ_LEV
181 static int irq_probe(void);
182 #endif
183
184 /* ================================================================= */
185
186 #if USE_BIOS
187 static void *bios_base = (void *)0;
188 #endif
189
190 #if PORT_BASE
191 static int port_base = PORT_BASE;
192 #else
193 static int port_base = 0;
194 #endif
195
196 #if IRQ_LEV
197 static int irq_level = IRQ_LEV;
198 #else
199 static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized'*/
200 #endif
201
202 #if USE_DMA
203 static int dma_chan = 0;
204 #endif
205
206 #if USE_PIO
207 static int fast_pio = USE_FAST_PIO;
208 #endif
209
210 static Scsi_Cmnd *current_SC = NULL;
211 static volatile int internal_done_flag = 0;
212 static volatile int internal_done_errcode = 0;
213 static char info_msg[256];
214
215 struct proc_dir_entry proc_scsi_NCR53c406a = {
216 PROC_SCSI_NCR53C406A, 7, "NCR53c406a",
217 S_IFDIR | S_IRUGO | S_IXUGO, 2
218 };
219 /* ================================================================= */
220
221 /* possible BIOS locations */
222 #if USE_BIOS
223 static void *addresses[] = {
224 (void *)0xd8000,
225 (void *)0xc8000
226 };
227 #define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))
228 #endif USE_BIOS
229
230 /* possible i/o port addresses */
231 static unsigned short ports[] =
232 { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
233 #define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))
234
235 /* possible interrupt channels */
236 static unsigned short intrs[] = { 10, 11, 12, 15 };
237 #define INTR_COUNT (sizeof( intrs ) / sizeof( unsigned short ))
238
239 /* signatures for NCR 53c406a based controllers */
240 #if USE_BIOS
241 struct signature {
242 char *signature;
243 int sig_offset;
244 int sig_length;
245 } signatures[] __initdata = {
246 /* 1 2 3 4 5 6 */
247 /* 123456789012345678901234567890123456789012345678901234567890 */
248 { "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82 },
249 };
250 #define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))
251 #endif USE_BIOS
252
253 /* ============================================================ */
254
255 /* Control Register Set 0 */
256 static int TC_LSB; /* transfer counter lsb */
257 static int TC_MSB; /* transfer counter msb */
258 static int SCSI_FIFO; /* scsi fifo register */
259 static int CMD_REG; /* command register */
260 static int STAT_REG; /* status register */
261 static int DEST_ID; /* selection/reselection bus id */
262 static int INT_REG; /* interrupt status register */
263 static int SRTIMOUT; /* select/reselect timeout reg */
264 static int SEQ_REG; /* sequence step register */
265 static int SYNCPRD; /* synchronous transfer period */
266 static int FIFO_FLAGS; /* indicates # of bytes in fifo */
267 static int SYNCOFF; /* synchronous offset register */
268 static int CONFIG1; /* configuration register */
269 static int CLKCONV; /* clock conversion reg */
270 /*static int TESTREG;*/ /* test mode register */
271 static int CONFIG2; /* Configuration 2 Register */
272 static int CONFIG3; /* Configuration 3 Register */
273 static int CONFIG4; /* Configuration 4 Register */
274 static int TC_HIGH; /* Transfer Counter High */
275 /*static int FIFO_BOTTOM;*/ /* Reserve FIFO byte register */
276
277 /* Control Register Set 1 */
278 /*static int JUMPER_SENSE;*/ /* Jumper sense port reg (r/w) */
279 /*static int SRAM_PTR;*/ /* SRAM address pointer reg (r/w) */
280 /*static int SRAM_DATA;*/ /* SRAM data register (r/w) */
281 static int PIO_FIFO; /* PIO FIFO registers (r/w) */
282 /*static int PIO_FIFO1;*/ /* */
283 /*static int PIO_FIFO2;*/ /* */
284 /*static int PIO_FIFO3;*/ /* */
285 static int PIO_STATUS; /* PIO status (r/w) */
286 /*static int ATA_CMD;*/ /* ATA command/status reg (r/w) */
287 /*static int ATA_ERR;*/ /* ATA features/error register (r/w)*/
288 static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */
289 static int CONFIG5; /* Configuration 5 register (r/w) */
290 /*static int SIGNATURE;*/ /* Signature Register (r) */
291 /*static int CONFIG6;*/ /* Configuration 6 register (r) */
292
293 /* ============================================================== */
294
295 #if USE_DMA
296 static __inline__ int
297 NCR53c406a_dma_setup (unsigned char *ptr,
298 unsigned int count,
299 unsigned char mode) {
300 unsigned limit;
301 unsigned long flags = 0;
302
303 VDEB(printk("dma: before count=%d ", count));
304 if (dma_chan <=3) {
305 if (count > 65536)
306 count = 65536;
307 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
308 } else {
309 if (count > (65536<<1))
310 count = (65536<<1);
311 limit = (65536<<1) - (((unsigned) ptr) & 0x1FFFF);
312 }
313
314 if (count > limit) count = limit;
315
316 VDEB(printk("after count=%d\n", count));
317 if ((count & 1) || (((unsigned) ptr) & 1))
318 panic ("NCR53c406a: attempted unaligned DMA transfer\n");
319
320 flags=claim_dma_lock();
321 disable_dma(dma_chan);
322 clear_dma_ff(dma_chan);
323 set_dma_addr(dma_chan, (long) ptr);
324 set_dma_count(dma_chan, count);
325 set_dma_mode(dma_chan, mode);
326 enable_dma(dma_chan);
327 release_dma_lock(flags);
328
329 return count;
330 }
331
332 static __inline__ int
333 NCR53c406a_dma_write(unsigned char *src, unsigned int count) {
334 return NCR53c406a_dma_setup (src, count, DMA_MODE_WRITE);
335 }
336
337 static __inline__ int
338 NCR53c406a_dma_read(unsigned char *src, unsigned int count) {
339 return NCR53c406a_dma_setup (src, count, DMA_MODE_READ);
340 }
341
342 static __inline__ int
343 NCR53c406a_dma_residual (void) {
344 register int tmp;
345 unsigned long flags;
346
347 flags=claim_dma_lock();
348 clear_dma_ff(dma_chan);
349 tmp = get_dma_residue(dma_chan);
350 release_dma_lock(flags);
351
352 return tmp;
353 }
354 #endif USE_DMA
355
356 #if USE_PIO
357 static __inline__ int NCR53c406a_pio_read(unsigned char *request,
358 unsigned int reqlen)
359 {
360 int i;
361 int len; /* current scsi fifo size */
362 unsigned long flags = 0;
363
364 REG1;
365 while (reqlen) {
366 i = inb(PIO_STATUS);
367 /* VDEB(printk("pio_status=%x\n", i)); */
368 if (i & 0x80)
369 return 0;
370
371 switch( i & 0x1e ) {
372 default:
373 case 0x10:
374 len=0; break;
375 case 0x0:
376 len=1; break;
377 case 0x8:
378 len=42; break;
379 case 0xc:
380 len=84; break;
381 case 0xe:
382 len=128; break;
383 }
384
385 if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */
386 return 0;
387 }
388
389 if (len) {
390 if( len > reqlen )
391 len = reqlen;
392
393 save_flags(flags);
394 cli();
395 if( fast_pio && len > 3 ) {
396 insl(PIO_FIFO,request,len>>2);
397 request += len & 0xfc;
398 reqlen -= len & 0xfc;
399 }
400 else {
401 while(len--) {
402 *request++ = inb(PIO_FIFO);
403 reqlen--;
404 }
405 }
406 restore_flags(flags);
407 }
408 }
409 return 0;
410 }
411
412 static __inline__ int NCR53c406a_pio_write(unsigned char *request,
413 unsigned int reqlen)
414 {
415 int i = 0;
416 int len; /* current scsi fifo size */
417 unsigned long flags = 0;
418
419 REG1;
420 while (reqlen && !(i&0x40)) {
421 i = inb(PIO_STATUS);
422 /* VDEB(printk("pio_status=%x\n", i)); */
423 if (i & 0x80) /* error */
424 return 0;
425
426 switch( i & 0x1e ) {
427 case 0x10:
428 len=128; break;
429 case 0x0:
430 len=84; break;
431 case 0x8:
432 len=42; break;
433 case 0xc:
434 len=1; break;
435 default:
436 case 0xe:
437 len=0; break;
438 }
439
440 if (len) {
441 if( len > reqlen )
442 len = reqlen;
443
444 save_flags(flags);
445 cli();
446 if( fast_pio && len > 3 ) {
447 outsl(PIO_FIFO,request,len>>2);
448 request += len & 0xfc;
449 reqlen -= len & 0xfc;
450 }
451 else {
452 while(len--) {
453 outb(*request++, PIO_FIFO);
454 reqlen--;
455 }
456 }
457 restore_flags(flags);
458 }
459 }
460 return 0;
461 }
462 #endif USE_PIO
463
464 int __init
465 NCR53c406a_detect(Scsi_Host_Template * tpnt){
466 struct Scsi_Host *shpnt;
467 #ifndef PORT_BASE
468 int i;
469 #endif
470
471 #if USE_BIOS
472 int ii, jj;
473 bios_base = 0;
474 /* look for a valid signature */
475 for( ii=0; ii < ADDRESS_COUNT && !bios_base; ii++)
476 for( jj=0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
477 if(!memcmp((void *) addresses[ii]+signatures[jj].sig_offset,
478 (void *) signatures[jj].signature,
479 (int) signatures[jj].sig_length))
480 bios_base=addresses[ii];
481
482 if(!bios_base){
483 printk("NCR53c406a: BIOS signature not found\n");
484 return 0;
485 }
486
487 DEB(printk("NCR53c406a BIOS found at %X\n", (unsigned int) bios_base););
488 #endif USE_BIOS
489
490 #ifdef PORT_BASE
491 if (check_region(port_base, 0x10)) /* ports already snatched */
492 port_base = 0;
493
494 #else /* autodetect */
495 if (port_base) { /* LILO override */
496 if (check_region(port_base, 0x10))
497 port_base = 0;
498 }
499 else {
500 for(i=0; i<PORT_COUNT && !port_base; i++){
501 if(check_region(ports[i], 0x10)){
502 DEB(printk("NCR53c406a: port %x in use\n", ports[i]));
503 }
504 else {
505 VDEB(printk("NCR53c406a: port %x available\n", ports[i]));
506 outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */
507 if( (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
508 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
509 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58 ) {
510 VDEB(printk("NCR53c406a: Sig register valid\n"));
511 VDEB(printk("port_base=%x\n", port_base));
512 port_base = ports[i];
513 }
514 }
515 }
516 }
517 #endif PORT_BASE
518
519 if(!port_base){ /* no ports found */
520 printk("NCR53c406a: no available ports found\n");
521 return 0;
522 }
523
524 DEB(printk("NCR53c406a detected\n"));
525
526 calc_port_addr();
527 chip_init();
528
529 #ifndef IRQ_LEV
530 if (irq_level < 0) { /* LILO override if >= 0*/
531 irq_level=irq_probe();
532 if (irq_level < 0) { /* Trouble */
533 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
534 return 0;
535 }
536 }
537 #endif
538
539 DEB(printk("NCR53c406a: using port_base %x\n", port_base));
540 request_region(port_base, 0x10, "NCR53c406a");
541
542 if(irq_level > 0) {
543 if(request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", NULL)){
544 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
545 return 0;
546 }
547 tpnt->can_queue = 1;
548 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
549 }
550 else if (irq_level == 0) {
551 tpnt->can_queue = 0;
552 DEB(printk("NCR53c406a: No interrupts detected\n"));
553 #if USE_DMA
554 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
555 return 0;
556 #endif USE_DMA
557 }
558 else {
559 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
560 return 0;
561 }
562
563 #if USE_DMA
564 dma_chan = DMA_CHAN;
565 if(request_dma(dma_chan, "NCR53c406a") != 0){
566 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
567 return 0;
568 }
569
570 DEB(printk("Allocated DMA channel %d\n", dma_chan));
571 #endif USE_DMA
572
573 tpnt->present = 1;
574 tpnt->proc_dir = &proc_scsi_NCR53c406a;
575
576 shpnt = scsi_register(tpnt, 0);
577 shpnt->irq = irq_level;
578 shpnt->io_port = port_base;
579 shpnt->n_io_port = 0x10;
580 #if USE_DMA
581 shpnt->dma = dma_chan;
582 #endif
583
584 #if USE_DMA
585 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.",
586 port_base, irq_level, dma_chan);
587 #else
588 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.",
589 port_base, irq_level, fast_pio ? "fast" : "slow");
590 #endif
591
592 return (tpnt->present);
593 }
594
595 /* called from init/main.c */
596 void __init NCR53c406a_setup(char *str, int *ints)
597 {
598 static size_t setup_idx = 0;
599 size_t i;
600
601 DEB(printk("NCR53c406a: Setup called\n"););
602
603 if (setup_idx >= PORT_COUNT - 1) {
604 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
605 return;
606 }
607 if (ints[0] < 1 || ints[0] > 3) {
608 printk("NCR53c406a: Malformed command line\n");
609 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
610 return;
611 }
612 for (i = 0; i < PORT_COUNT && !port_base; i++)
613 if (ports[i] == ints[1]) {
614 port_base = ints[1];
615 DEB(printk("NCR53c406a: Specified port_base 0x%X\n", port_base);)
616 }
617 if (!port_base) {
618 printk("NCR53c406a: Invalid PORTBASE 0x%X specified\n", ints[1]);
619 return;
620 }
621
622 if (ints[0] > 1) {
623 if (ints[2] == 0) {
624 irq_level = 0;
625 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);)
626 }
627 else
628 for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
629 if (intrs[i] == ints[2]) {
630 irq_level = ints[2];
631 DEB(printk("NCR53c406a: Specified irq %d\n", port_base);)
632 }
633 if (irq_level < 0)
634 printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
635 }
636
637 if (ints[0] > 2)
638 fast_pio = ints[3];
639
640 DEB(printk("NCR53c406a: port_base=0x%X, irq=%d, fast_pio=%d\n",
641 port_base, irq_level, fast_pio);)
642 }
643
644 const char*
645 NCR53c406a_info(struct Scsi_Host *SChost){
646 DEB(printk("NCR53c406a_info called\n"));
647 return (info_msg);
648 }
649
650 static void internal_done(Scsi_Cmnd *SCpnt) {
651 internal_done_errcode = SCpnt->result;
652 ++internal_done_flag;
653 }
654
655
656 static void wait_intr() {
657 int i = jiffies + WATCHDOG;
658
659 while(time_after(i,jiffies) && !(inb(STAT_REG)&0xe0)) /* wait for a pseudo-interrupt */
660 barrier();
661
662 if (time_before_eq(i,jiffies)) { /* Timed out */
663 rtrc(0);
664 current_SC->result = DID_TIME_OUT << 16;
665 current_SC->SCp.phase = idle;
666 current_SC->scsi_done(current_SC);
667 return;
668 }
669
670 NCR53c406a_intr(0, NULL, NULL);
671 }
672
673 int NCR53c406a_command(Scsi_Cmnd *SCpnt){
674 DEB(printk("NCR53c406a_command called\n"));
675 NCR53c406a_queue(SCpnt, internal_done);
676 if(irq_level)
677 while (!internal_done_flag);
678 else /* interrupts not supported */
679 while (!internal_done_flag)
680 wait_intr();
681
682 internal_done_flag = 0;
683 return internal_done_errcode;
684 }
685
686
687 int
688 NCR53c406a_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)){
689 int i;
690 unsigned long flags = 0;
691
692 VDEB(printk("NCR53c406a_queue called\n"));
693 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n",
694 SCpnt->cmnd[0],
695 SCpnt->cmd_len,
696 SCpnt->target,
697 SCpnt->lun,
698 SCpnt->request_bufflen));
699
700 #if 0
701 VDEB(for(i=0; i<SCpnt->cmd_len; i++)
702 printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
703 VDEB(printk("\n"));
704 #endif
705
706 current_SC = SCpnt;
707 current_SC->scsi_done = done;
708 current_SC->SCp.phase = command_ph;
709 current_SC->SCp.Status = 0;
710 current_SC->SCp.Message = 0;
711
712 save_flags(flags);
713 cli();
714 REG0;
715 outb(SCpnt->target, DEST_ID); /* set destination */
716 outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
717
718 for(i=0; i<SCpnt->cmd_len; i++){
719 outb(SCpnt->cmnd[i], SCSI_FIFO);
720 }
721 outb(SELECT_NO_ATN, CMD_REG);
722 restore_flags(flags);
723
724 rtrc(1);
725 return 0;
726 }
727
728 int
729 NCR53c406a_abort(Scsi_Cmnd *SCpnt){
730 DEB(printk("NCR53c406a_abort called\n"));
731 return SCSI_ABORT_SNOOZE; /* Don't know how to abort */
732 }
733
734 int
735 NCR53c406a_reset(Scsi_Cmnd *SCpnt, unsigned int ignored){
736 DEB(printk("NCR53c406a_reset called\n"));
737 outb(C4_IMG, CONFIG4); /* Select reg set 0 */
738 outb(CHIP_RESET, CMD_REG);
739 outb(SCSI_NOP, CMD_REG); /* required after reset */
740 outb(SCSI_RESET, CMD_REG);
741 chip_init();
742
743 rtrc(2);
744 if (irq_level)
745 return SCSI_RESET_PENDING; /* should get an interrupt */
746 else
747 return SCSI_RESET_WAKEUP; /* won't get any interrupts */
748 }
749
750 int
751 NCR53c406a_biosparm(Scsi_Disk *disk, kdev_t dev, int* info_array){
752 int size;
753
754 DEB(printk("NCR53c406a_biosparm called\n"));
755
756 size = disk->capacity;
757 info_array[0] = 64; /* heads */
758 info_array[1] = 32; /* sectors */
759 info_array[2] = size>>11; /* cylinders */
760 if (info_array[2] > 1024) { /* big disk */
761 info_array[0] = 255;
762 info_array[1] = 63;
763 info_array[2] = size / (255*63);
764 }
765 return 0;
766 }
767
768 static void
769 do_NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){
770 unsigned long flags;
771
772 spin_lock_irqsave(&io_request_lock, flags);
773 NCR53c406a_intr(0, dev_id, regs);
774 spin_unlock_irqrestore(&io_request_lock, flags);
775 }
776
777 static void
778 NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){
779 DEB(unsigned char fifo_size;)
780 DEB(unsigned char seq_reg;)
781 unsigned char status, int_reg;
782 unsigned long flags = 0;
783 #if USE_PIO
784 unsigned char pio_status;
785 struct scatterlist *sglist;
786 unsigned int sgcount;
787 #endif
788
789 VDEB(printk("NCR53c406a_intr called\n"));
790
791 save_flags(flags);
792 cli();
793 #if USE_PIO
794 REG1;
795 pio_status = inb(PIO_STATUS);
796 #endif
797 REG0;
798 status = inb(STAT_REG);
799 DEB(seq_reg = inb(SEQ_REG));
800 int_reg = inb(INT_REG);
801 DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
802 restore_flags(flags);
803
804 #if NCR53C406A_DEBUG
805 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x",
806 status, seq_reg, int_reg, fifo_size);
807 #if (USE_DMA)
808 printk("\n");
809 #else
810 printk(", pio=%02x\n", pio_status);
811 #endif USE_DMA
812 #endif NCR53C406A_DEBUG
813
814 if(int_reg & 0x80){ /* SCSI reset intr */
815 rtrc(3);
816 DEB(printk("NCR53c406a: reset intr received\n"));
817 current_SC->SCp.phase = idle;
818 current_SC->result = DID_RESET << 16;
819 current_SC->scsi_done(current_SC);
820 return;
821 }
822
823 #if USE_PIO
824 if(pio_status & 0x80) {
825 printk("NCR53C406A: Warning: PIO error!\n");
826 current_SC->SCp.phase = idle;
827 current_SC->result = DID_ERROR << 16;
828 current_SC->scsi_done(current_SC);
829 return;
830 }
831 #endif USE_PIO
832
833 if(status & 0x20) { /* Parity error */
834 printk("NCR53c406a: Warning: parity error!\n");
835 current_SC->SCp.phase = idle;
836 current_SC->result = DID_PARITY << 16;
837 current_SC->scsi_done(current_SC);
838 return;
839 }
840
841 if(status & 0x40) { /* Gross error */
842 printk("NCR53c406a: Warning: gross error!\n");
843 current_SC->SCp.phase = idle;
844 current_SC->result = DID_ERROR << 16;
845 current_SC->scsi_done(current_SC);
846 return;
847 }
848
849 if(int_reg & 0x20){ /* Disconnect */
850 DEB(printk("NCR53c406a: disconnect intr received\n"));
851 if(current_SC->SCp.phase != message_in){ /* Unexpected disconnect */
852 current_SC->result = DID_NO_CONNECT << 16;
853 }
854 else{ /* Command complete, return status and message */
855 current_SC->result = (current_SC->SCp.Status & 0xff)
856 | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
857 }
858
859 rtrc(0);
860 current_SC->SCp.phase = idle;
861 current_SC->scsi_done( current_SC );
862 return;
863 }
864
865 switch(status & 0x07){ /* scsi phase */
866 case 0x00: /* DATA-OUT */
867 if(int_reg & 0x10){ /* Target requesting info transfer */
868 rtrc(5);
869 current_SC->SCp.phase = data_out;
870 VDEB(printk("NCR53c406a: Data-Out phase\n"));
871 outb(FLUSH_FIFO, CMD_REG);
872 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
873 #if USE_DMA /* No s/g support for DMA */
874 NCR53c406a_dma_write(current_SC->request_buffer,
875 current_SC->request_bufflen);
876 #endif USE_DMA
877 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
878 #if USE_PIO
879 if (!current_SC->use_sg) /* Don't use scatter-gather */
880 NCR53c406a_pio_write(current_SC->request_buffer,
881 current_SC->request_bufflen);
882 else { /* use scatter-gather */
883 sgcount = current_SC->use_sg;
884 sglist = current_SC->request_buffer;
885 while( sgcount-- ) {
886 NCR53c406a_pio_write(sglist->address, sglist->length);
887 sglist++;
888 }
889 }
890 REG0;
891 #endif USE_PIO
892 }
893 break;
894
895 case 0x01: /* DATA-IN */
896 if(int_reg & 0x10){ /* Target requesting info transfer */
897 rtrc(6);
898 current_SC->SCp.phase = data_in;
899 VDEB(printk("NCR53c406a: Data-In phase\n"));
900 outb(FLUSH_FIFO, CMD_REG);
901 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
902 #if USE_DMA /* No s/g support for DMA */
903 NCR53c406a_dma_read(current_SC->request_buffer,
904 current_SC->request_bufflen);
905 #endif USE_DMA
906 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
907 #if USE_PIO
908 if (!current_SC->use_sg) /* Don't use scatter-gather */
909 NCR53c406a_pio_read(current_SC->request_buffer,
910 current_SC->request_bufflen);
911 else { /* Use scatter-gather */
912 sgcount = current_SC->use_sg;
913 sglist = current_SC->request_buffer;
914 while( sgcount-- ) {
915 NCR53c406a_pio_read(sglist->address, sglist->length);
916 sglist++;
917 }
918 }
919 REG0;
920 #endif USE_PIO
921 }
922 break;
923
924 case 0x02: /* COMMAND */
925 current_SC->SCp.phase = command_ph;
926 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
927 break;
928
929 case 0x03: /* STATUS */
930 rtrc(7);
931 current_SC->SCp.phase = status_ph;
932 VDEB(printk("NCR53c406a: Status phase\n"));
933 outb(FLUSH_FIFO, CMD_REG);
934 outb(INIT_CMD_COMPLETE, CMD_REG);
935 break;
936
937 case 0x04: /* Reserved */
938 case 0x05: /* Reserved */
939 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
940 break;
941
942 case 0x06: /* MESSAGE-OUT */
943 DEB(printk("NCR53c406a: Message-Out phase\n"));
944 current_SC->SCp.phase = message_out;
945 outb(SET_ATN, CMD_REG); /* Reject the message */
946 outb(MSG_ACCEPT, CMD_REG);
947 break;
948
949 case 0x07: /* MESSAGE-IN */
950 rtrc(4);
951 VDEB(printk("NCR53c406a: Message-In phase\n"));
952 current_SC->SCp.phase = message_in;
953
954 current_SC->SCp.Status = inb(SCSI_FIFO);
955 current_SC->SCp.Message = inb(SCSI_FIFO);
956
957 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
958 DEB(printk("Status = %02x Message = %02x\n",
959 current_SC->SCp.Status, current_SC->SCp.Message));
960
961 if(current_SC->SCp.Message == SAVE_POINTERS ||
962 current_SC->SCp.Message == DISCONNECT) {
963 outb(SET_ATN, CMD_REG); /* Reject message */
964 DEB(printk("Discarding SAVE_POINTERS message\n"));
965 }
966 outb(MSG_ACCEPT, CMD_REG);
967 break;
968 }
969 }
970
971 #ifndef IRQ_LEV
972 static int irq_probe()
973 {
974 int irqs, irq;
975 int i;
976
977 inb(INT_REG); /* clear the interrupt register */
978 irqs = probe_irq_on();
979
980 /* Invalid command will cause an interrupt */
981 REG0;
982 outb(0xff, CMD_REG);
983
984 /* Wait for the interrupt to occur */
985 i = jiffies + WATCHDOG;
986 while(time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
987 barrier();
988 if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */
989 probe_irq_off(irqs);
990 return -1;
991 }
992
993 irq = probe_irq_off(irqs);
994
995 /* Kick the chip */
996 outb(CHIP_RESET, CMD_REG);
997 outb(SCSI_NOP, CMD_REG);
998 chip_init();
999
1000 return irq;
1001 }
1002 #endif IRQ_LEV
1003
1004 static void chip_init()
1005 {
1006 REG1;
1007 #if USE_DMA
1008 outb(0x00, PIO_STATUS);
1009 #else /* USE_PIO */
1010 outb(0x01, PIO_STATUS);
1011 #endif
1012 outb(0x00, PIO_FLAG);
1013
1014 outb(C4_IMG, CONFIG4); /* REG0; */
1015 outb(C3_IMG, CONFIG3);
1016 outb(C2_IMG, CONFIG2);
1017 outb(C1_IMG, CONFIG1);
1018
1019 outb(0x05, CLKCONV); /* clock conversion factor */
1020 outb(0x9C, SRTIMOUT); /* Selection timeout */
1021 outb(0x05, SYNCPRD); /* Synchronous transfer period */
1022 outb(SYNC_MODE, SYNCOFF); /* synchronous mode */
1023 }
1024
1025 void __init calc_port_addr(void)
1026 {
1027 /* Control Register Set 0 */
1028 TC_LSB = (port_base+0x00);
1029 TC_MSB = (port_base+0x01);
1030 SCSI_FIFO = (port_base+0x02);
1031 CMD_REG = (port_base+0x03);
1032 STAT_REG = (port_base+0x04);
1033 DEST_ID = (port_base+0x04);
1034 INT_REG = (port_base+0x05);
1035 SRTIMOUT = (port_base+0x05);
1036 SEQ_REG = (port_base+0x06);
1037 SYNCPRD = (port_base+0x06);
1038 FIFO_FLAGS = (port_base+0x07);
1039 SYNCOFF = (port_base+0x07);
1040 CONFIG1 = (port_base+0x08);
1041 CLKCONV = (port_base+0x09);
1042 /* TESTREG = (port_base+0x0A); */
1043 CONFIG2 = (port_base+0x0B);
1044 CONFIG3 = (port_base+0x0C);
1045 CONFIG4 = (port_base+0x0D);
1046 TC_HIGH = (port_base+0x0E);
1047 /* FIFO_BOTTOM = (port_base+0x0F); */
1048
1049 /* Control Register Set 1 */
1050 /* JUMPER_SENSE = (port_base+0x00);*/
1051 /* SRAM_PTR = (port_base+0x01);*/
1052 /* SRAM_DATA = (port_base+0x02);*/
1053 PIO_FIFO = (port_base+0x04);
1054 /* PIO_FIFO1 = (port_base+0x05);*/
1055 /* PIO_FIFO2 = (port_base+0x06);*/
1056 /* PIO_FIFO3 = (port_base+0x07);*/
1057 PIO_STATUS = (port_base+0x08);
1058 /* ATA_CMD = (port_base+0x09);*/
1059 /* ATA_ERR = (port_base+0x0A);*/
1060 PIO_FLAG = (port_base+0x0B);
1061 CONFIG5 = (port_base+0x0D);
1062 /* SIGNATURE = (port_base+0x0E);*/
1063 /* CONFIG6 = (port_base+0x0F);*/
1064 }
1065
1066 #ifdef MODULE
1067 /* Eventually this will go into an include file, but this will be later */
1068 Scsi_Host_Template driver_template = NCR53c406a;
1069
1070 #include "scsi_module.c"
1071 #endif
1072
1073 /*
1074 * Overrides for Emacs so that we get a uniform tabbing style.
1075 * Emacs will notice this stuff at the end of the file and automatically
1076 * adjust the settings for this buffer only. This must remain at the end
1077 * of the file.
1078 * ---------------------------------------------------------------------------
1079 * Local variables:
1080 * c-indent-level: 4
1081 * c-brace-imaginary-offset: 0
1082 * c-brace-offset: -4
1083 * c-argdecl-indent: 4
1084 * c-label-offset: -4
1085 * c-continued-statement-offset: 4
1086 * c-continued-brace-offset: 0
1087 * indent-tabs-mode: nil
1088 * tab-width: 8
1089 * End:
1090 */
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