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Import 2.3.18pre1
[davej-history.git] / arch / sparc / kernel / sun4m_smp.c
blobb9990ce0d198b61f190114deace8d4c6e7021a86
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
5
6 #include <asm/head.h>
7
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/smp_lock.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/init.h>
16 #include <linux/spinlock.h>
17
18 #include <asm/ptrace.h>
19 #include <asm/atomic.h>
20
21 #include <asm/delay.h>
22 #include <asm/irq.h>
23 #include <asm/page.h>
24 #include <asm/pgtable.h>
25 #include <asm/oplib.h>
26 #include <asm/atops.h>
27 #include <asm/hardirq.h>
28 #include <asm/softirq.h>
29
30 #define __KERNEL_SYSCALLS__
31 #include <linux/unistd.h>
32
33 #define IRQ_RESCHEDULE 13
34 #define IRQ_STOP_CPU 14
35 #define IRQ_CROSS_CALL 15
36
37 extern ctxd_t *srmmu_ctx_table_phys;
38 extern int linux_num_cpus;
39
40 extern void calibrate_delay(void);
41
42 extern struct task_struct *current_set[NR_CPUS];
43 extern volatile int smp_processors_ready;
44 extern unsigned long cpu_present_map;
45 extern int smp_num_cpus;
46 extern int smp_threads_ready;
47 extern unsigned char mid_xlate[NR_CPUS];
48 extern volatile unsigned long cpu_callin_map[NR_CPUS];
49 extern unsigned long smp_proc_in_lock[NR_CPUS];
50 extern struct cpuinfo_sparc cpu_data[NR_CPUS];
51 extern unsigned long cpu_offset[NR_CPUS];
52 extern unsigned char boot_cpu_id;
53 extern int smp_activated;
54 extern volatile int cpu_number_map[NR_CPUS];
55 extern volatile int __cpu_logical_map[NR_CPUS];
56 extern volatile unsigned long ipi_count;
57 extern volatile int smp_process_available;
58 extern volatile int smp_commenced;
59 extern int __smp4m_processor_id(void);
60
61 /*#define SMP_DEBUG*/
62
63 #ifdef SMP_DEBUG
64 #define SMP_PRINTK(x) printk x
65 #else
66 #define SMP_PRINTK(x)
67 #endif
68
69 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
70 {
71 __asm__ __volatile__("swap [%1], %0\n\t" :
72 "=&r" (val), "=&r" (ptr) :
73 "0" (val), "1" (ptr));
74 return val;
75 }
76
77 static void smp_setup_percpu_timer(void);
78 extern void cpu_probe(void);
79
80 void __init smp4m_callin(void)
81 {
82 int cpuid = hard_smp_processor_id();
83
84 local_flush_cache_all();
85 local_flush_tlb_all();
86 set_irq_udt(mid_xlate[boot_cpu_id]);
87
88 /* Get our local ticker going. */
89 smp_setup_percpu_timer();
90
91 calibrate_delay();
92 smp_store_cpu_info(cpuid);
93 local_flush_cache_all();
94 local_flush_tlb_all();
95
96 /* Allow master to continue. */
97 swap((unsigned long *)&cpu_callin_map[cpuid], 1);
98 local_flush_cache_all();
99 local_flush_tlb_all();
100
101 cpu_probe();
102
103 while(!task[cpuid] || current_set[cpuid] != task[cpuid])
104 barrier();
105
106 /* Fix idle thread fields. */
107 __asm__ __volatile__("ld [%0], %%g6\n\t"
108 : : "r" (&current_set[cpuid])
109 : "memory" /* paranoid */);
110 current->mm->mmap->vm_page_prot = PAGE_SHARED;
111 current->mm->mmap->vm_start = PAGE_OFFSET;
112 current->mm->mmap->vm_end = init_mm.mmap->vm_end;
113
114 while(!smp_commenced)
115 barrier();
116
117 local_flush_cache_all();
118 local_flush_tlb_all();
119
120 __sti();
121 }
122
123 extern int cpu_idle(void *unused);
124 extern void init_IRQ(void);
125 extern void cpu_panic(void);
126 extern int start_secondary(void *unused);
127
128 /*
129 * Cycle through the processors asking the PROM to start each one.
130 */
131
132 extern struct prom_cpuinfo linux_cpus[NR_CPUS];
133 extern struct linux_prom_registers smp_penguin_ctable;
134 extern unsigned long trapbase_cpu1[];
135 extern unsigned long trapbase_cpu2[];
136 extern unsigned long trapbase_cpu3[];
137
138 void __init smp4m_boot_cpus(void)
139 {
140 int cpucount = 0;
141 int i = 0;
142 int first, prev;
143
144 printk("Entering SMP Mode...\n");
145
146 for (i = 0; i < NR_CPUS; i++)
147 cpu_offset[i] = (char *)&cpu_data[i] - (char *)&cpu_data;
148
149 __sti();
150 cpu_present_map = 0;
151 for(i=0; i < linux_num_cpus; i++)
152 cpu_present_map |= (1<<i);
153 for(i=0; i < NR_CPUS; i++)
154 cpu_number_map[i] = -1;
155 for(i=0; i < NR_CPUS; i++)
156 __cpu_logical_map[i] = -1;
157 mid_xlate[boot_cpu_id] = (linux_cpus[boot_cpu_id].mid & ~8);
158 cpu_number_map[boot_cpu_id] = 0;
159 __cpu_logical_map[0] = boot_cpu_id;
160 current->processor = boot_cpu_id;
161 smp_store_cpu_info(boot_cpu_id);
162 set_irq_udt(mid_xlate[boot_cpu_id]);
163 smp_setup_percpu_timer();
164 init_idle();
165 local_flush_cache_all();
166 if(linux_num_cpus == 1)
167 return; /* Not an MP box. */
168 for(i = 0; i < NR_CPUS; i++) {
169 if(i == boot_cpu_id)
170 continue;
171
172 if(cpu_present_map & (1 << i)) {
173 extern unsigned long sun4m_cpu_startup;
174 unsigned long *entry = &sun4m_cpu_startup;
175 struct task_struct *p;
176 int timeout;
177
178 /* Cook up an idler for this guy. */
179 kernel_thread(start_secondary, NULL, CLONE_PID);
180
181 p = task[++cpucount];
182
183 p->processor = i;
184 p->has_cpu = 1; /* we schedule the first task manually */
185 current_set[i] = p;
186
187 /* See trampoline.S for details... */
188 entry += ((i-1) * 3);
189
190 /*
191 * Initialize the contexts table
192 * Since the call to prom_startcpu() trashes the structure,
193 * we need to re-initialize it for each cpu
194 */
195 smp_penguin_ctable.which_io = 0;
196 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
197 smp_penguin_ctable.reg_size = 0;
198
199 /* whirrr, whirrr, whirrrrrrrrr... */
200 printk("Starting CPU %d at %p\n", i, entry);
201 mid_xlate[i] = (linux_cpus[i].mid & ~8);
202 local_flush_cache_all();
203 prom_startcpu(linux_cpus[i].prom_node,
204 &smp_penguin_ctable, 0, (char *)entry);
205
206 /* wheee... it's going... */
207 for(timeout = 0; timeout < 10000; timeout++) {
208 if(cpu_callin_map[i])
209 break;
210 udelay(200);
211 }
212 if(cpu_callin_map[i]) {
213 /* Another "Red Snapper". */
214 cpu_number_map[i] = i;
215 __cpu_logical_map[i] = i;
216 } else {
217 cpucount--;
218 printk("Processor %d is stuck.\n", i);
219 }
220 }
221 if(!(cpu_callin_map[i])) {
222 cpu_present_map &= ~(1 << i);
223 cpu_number_map[i] = -1;
224 }
225 }
226 local_flush_cache_all();
227 if(cpucount == 0) {
228 printk("Error: only one Processor found.\n");
229 cpu_present_map = (1 << smp_processor_id());
230 } else {
231 unsigned long bogosum = 0;
232 for(i = 0; i < NR_CPUS; i++) {
233 if(cpu_present_map & (1 << i))
234 bogosum += cpu_data[i].udelay_val;
235 }
236 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
237 cpucount + 1,
238 (bogosum + 2500)/500000,
239 ((bogosum + 2500)/5000)%100);
240 smp_activated = 1;
241 smp_num_cpus = cpucount + 1;
242 }
243
244 /* Setup CPU list for IRQ distribution scheme. */
245 first = prev = -1;
246 for(i = 0; i < NR_CPUS; i++) {
247 if(cpu_present_map & (1 << i)) {
248 if(first == -1)
249 first = i;
250 if(prev != -1)
251 cpu_data[prev].next = i;
252 cpu_data[i].mid = mid_xlate[i];
253 prev = i;
254 }
255 }
256 cpu_data[prev].next = first;
257
258 /* Free unneeded trap tables */
259
260 if (!(cpu_present_map & (1 << 1))) {
261 mem_map[MAP_NR((unsigned long)trapbase_cpu1)].flags &= ~(1 << PG_reserved);
262 free_page((unsigned long)trapbase_cpu1);
263 }
264 if (!(cpu_present_map & (1 << 2))) {
265 mem_map[MAP_NR((unsigned long)trapbase_cpu2)].flags &= ~(1 << PG_reserved);
266 free_page((unsigned long)trapbase_cpu2);
267 }
268 if (!(cpu_present_map & (1 << 3))) {
269 mem_map[MAP_NR((unsigned long)trapbase_cpu3)].flags &= ~(1 << PG_reserved);
270 free_page((unsigned long)trapbase_cpu3);
271 }
272
273 /* Ok, they are spinning and ready to go. */
274 smp_processors_ready = 1;
275 }
276
277 /* At each hardware IRQ, we get this called to forward IRQ reception
278 * to the next processor. The caller must disable the IRQ level being
279 * serviced globally so that there are no double interrupts received.
280 */
281 void smp4m_irq_rotate(int cpu)
282 {
283 if(smp_processors_ready)
284 set_irq_udt(cpu_data[cpu_data[cpu].next].mid);
285 }
286
287 /* Cross calls, in order to work efficiently and atomically do all
288 * the message passing work themselves, only stopcpu and reschedule
289 * messages come through here.
290 */
291 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
292 {
293 static unsigned long smp_cpu_in_msg[NR_CPUS];
294 unsigned long mask;
295 int me = smp_processor_id();
296 int irq, i;
297
298 if(msg == MSG_RESCHEDULE) {
299 irq = IRQ_RESCHEDULE;
300
301 if(smp_cpu_in_msg[me])
302 return;
303 } else if(msg == MSG_STOP_CPU) {
304 irq = IRQ_STOP_CPU;
305 } else {
306 goto barf;
307 }
308
309 smp_cpu_in_msg[me]++;
310 if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
311 mask = cpu_present_map;
312 if(target == MSG_ALL_BUT_SELF)
313 mask &= ~(1 << me);
314 for(i = 0; i < 4; i++) {
315 if(mask & (1 << i))
316 set_cpu_int(mid_xlate[i], irq);
317 }
318 } else {
319 set_cpu_int(mid_xlate[target], irq);
320 }
321 smp_cpu_in_msg[me]--;
322
323 return;
324 barf:
325 printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
326 panic("Bogon SMP message pass.");
327 }
328
329 static struct smp_funcall {
330 smpfunc_t func;
331 unsigned long arg1;
332 unsigned long arg2;
333 unsigned long arg3;
334 unsigned long arg4;
335 unsigned long arg5;
336 unsigned long processors_in[NR_CPUS]; /* Set when ipi entered. */
337 unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
338 } ccall_info;
339
340 static spinlock_t cross_call_lock = SPIN_LOCK_UNLOCKED;
341
342 /* Cross calls must be serialized, at least currently. */
343 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
344 unsigned long arg3, unsigned long arg4, unsigned long arg5)
345 {
346 if(smp_processors_ready) {
347 register int ncpus = smp_num_cpus;
348 unsigned long flags;
349
350 spin_lock_irqsave(&cross_call_lock, flags);
351
352 /* Init function glue. */
353 ccall_info.func = func;
354 ccall_info.arg1 = arg1;
355 ccall_info.arg2 = arg2;
356 ccall_info.arg3 = arg3;
357 ccall_info.arg4 = arg4;
358 ccall_info.arg5 = arg5;
359
360 /* Init receive/complete mapping, plus fire the IPI's off. */
361 {
362 register unsigned long mask;
363 register int i;
364
365 mask = (cpu_present_map & ~(1 << smp_processor_id()));
366 for(i = 0; i < ncpus; i++) {
367 if(mask & (1 << i)) {
368 ccall_info.processors_in[i] = 0;
369 ccall_info.processors_out[i] = 0;
370 set_cpu_int(mid_xlate[i], IRQ_CROSS_CALL);
371 } else {
372 ccall_info.processors_in[i] = 1;
373 ccall_info.processors_out[i] = 1;
374 }
375 }
376 }
377
378 /* First, run local copy. */
379 func(arg1, arg2, arg3, arg4, arg5);
380
381 {
382 register int i;
383
384 i = 0;
385 do {
386 while(!ccall_info.processors_in[i])
387 barrier();
388 } while(++i < ncpus);
389
390 i = 0;
391 do {
392 while(!ccall_info.processors_out[i])
393 barrier();
394 } while(++i < ncpus);
395 }
396
397 spin_unlock_irqrestore(&cross_call_lock, flags);
398 } else
399 func(arg1, arg2, arg3, arg4, arg5); /* Just need to run local copy. */
400 }
401
402 /* Running cross calls. */
403 void smp4m_cross_call_irq(void)
404 {
405 int i = smp_processor_id();
406
407 ccall_info.processors_in[i] = 1;
408 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
409 ccall_info.arg4, ccall_info.arg5);
410 ccall_info.processors_out[i] = 1;
411 }
412
413 /* Protects counters touched during level14 ticker */
414 static spinlock_t ticker_lock = SPIN_LOCK_UNLOCKED;
415
416 /* 32-bit Sparc specific profiling function. */
417 static inline void sparc_do_profile(unsigned long pc)
418 {
419 if(prof_buffer && current->pid) {
420 extern int _stext;
421
422 pc -= (unsigned long) &_stext;
423 pc >>= prof_shift;
424
425 spin_lock(&ticker_lock);
426 if(pc < prof_len)
427 prof_buffer[pc]++;
428 else
429 prof_buffer[prof_len - 1]++;
430 spin_unlock(&ticker_lock);
431 }
432 }
433
434 extern unsigned int prof_multiplier[NR_CPUS];
435 extern unsigned int prof_counter[NR_CPUS];
436
437 extern void update_one_process(struct task_struct *p, unsigned long ticks,
438 unsigned long user, unsigned long system,
439 int cpu);
440
441 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
442 {
443 int cpu = smp_processor_id();
444
445 clear_profile_irq(mid_xlate[cpu]);
446
447 if(!user_mode(regs))
448 sparc_do_profile(regs->pc);
449
450 if(!--prof_counter[cpu]) {
451 int user = user_mode(regs);
452
453 irq_enter(cpu, 0);
454 if(current->pid) {
455 update_one_process(current, 1, user, !user, cpu);
456
457 if(--current->counter <= 0) {
458 current->counter = 0;
459 current->need_resched = 1;
460 }
461
462 if(user) {
463 if(current->priority < DEF_PRIORITY) {
464 kstat.cpu_nice++;
465 kstat.per_cpu_nice[cpu]++;
466 } else {
467 kstat.cpu_user++;
468 kstat.per_cpu_user[cpu]++;
469 }
470 } else {
471 kstat.cpu_system++;
472 kstat.per_cpu_system[cpu]++;
473 }
474 }
475 prof_counter[cpu] = prof_multiplier[cpu];
476 irq_exit(cpu, 0);
477 }
478 }
479
480 extern unsigned int lvl14_resolution;
481
482 static void __init smp_setup_percpu_timer(void)
483 {
484 int cpu = smp_processor_id();
485
486 prof_counter[cpu] = prof_multiplier[cpu] = 1;
487 load_profile_irq(mid_xlate[cpu], lvl14_resolution);
488
489 if(cpu == boot_cpu_id)
490 enable_pil_irq(14);
491 }
492
493 void __init smp4m_blackbox_id(unsigned *addr)
494 {
495 int rd = *addr & 0x3e000000;
496 int rs1 = rd >> 11;
497
498 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
499 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
500 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
501 }
502
503 void __init smp4m_blackbox_current(unsigned *addr)
504 {
505 int rd = *addr & 0x3e000000;
506 int rs1 = rd >> 11;
507
508 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
509 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
510 addr[4] = 0x8008200c | rd | rs1; /* and reg, 3, reg */
511 }
512
513 void __init sun4m_init_smp(void)
514 {
515 BTFIXUPSET_BLACKBOX(smp_processor_id, smp4m_blackbox_id);
516 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
517 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
518 BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
519 BTFIXUPSET_CALL(__smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
520 }
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