1 /******************************************************************************
3 * Name: actbl64.h - ACPI tables specific to IA64
6 *****************************************************************************/
9 * Copyright (C) 2000 R. Byron Moore
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 typedef UINT64 IO_ADDRESS
; /* Only for clarity in declarations */
33 /* IA64 Root System Description Table */
37 ACPI_TABLE_HEADER header
; /* Table header */
38 u32 reserved_pad
; /* IA64 alignment, must be 0 */
39 void *table_offset_entry
[1]; /* Array of pointers to other */
41 } ROOT_SYSTEM_DESCRIPTION_TABLE
;
44 /* IA64 Firmware ACPI Control Structure */
48 NATIVE_CHAR signature
[4]; /* signature "FACS" */
49 u32 length
; /* length of structure, in bytes */
50 u32 hardware_signature
; /* hardware configuration signature */
51 u32 reserved4
; /* must be 0 */
52 UINT64 firmware_waking_vector
; /* ACPI OS waking vector */
53 UINT64 global_lock
; /* Global Lock */
54 u32 S4_bios_f
: 1; /* Indicates if S4_bIOS support is present */
55 u32 reserved1
: 31; /* must be 0 */
56 u8 resverved3
[28]; /* reserved - must be zero */
58 } FIRMWARE_ACPI_CONTROL_STRUCTURE
;
61 /* IA64 Fixed ACPI Description Table */
65 ACPI_TABLE_HEADER header
; /* table header */
66 u32 reserved_pad
; /* IA64 alignment, must be 0 */
67 ACPI_TBLPTR firmware_ctrl
; /* Physical address of FACS */
68 ACPI_TBLPTR dsdt
; /* Physical address of DSDT */
69 u8 model
; /* System Interrupt Model */
70 u8 address_space
; /* Address Space Bitmask */
71 u16 sci_int
; /* System vector of SCI interrupt */
72 u8 acpi_enable
; /* value to write to smi_cmd to enable ACPI */
73 u8 acpi_disable
; /* value to write to smi_cmd to disable ACPI */
74 u8 S4_bios_req
; /* Value to write to SMI CMD to enter S4_bIOS state */
75 u8 reserved2
; /* reserved - must be zero */
76 UINT64 smi_cmd
; /* Port address of SMI command port */
77 UINT64 pm1a_evt_blk
; /* Port address of Power Mgt 1a Acpi_event Reg Blk */
78 UINT64 pm1b_evt_blk
; /* Port address of Power Mgt 1b Acpi_event Reg Blk */
79 UINT64 pm1a_cnt_blk
; /* Port address of Power Mgt 1a Control Reg Blk */
80 UINT64 pm1b_cnt_blk
; /* Port address of Power Mgt 1b Control Reg Blk */
81 UINT64 pm2_cnt_blk
; /* Port address of Power Mgt 2 Control Reg Blk */
82 UINT64 pm_tmr_blk
; /* Port address of Power Mgt Timer Ctrl Reg Blk */
83 UINT64 gpe0blk
; /* Port addr of General Purpose Acpi_event 0 Reg Blk */
84 UINT64 gpe1_blk
; /* Port addr of General Purpose Acpi_event 1 Reg Blk */
85 u8 pm1_evt_len
; /* Byte Length of ports at pm1_x_evt_blk */
86 u8 pm1_cnt_len
; /* Byte Length of ports at pm1_x_cnt_blk */
87 u8 pm2_cnt_len
; /* Byte Length of ports at pm2_cnt_blk */
88 u8 pm_tm_len
; /* Byte Length of ports at pm_tm_blk */
89 u8 gpe0blk_len
; /* Byte Length of ports at gpe0_blk */
90 u8 gpe1_blk_len
; /* Byte Length of ports at gpe1_blk */
91 u8 gpe1_base
; /* offset in gpe model where gpe1 events start */
92 u8 reserved3
; /* reserved */
93 u16 plvl2_lat
; /* worst case HW latency to enter/exit C2 state */
94 u16 plvl3_lat
; /* worst case HW latency to enter/exit C3 state */
95 u8 day_alrm
; /* index to day-of-month alarm in RTC CMOS RAM */
96 u8 mon_alrm
; /* index to month-of-year alarm in RTC CMOS RAM */
97 u8 century
; /* index to century in RTC CMOS RAM */
98 u8 reserved4
; /* reserved */
99 u32 flush_cash
: 1; /* PAL_FLUSH_CACHE is correctly supported */
100 u32 reserved5
: 1; /* reserved - must be zero */
101 u32 proc_c1
: 1; /* all processors support C1 state */
102 u32 plvl2_up
: 1; /* C2 state works on MP system */
103 u32 pwr_button
: 1; /* Power button is handled as a generic feature */
104 u32 sleep_button
: 1; /* Sleep button is handled as a generic feature, or not present */
105 u32 fixed_rTC
: 1; /* RTC wakeup stat not in fixed register space */
106 u32 rtcs4
: 1; /* RTC wakeup stat not possible from S4 */
107 u32 tmr_val_ext
: 1; /* tmr_val is 32 bits */
108 u32 dock_cap
: 1; /* Supports Docking */
109 u32 reserved6
: 22; /* reserved - must be zero */
111 } FIXED_ACPI_DESCRIPTION_TABLE
;
114 #endif /* __ACTBL64_H__ */