arch/arm-cortex-m0/include/sched.h

   1 #ifndef _ARCH_SCHED_H_
   2 #define _ARCH_SCHED_H_
   3
   4 #include <types.h>
   5
   6 struct task_context {
   7         u32 psp;
   8         /* registers (r0-3, r12, lr, pc, xPSR) are saved on stack on exception entry
   9          * afterwards we manually save r4-11 */
  10 };
  11
  12
  13 static inline u32 ms2ticks(u32 msecs)
  14 {
  15         return msecs * (CONFIG_FCPU/1000);
  16 }
  17
  18 static inline u32 ticks2ms(u32 ticks)
  19 {
  20         return (ticks+CONFIG_FCPU/1000-1) / (CONFIG_FCPU/1000);
  21 }
  22
  23 #define MSEC_IN_TICKSOVF ((u32)((0x100000000LL + CONFIG_FCPU/1000-1) / (CONFIG_FCPU/1000)))
  24
  25 #endif