Add support for the Z80 processor family
[binutils.git] / opcodes / avr-dis.c
blob15300844183c74810969c8733a39bcfd3f0097bd
1 /* Disassemble AVR instructions.
2 Copyright 1999, 2000, 2002, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20 #include <assert.h>
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24 #include "libiberty.h"
26 struct avr_opcodes_s
28 char *name;
29 char *constraints;
30 char *opcode;
31 int insn_size; /* In words. */
32 int isa;
33 unsigned int bin_opcode;
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
39 const struct avr_opcodes_s avr_opcodes[] =
41 #include "opcode/avr.h"
42 {NULL, NULL, NULL, 0, 0, 0}
45 static int
46 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
47 char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
49 int ok = 1;
50 *sym = 0;
52 switch (constraint)
54 /* Any register operand. */
55 case 'r':
56 if (regs)
57 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register. */
58 else
59 insn = (insn & 0x01f0) >> 4; /* Destination register. */
61 sprintf (buf, "r%d", insn);
62 break;
64 case 'd':
65 if (regs)
66 sprintf (buf, "r%d", 16 + (insn & 0xf));
67 else
68 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
69 break;
71 case 'w':
72 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
73 break;
75 case 'a':
76 if (regs)
77 sprintf (buf, "r%d", 16 + (insn & 7));
78 else
79 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
80 break;
82 case 'v':
83 if (regs)
84 sprintf (buf, "r%d", (insn & 0xf) * 2);
85 else
86 sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
87 break;
89 case 'e':
91 char *xyz;
93 switch (insn & 0x100f)
95 case 0x0000: xyz = "Z"; break;
96 case 0x1001: xyz = "Z+"; break;
97 case 0x1002: xyz = "-Z"; break;
98 case 0x0008: xyz = "Y"; break;
99 case 0x1009: xyz = "Y+"; break;
100 case 0x100a: xyz = "-Y"; break;
101 case 0x100c: xyz = "X"; break;
102 case 0x100d: xyz = "X+"; break;
103 case 0x100e: xyz = "-X"; break;
104 default: xyz = "??"; ok = 0;
106 sprintf (buf, xyz);
108 if (AVR_UNDEF_P (insn))
109 sprintf (comment, _("undefined"));
111 break;
113 case 'z':
114 *buf++ = 'Z';
115 if (insn & 0x1)
116 *buf++ = '+';
117 *buf = '\0';
118 if (AVR_UNDEF_P (insn))
119 sprintf (comment, _("undefined"));
120 break;
122 case 'b':
124 unsigned int x;
126 x = (insn & 7);
127 x |= (insn >> 7) & (3 << 3);
128 x |= (insn >> 8) & (1 << 5);
130 if (insn & 0x8)
131 *buf++ = 'Y';
132 else
133 *buf++ = 'Z';
134 sprintf (buf, "+%d", x);
135 sprintf (comment, "0x%02x", x);
137 break;
139 case 'h':
140 *sym = 1;
141 *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
142 sprintf (buf, "0x");
143 break;
145 case 'L':
147 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
148 sprintf (buf, ".%+-8d", rel_addr);
149 *sym = 1;
150 *sym_addr = pc + 2 + rel_addr;
151 sprintf (comment, "0x");
153 break;
155 case 'l':
157 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
158 sprintf (buf, ".%+-8d", rel_addr);
159 *sym = 1;
160 *sym_addr = pc + 2 + rel_addr;
161 sprintf (comment, "0x");
163 break;
165 case 'i':
166 sprintf (buf, "0x%04X", insn2);
167 break;
169 case 'M':
170 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
171 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
172 break;
174 case 'n':
175 sprintf (buf, "??");
176 fprintf (stderr, _("Internal disassembler error"));
177 ok = 0;
178 break;
180 case 'K':
182 unsigned int x;
184 x = (insn & 0xf) | ((insn >> 2) & 0x30);
185 sprintf (buf, "0x%02x", x);
186 sprintf (comment, "%d", x);
188 break;
190 case 's':
191 sprintf (buf, "%d", insn & 7);
192 break;
194 case 'S':
195 sprintf (buf, "%d", (insn >> 4) & 7);
196 break;
198 case 'P':
200 unsigned int x;
202 x = (insn & 0xf);
203 x |= (insn >> 5) & 0x30;
204 sprintf (buf, "0x%02x", x);
205 sprintf (comment, "%d", x);
207 break;
209 case 'p':
211 unsigned int x;
213 x = (insn >> 3) & 0x1f;
214 sprintf (buf, "0x%02x", x);
215 sprintf (comment, "%d", x);
217 break;
219 case '?':
220 *buf = '\0';
221 break;
223 default:
224 sprintf (buf, "??");
225 fprintf (stderr, _("unknown constraint `%c'"), constraint);
226 ok = 0;
229 return ok;
232 static unsigned short
233 avrdis_opcode (bfd_vma addr, disassemble_info *info)
235 bfd_byte buffer[2];
236 int status;
238 status = info->read_memory_func (addr, buffer, 2, info);
240 if (status == 0)
241 return bfd_getl16 (buffer);
243 info->memory_error_func (status, addr, info);
244 return -1;
249 print_insn_avr (bfd_vma addr, disassemble_info *info)
251 unsigned int insn, insn2;
252 const struct avr_opcodes_s *opcode;
253 static unsigned int *maskptr;
254 void *stream = info->stream;
255 fprintf_ftype prin = info->fprintf_func;
256 static unsigned int *avr_bin_masks;
257 static int initialized;
258 int cmd_len = 2;
259 int ok = 0;
260 char op1[20], op2[20], comment1[40], comment2[40];
261 int sym_op1 = 0, sym_op2 = 0;
262 bfd_vma sym_addr1, sym_addr2;
264 if (!initialized)
266 unsigned int nopcodes;
268 nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
270 avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
272 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
273 opcode->name;
274 opcode++, maskptr++)
276 char * s;
277 unsigned int bin = 0;
278 unsigned int mask = 0;
280 for (s = opcode->opcode; *s; ++s)
282 bin <<= 1;
283 mask <<= 1;
284 bin |= (*s == '1');
285 mask |= (*s == '1' || *s == '0');
287 assert (s - opcode->opcode == 16);
288 assert (opcode->bin_opcode == bin);
289 *maskptr = mask;
292 initialized = 1;
295 insn = avrdis_opcode (addr, info);
297 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
298 opcode->name;
299 opcode++, maskptr++)
300 if ((insn & *maskptr) == opcode->bin_opcode)
301 break;
303 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
304 `std b+0,r' as `st b,r' (next entry in the table). */
306 if (AVR_DISP0_P (insn))
307 opcode++;
309 op1[0] = 0;
310 op2[0] = 0;
311 comment1[0] = 0;
312 comment2[0] = 0;
314 if (opcode->name)
316 char *op = opcode->constraints;
318 insn2 = 0;
319 ok = 1;
321 if (opcode->insn_size > 1)
323 insn2 = avrdis_opcode (addr + 2, info);
324 cmd_len = 4;
327 if (*op && *op != '?')
329 int regs = REGISTER_P (*op);
331 ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
333 if (ok && *(++op) == ',')
334 ok = avr_operand (insn, insn2, addr, *(++op), op2,
335 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
339 if (!ok)
341 /* Unknown opcode, or invalid combination of operands. */
342 sprintf (op1, "0x%04x", insn);
343 op2[0] = 0;
344 sprintf (comment1, "????");
345 comment2[0] = 0;
348 (*prin) (stream, "%s", ok ? opcode->name : ".word");
350 if (*op1)
351 (*prin) (stream, "\t%s", op1);
353 if (*op2)
354 (*prin) (stream, ", %s", op2);
356 if (*comment1)
357 (*prin) (stream, "\t; %s", comment1);
359 if (sym_op1)
360 info->print_address_func (sym_addr1, info);
362 if (*comment2)
363 (*prin) (stream, " %s", comment2);
365 if (sym_op2)
366 info->print_address_func (sym_addr2, info);
368 return cmd_len;