Add x86-64 ILP32 support.
[binutils.git] / gas / testsuite / gas / i386 / ilp32 / x86-64-opcode-inval-intel.d
blobcd503ebc9e7df5fa8077ad2fce31ff556c197c6c
1 #source: ../x86-64-opcode-inval.s
2 #as: --32
3 #objdump: -dw -Mx86-64 -Mintel
4 #name: x86-64 (ILP32) illegal opcodes (Intel mode)
6 .*: +file format .*
8 Disassembly of section .text:
10 0+ <aaa>:
11 [ ]*[a-f0-9]+: 37 \(bad\)
13 0+1 <aad0>:
14 [ ]*[a-f0-9]+: d5 \(bad\)
15 [ ]*[a-f0-9]+: 0a d5 or dl,ch
17 0+3 <aad1>:
18 [ ]*[a-f0-9]+: d5 \(bad\)
19 [ ]*[a-f0-9]+: 02 d4 add dl,ah
21 0+5 <aam0>:
22 [ ]*[a-f0-9]+: d4 \(bad\)
23 [ ]*[a-f0-9]+: 0a d4 or dl,ah
25 0+7 <aam1>:
26 [ ]*[a-f0-9]+: d4 \(bad\)
27 [ ]*[a-f0-9]+: 02 3f add bh,BYTE PTR \[rdi\]
29 0+9 <aas>:
30 [ ]*[a-f0-9]+: 3f \(bad\)
32 0+a <bound>:
33 [ ]*[a-f0-9]+: 62 \(bad\)
34 [ ]*[a-f0-9]+: 10 27 adc BYTE PTR \[rdi\],ah
36 0+c <daa>:
37 [ ]*[a-f0-9]+: 27 \(bad\)
39 0+d <das>:
40 [ ]*[a-f0-9]+: 2f \(bad\)
42 0+e <into>:
43 [ ]*[a-f0-9]+: ce \(bad\)
45 0+f <pusha>:
46 [ ]*[a-f0-9]+: 60 \(bad\)
48 0+10 <popa>:
49 [ ]*[a-f0-9]+: 61 \(bad\)
50 #pass