1 #source
: ../x86
-64-opcode
-inval
.s
3 #objdump
: -dw -Mx86
-64 -Mintel
4 #name
: x86
-64 (ILP32
) illegal
opcodes (Intel mode
)
8 Disassembly of section
.text
:
11 [ ]*[a
-f0
-9]+: 37 \
(bad\
)
14 [ ]*[a
-f0
-9]+: d5 \
(bad\
)
15 [ ]*[a
-f0
-9]+: 0a d5
or dl,ch
18 [ ]*[a
-f0
-9]+: d5 \
(bad\
)
19 [ ]*[a
-f0
-9]+: 02 d4
add dl,ah
22 [ ]*[a
-f0
-9]+: d4 \
(bad\
)
23 [ ]*[a
-f0
-9]+: 0a d4
or dl,ah
26 [ ]*[a
-f0
-9]+: d4 \
(bad\
)
27 [ ]*[a
-f0
-9]+: 02 3f add bh
,BYTE PTR \
[rdi\
]
30 [ ]*[a
-f0
-9]+: 3f \
(bad\
)
33 [ ]*[a
-f0
-9]+: 62 \
(bad\
)
34 [ ]*[a
-f0
-9]+: 10 27 adc BYTE PTR \
[rdi\
],ah
37 [ ]*[a
-f0
-9]+: 27 \
(bad\
)
40 [ ]*[a
-f0
-9]+: 2f \
(bad\
)
43 [ ]*[a
-f0
-9]+: ce \
(bad\
)
46 [ ]*[a
-f0
-9]+: 60 \
(bad\
)
49 [ ]*[a
-f0
-9]+: 61 \
(bad\
)